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AJvYcCUBxGMLkxqOIF1R83PtsVzqrquJHjQhKs1kHyBBcW05WuWHNa6u4uCJpVXM3ZjeiDBFistVZ65qSVuElReMbLJqbzvLS56L7FTEBw== X-Gm-Message-State: AOJu0YxPykF8XZSfmxX7AukzgBe9ic5YVoDlRGyzBBVzHKWPtI/Mu6g8 EP1vDlnKxahszgi6Ilz/OWao6RADycB5ajmMS7tzVfE8fTklzsZm9jSA3hc74A== X-Google-Smtp-Source: AGHT+IEzdNCJCRH7yJ0ei0sniJdJNz8MHeUqYp2pu53sf+8Bmyz5pIMjJwrHoIHAL/e8IimnYzpWvA== X-Received: by 2002:a17:903:182:b0:1f6:6c52:7231 with SMTP id d9443c01a7336-1f6a5a0de72mr20221205ad.20.1717565345495; Tue, 04 Jun 2024 22:29:05 -0700 (PDT) Received: from thinkpad ([120.60.137.11]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f6323dd9dcsm92616585ad.126.2024.06.04.22.29.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Jun 2024 22:29:05 -0700 (PDT) Date: Wed, 5 Jun 2024 10:58:48 +0530 From: Manivannan Sadhasivam To: Abel Vesa Cc: Bjorn Helgaas , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] dt-bindings: PCI: qcom: Fix register maps items and add 3.3V supply Message-ID: <20240605052848.GA2417@thinkpad> References: <20240604-x1e80100-pci-bindings-fix-v1-1-f4e20251b3d0@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240604-x1e80100-pci-bindings-fix-v1-1-f4e20251b3d0@linaro.org> On Tue, Jun 04, 2024 at 07:05:12PM +0300, Abel Vesa wrote: Nit: Subject should mention the SoC name > All PCIe controllers found on X1E80100 have MHI register region and > VDDPE supplies. Add them to the schema as well. > This is actually 2 patches. One adding the MHI register region for X1E80100 and another adding the missing 'vddpe-3v3-supply' common to other SoCs as well. - Mani > Fixes: 692eadd51698 ("dt-bindings: PCI: qcom: Document the X1E80100 PCIe Controller") > Signed-off-by: Abel Vesa > --- > This patchset fixes the following warning: > https://lore.kernel.org/all/171751454535.785265.18156799252281879515.robh@kernel.org/ > > Also fixes a MHI reg region warning that will be triggered by the following patch: > https://lore.kernel.org/all/20240604-x1e80100-dts-fixes-pcie6a-v2-1-0b4d8c6256e5@linaro.org/ > --- > Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml > index 1074310a8e7a..7ceba32c4cf9 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml > @@ -19,11 +19,10 @@ properties: > const: qcom,pcie-x1e80100 > > reg: > - minItems: 5 > + minItems: 6 > maxItems: 6 > > reg-names: > - minItems: 5 > items: > - const: parf # Qualcomm specific registers > - const: dbi # DesignWare PCIe registers > @@ -71,6 +70,9 @@ properties: > - const: pci # PCIe core reset > - const: link_down # PCIe link down reset > > + vddpe-3v3-supply: > + description: A phandle to the PCIe endpoint power supply > + > allOf: > - $ref: qcom,pcie-common.yaml# > > > --- > base-commit: d97496ca23a2d4ee80b7302849404859d9058bcd > change-id: 20240604-x1e80100-pci-bindings-fix-196925d15260 > > Best regards, > -- > Abel Vesa > -- மணிவண்ணன் சதாசிவம்