From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Abel Vesa <abel.vesa@linaro.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Rajendra Nayak <quic_rjendra@quicinc.com>,
Sibi Sankar <quic_sibis@quicinc.com>,
Johan Hovold <johan@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: qcom: x1e80100: Fix PCIe 6a reg offsets and add MHI
Date: Wed, 5 Jun 2024 11:21:09 +0530 [thread overview]
Message-ID: <20240605055109.GC2417@thinkpad> (raw)
In-Reply-To: <20240604-x1e80100-dts-fixes-pcie6a-v2-1-0b4d8c6256e5@linaro.org>
On Tue, Jun 04, 2024 at 06:20:24PM +0300, Abel Vesa wrote:
> The actual size of the DBI region is 0xf20 and the start of the
> ELBI region is 0xf40, according to the documentation. So fix them.
> While at it, add the MHI region as well.
>
> Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes")
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
- Mani
> ---
> Changes in v2:
> - Dropped the 4-lane mode switch patch entire.
> - Fetched Konrad's R-b tag
> - Link to v1: https://lore.kernel.org/r/20240531-x1e80100-dts-fixes-pcie6a-v1-0-1573ebcae1e8@linaro.org
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index cf8d8d5b1870..fe7ca2a73f9d 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -2818,15 +2818,17 @@ pcie6a: pci@1bf8000 {
> device_type = "pci";
> compatible = "qcom,pcie-x1e80100";
> reg = <0 0x01bf8000 0 0x3000>,
> - <0 0x70000000 0 0xf1d>,
> - <0 0x70000f20 0 0xa8>,
> + <0 0x70000000 0 0xf20>,
> + <0 0x70000f40 0 0xa8>,
> <0 0x70001000 0 0x1000>,
> - <0 0x70100000 0 0x100000>;
> + <0 0x70100000 0 0x100000>,
> + <0 0x01bfb000 0 0x1000>;
> reg-names = "parf",
> "dbi",
> "elbi",
> "atu",
> - "config";
> + "config",
> + "mhi";
> #address-cells = <3>;
> #size-cells = <2>;
> ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,
>
> ---
> base-commit: d97496ca23a2d4ee80b7302849404859d9058bcd
> change-id: 20240531-x1e80100-dts-fixes-pcie6a-0cf5b75a818e
>
> Best regards,
> --
> Abel Vesa <abel.vesa@linaro.org>
>
>
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2024-06-05 5:51 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-04 15:20 [PATCH v2] arm64: dts: qcom: x1e80100: Fix PCIe 6a reg offsets and add MHI Abel Vesa
2024-06-05 5:51 ` Manivannan Sadhasivam [this message]
2024-06-06 3:20 ` Bjorn Andersson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240605055109.GC2417@thinkpad \
--to=manivannan.sadhasivam@linaro.org \
--cc=abel.vesa@linaro.org \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=johan@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=quic_rjendra@quicinc.com \
--cc=quic_sibis@quicinc.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).