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From: Andrew Jones <ajones@ventanamicro.com>
To: Tomasz Jeznach <tjeznach@rivosinc.com>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	 Robin Murphy <robin.murphy@arm.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Anup Patel <apatel@ventanamicro.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	 Nick Kossifidis <mick@ics.forth.gr>,
	Sebastien Boeuf <seb@rivosinc.com>,
	 Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org, iommu@lists.linux.dev,
	 linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux@rivosinc.com,  Lu Baolu <baolu.lu@linux.intel.com>
Subject: Re: [PATCH v6 2/7] iommu/riscv: Add RISC-V IOMMU platform device driver
Date: Thu, 6 Jun 2024 08:54:33 +0200	[thread overview]
Message-ID: <20240606-988b5519747e28c276f9a952@orel> (raw)
In-Reply-To: <CAH2o1u7N03b3dzxxG8jp7qW2jmCDADwq_OL2Ayv1AL1XsA7s5w@mail.gmail.com>

On Wed, Jun 05, 2024 at 11:58:28AM GMT, Tomasz Jeznach wrote:
> On Wed, May 29, 2024 at 8:15 AM Andrew Jones <ajones@ventanamicro.com> wrote:
...
> > > +/* 3.1.3 I/O MMU Directory cache invalidation */
> > > +/* Fields on dword0 */
> > > +#define RISCV_IOMMU_CMD_IODIR_OPCODE         3
> > > +#define RISCV_IOMMU_CMD_IODIR_FUNC_INVAL_DDT 0
> > > +#define RISCV_IOMMU_CMD_IODIR_FUNC_INVAL_PDT 1
> > > +#define RISCV_IOMMU_CMD_IODIR_PID            GENMASK_ULL(31, 12)
> > > +#define RISCV_IOMMU_CMD_IODIR_DV             BIT_ULL(33)
> > > +#define RISCV_IOMMU_CMD_IODIR_DID            GENMASK_ULL(63, 40)
> >
> > RISCV_IOMMU_CMD_IOTDIR_* for all above
> >
> 
> I've checked latest RISC-V IOMMU Arch Specification and it looks there
> it is a bit inconsistent in IODIR naming.  The acronym IOTDIR is used
> only once, while all other references to directory cache invalidation
> command use IODIR.  I'll keep _CMD_IODIR_ here.
>

Indeed. I've made a comment on the spec clarifications PR to suggest the
s/IOTDIR/IODIR/ change.

Thanks,
drew

  reply	other threads:[~2024-06-06  6:54 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-24 19:34 [PATCH v6 0/7] Linux RISC-V IOMMU Support Tomasz Jeznach
2024-05-24 19:34 ` [PATCH v6 1/7] dt-bindings: iommu: riscv: Add bindings for RISC-V IOMMU Tomasz Jeznach
2024-05-24 19:34 ` [PATCH v6 2/7] iommu/riscv: Add RISC-V IOMMU platform device driver Tomasz Jeznach
2024-05-29 15:15   ` Andrew Jones
2024-05-29 17:59     ` Tomasz Jeznach
2024-05-30  8:20       ` Andrew Jones
2024-06-03 12:53     ` Andrew Jones
2024-06-05 18:58     ` Tomasz Jeznach
2024-06-06  6:54       ` Andrew Jones [this message]
2024-06-03 12:59   ` Andrew Jones
2024-06-05 19:41     ` Tomasz Jeznach
2024-05-24 19:34 ` [PATCH v6 3/7] iommu/riscv: Add RISC-V IOMMU PCIe " Tomasz Jeznach
2024-05-24 19:34 ` [PATCH v6 4/7] iommu/riscv: Enable IOMMU registration and device probe Tomasz Jeznach
2024-05-24 19:34 ` [PATCH v6 5/7] iommu/riscv: Device directory management Tomasz Jeznach
2024-05-31  6:25   ` Zong Li
2024-06-10 17:49     ` Jason Gunthorpe
2024-06-10 18:48       ` Tomasz Jeznach
2024-06-10 22:20         ` Jason Gunthorpe
2024-06-11  2:00           ` Tomasz Jeznach
2024-06-11 12:12             ` Jason Gunthorpe
2024-05-24 19:34 ` [PATCH v6 6/7] iommu/riscv: Command and fault queue support Tomasz Jeznach
2024-05-24 19:34 ` [PATCH v6 7/7] iommu/riscv: Paging domain support Tomasz Jeznach

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