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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown , Christophe Roullier , Marek Vasut CC: , , , , Subject: [PATCH 0/3] Series DTs to deliver Ethernet for STM32MP13 Date: Mon, 10 Jun 2024 10:03:06 +0200 Message-ID: <20240610080309.290444-1-christophe.roullier@foss.st.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-10_02,2024-06-06_02,2024-05-17_01 STM32MP13 is STM32 SOC with 2 GMACs instances GMAC IP version is SNPS 4.20. GMAC IP configure with 1 RX and 1 TX queue. DMA HW capability register supported RX Checksum Offload Engine supported TX Checksum insertion supported Wake-Up On Lan supported TSO supported Christophe Roullier (3): ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13 ARM: dts: stm32: add ethernet1/2 RMII pins for STM32MP13F-DK board ARM: dts: stm32: add ethernet1 for STM32MP135F-DK board arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 71 +++++++++++++++++++++ arch/arm/boot/dts/st/stm32mp131.dtsi | 38 +++++++++++ arch/arm/boot/dts/st/stm32mp133.dtsi | 31 +++++++++ arch/arm/boot/dts/st/stm32mp135f-dk.dts | 23 +++++++ 4 files changed, 163 insertions(+) base-commit: 28f961f9d5b7c3d9b9f93cc59e54477ba1278cf9 -- 2.25.1