[PATCH v2 0/6] Add board support for Sipeed LicheeRV Nano

[PATCH v2 0/6] Add board support for Sipeed LicheeRV Nano

[Thomas Bonnefille]

The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds
minimal device tree files for this board to make it boot to a basic
shell.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
Changes in v2:
- Add SDHCI support
- Change device tree name to match the Makefile
- Add oscillator frequency
- Add aliases to other UARTs
- Add aliases to GPIOs
- Move compatible for SDHCI from common DT to specific DT 
- Link to v1: https://lore.kernel.org/r/20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com

---
Thomas Bonnefille (6):
      riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC
      dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic
      dt-bindings: timer: Add SOPHGO SG2002 clint
      dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles
      riscv: dts: sophgo: Add initial SG2002 SoC device tree
      riscv: dts: sophgo: Add LicheeRV Nano board device tree

 .../interrupt-controller/sifive,plic-1.0.0.yaml    |  1 +
 .../devicetree/bindings/riscv/sophgo.yaml          |  5 ++
 .../devicetree/bindings/timer/sifive,clint.yaml    |  1 +
 arch/riscv/boot/dts/sophgo/Makefile                |  1 +
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi            |  4 ++
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi             |  1 -
 .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts     | 53 ++++++++++++++++++++++
 arch/riscv/boot/dts/sophgo/sg2002.dtsi             | 34 ++++++++++++++
 8 files changed, 99 insertions(+), 1 deletion(-)
---
base-commit: 83a7eefedc9b56fe7bfeff13b6c7356688ffa670
change-id: 20240515-sg2002-93dce1d263be

Best regards,
-- 
Thomas Bonnefille <thomas.bonnefille@bootlin.com>

[PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Thomas Bonnefille]

Remove SDHCI compatible for CV1800b from common dtsi file to put it in
the specific dtsi file of the CV1800b.
This commits aims at following the same guidelines as in the other nodes
of the CV18XX family.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi  | 1 -
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index ec9530972ae2..b9cd51457b4c 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -25,3 +25,7 @@ &clint {
 &clk {
 	compatible = "sophgo,cv1800-clk";
 };
+
+&sdhci0 {
+	compatible = "sophgo,cv1800b-dwcmshc";
+};
diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index 891932ae470f..7247c7c3013c 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -288,7 +288,6 @@ uart4: serial@41c0000 {
 		};
 
 		sdhci0: mmc@4310000 {
-			compatible = "sophgo,cv1800b-dwcmshc";
 			reg = <0x4310000 0x1000>;
 			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clk CLK_AXI4_SD0>,

-- 
2.45.2

Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Inochi Amaoto]

On Wed, Jun 12, 2024 at 10:02:31AM GMT, Thomas Bonnefille wrote:
> Remove SDHCI compatible for CV1800b from common dtsi file to put it in
> the specific dtsi file of the CV1800b.
> This commits aims at following the same guidelines as in the other nodes
> of the CV18XX family.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi  | 1 -
>  2 files changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index ec9530972ae2..b9cd51457b4c 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -25,3 +25,7 @@ &clint {
>  &clk {
>  	compatible = "sophgo,cv1800-clk";
>  };
> +
> +&sdhci0 {
> +	compatible = "sophgo,cv1800b-dwcmshc";
> +};
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 891932ae470f..7247c7c3013c 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -288,7 +288,6 @@ uart4: serial@41c0000 {
>  		};
>  
>  		sdhci0: mmc@4310000 {
> -			compatible = "sophgo,cv1800b-dwcmshc";
>  			reg = <0x4310000 0x1000>;
>  			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&clk CLK_AXI4_SD0>,
> 
> -- 
> 2.45.2
> 

Hi, Jisheng,

Is this change necessary? IIRC, the sdhci is the same across 
the whole series.

Regards,
Inochi

Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Yixun Lan]

Hi

On 18:47 Wed 12 Jun     , Inochi Amaoto wrote:
> On Wed, Jun 12, 2024 at 10:02:31AM GMT, Thomas Bonnefille wrote:
> > Remove SDHCI compatible for CV1800b from common dtsi file to put it in
> > the specific dtsi file of the CV1800b.
> > This commits aims at following the same guidelines as in the other nodes
> > of the CV18XX family.
is there any URL of guideline? or did I miss anything
couldn't find any discussion about this in v1

> > 
> > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> > ---
> >  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
> >  arch/riscv/boot/dts/sophgo/cv18xx.dtsi  | 1 -
> >  2 files changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > index ec9530972ae2..b9cd51457b4c 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > @@ -25,3 +25,7 @@ &clint {
> >  &clk {
> >  	compatible = "sophgo,cv1800-clk";
> >  };
> > +
> > +&sdhci0 {
> > +	compatible = "sophgo,cv1800b-dwcmshc";
> > +};
> > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > index 891932ae470f..7247c7c3013c 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > @@ -288,7 +288,6 @@ uart4: serial@41c0000 {
> >  		};
> >  
> >  		sdhci0: mmc@4310000 {
> > -			compatible = "sophgo,cv1800b-dwcmshc";
> >  			reg = <0x4310000 0x1000>;
> >  			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
> >  			clocks = <&clk CLK_AXI4_SD0>,
> > 
> > -- 
> > 2.45.2
> > 
> 
> Hi, Jisheng,
> 
> Is this change necessary? IIRC, the sdhci is the same across 
> the whole series.
I tend to agree with Inochi here, if it's same across all SoC, then no bother to
split, it will cause more trouble to maintain..

> 
> Regards,
> Inochi

-- 
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55

Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Inochi Amaoto]

On Sun, Jun 16, 2024 at 11:58:29PM GMT, Yixun Lan wrote:
> Hi
> 
> On 18:47 Wed 12 Jun     , Inochi Amaoto wrote:
> > On Wed, Jun 12, 2024 at 10:02:31AM GMT, Thomas Bonnefille wrote:
> > > Remove SDHCI compatible for CV1800b from common dtsi file to put it in
> > > the specific dtsi file of the CV1800b.
> > > This commits aims at following the same guidelines as in the other nodes
> > > of the CV18XX family.
> is there any URL of guideline? or did I miss anything
> couldn't find any discussion about this in v1
> 

No, it seems like that this is a new change from Thomas.

> > > 
> > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> > > ---
> > >  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
> > >  arch/riscv/boot/dts/sophgo/cv18xx.dtsi  | 1 -
> > >  2 files changed, 4 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > > index ec9530972ae2..b9cd51457b4c 100644
> > > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > > @@ -25,3 +25,7 @@ &clint {
> > >  &clk {
> > >  	compatible = "sophgo,cv1800-clk";
> > >  };
> > > +
> > > +&sdhci0 {
> > > +	compatible = "sophgo,cv1800b-dwcmshc";
> > > +};
> > > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > > index 891932ae470f..7247c7c3013c 100644
> > > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > > @@ -288,7 +288,6 @@ uart4: serial@41c0000 {
> > >  		};
> > >  
> > >  		sdhci0: mmc@4310000 {
> > > -			compatible = "sophgo,cv1800b-dwcmshc";
> > >  			reg = <0x4310000 0x1000>;
> > >  			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
> > >  			clocks = <&clk CLK_AXI4_SD0>,
> > > 
> > > -- 
> > > 2.45.2
> > > 
> > 
> > Hi, Jisheng,
> > 
> > Is this change necessary? IIRC, the sdhci is the same across 
> > the whole series.
> I tend to agree with Inochi here, if it's same across all SoC, then no bother to
> split, it will cause more trouble to maintain..
> 
> > 
> > Regards,
> > Inochi
> 
> -- 
> Yixun Lan (dlan)
> Gentoo Linux Developer
> GPG Key ID AABEFD55

Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Thomas Bonnefille]

On 6/17/24 1:58 AM, Yixun Lan wrote:
> Hi
> 
> On 18:47 Wed 12 Jun     , Inochi Amaoto wrote:
>> On Wed, Jun 12, 2024 at 10:02:31AM GMT, Thomas Bonnefille wrote:
>>> Remove SDHCI compatible for CV1800b from common dtsi file to put it in
>>> the specific dtsi file of the CV1800b.
>>> This commits aims at following the same guidelines as in the other nodes
>>> of the CV18XX family.
> is there any URL of guideline? or did I miss anything
> couldn't find any discussion about this in v1
> 

Not explicitly, the fact is that I had to use a specific compatible on 
SG2002 for the sdhci (it is already defined mainline), I had to choose 
between :

1. cv18xx.dtsi : compatible cv1800b-dwcmshc
    cv1800b.dtsi : no redefined compatible
    sg2002.dtsi : overwrite the previous compatible to use sg2002-dwcmshc

2. cv18xx.dtsi : no compatible
    cv1800b.dtsi : compatible for cv1800b-dwcmshc
    sg2002.dtsi : compatible for sg2002-dwcmshc

As in the plic and clint controllers, the second option was chosen I 
consider this as a "guideline" and reformat the dtsis accordingly.

>>>
>>> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
>>> ---
>>>   arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
>>>   arch/riscv/boot/dts/sophgo/cv18xx.dtsi  | 1 -
>>>   2 files changed, 4 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
>>> index ec9530972ae2..b9cd51457b4c 100644
>>> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
>>> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
>>> @@ -25,3 +25,7 @@ &clint {
>>>   &clk {
>>>   	compatible = "sophgo,cv1800-clk";
>>>   };
>>> +
>>> +&sdhci0 {
>>> +	compatible = "sophgo,cv1800b-dwcmshc";
>>> +};
>>> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>>> index 891932ae470f..7247c7c3013c 100644
>>> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>>> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>>> @@ -288,7 +288,6 @@ uart4: serial@41c0000 {
>>>   		};
>>>   
>>>   		sdhci0: mmc@4310000 {
>>> -			compatible = "sophgo,cv1800b-dwcmshc";
>>>   			reg = <0x4310000 0x1000>;
>>>   			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
>>>   			clocks = <&clk CLK_AXI4_SD0>,
>>>
>>> -- 
>>> 2.45.2
>>>
>>
>> Hi, Jisheng,
>>
>> Is this change necessary? IIRC, the sdhci is the same across
>> the whole series.
> I tend to agree with Inochi here, if it's same across all SoC, then no bother to
> split, it will cause more trouble to maintain..
> 

To be honest, I agree with this to, but as a specific compatible for the 
SG2002 was created in commit 849e81817b9b, I thought that the best 
practice was to use it.

>>
>> Regards,
>> Inochi
> 

Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Jisheng Zhang]

On Mon, Jun 17, 2024 at 11:16:32AM +0200, Thomas Bonnefille wrote:
> 
> 
> On 6/17/24 1:58 AM, Yixun Lan wrote:
> > Hi
> > 
> > On 18:47 Wed 12 Jun     , Inochi Amaoto wrote:
> > > On Wed, Jun 12, 2024 at 10:02:31AM GMT, Thomas Bonnefille wrote:
> > > > Remove SDHCI compatible for CV1800b from common dtsi file to put it in
> > > > the specific dtsi file of the CV1800b.
> > > > This commits aims at following the same guidelines as in the other nodes
> > > > of the CV18XX family.
> > is there any URL of guideline? or did I miss anything
> > couldn't find any discussion about this in v1
> > 
> 
> Not explicitly, the fact is that I had to use a specific compatible on
> SG2002 for the sdhci (it is already defined mainline), I had to choose
> between :
> 
> 1. cv18xx.dtsi : compatible cv1800b-dwcmshc
>    cv1800b.dtsi : no redefined compatible
>    sg2002.dtsi : overwrite the previous compatible to use sg2002-dwcmshc
> 
> 2. cv18xx.dtsi : no compatible
>    cv1800b.dtsi : compatible for cv1800b-dwcmshc
>    sg2002.dtsi : compatible for sg2002-dwcmshc
> 
> As in the plic and clint controllers, the second option was chosen I
> consider this as a "guideline" and reformat the dtsis accordingly.
> 
> > > > 
> > > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> > > > ---
> > > >   arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
> > > >   arch/riscv/boot/dts/sophgo/cv18xx.dtsi  | 1 -
> > > >   2 files changed, 4 insertions(+), 1 deletion(-)
> > > > 
> > > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > > > index ec9530972ae2..b9cd51457b4c 100644
> > > > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > > > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > > > @@ -25,3 +25,7 @@ &clint {
> > > >   &clk {
> > > >   	compatible = "sophgo,cv1800-clk";
> > > >   };
> > > > +
> > > > +&sdhci0 {
> > > > +	compatible = "sophgo,cv1800b-dwcmshc";
> > > > +};
> > > > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > > > index 891932ae470f..7247c7c3013c 100644
> > > > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > > > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > > > @@ -288,7 +288,6 @@ uart4: serial@41c0000 {
> > > >   		};
> > > >   		sdhci0: mmc@4310000 {
> > > > -			compatible = "sophgo,cv1800b-dwcmshc";
> > > >   			reg = <0x4310000 0x1000>;
> > > >   			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
> > > >   			clocks = <&clk CLK_AXI4_SD0>,
> > > > 
> > > > -- 
> > > > 2.45.2
> > > > 
> > > 
> > > Hi, Jisheng,
> > > 
> > > Is this change necessary? IIRC, the sdhci is the same across
> > > the whole series.

Hi,

sorry for being late, I was busy in the past 2.5 month. Per my
understanding, the sdhci in cv1800b is the same as the one in
sg200x. Maybe I'm wrong, but this was my impression when I cooked
the sdhci driver patch for these SoCs.

> > I tend to agree with Inochi here, if it's same across all SoC, then no bother to
> > split, it will cause more trouble to maintain..
> > 
> 
> To be honest, I agree with this to, but as a specific compatible for the
> SG2002 was created in commit 849e81817b9b, I thought that the best practice
> was to use it.

I'd like to take this chance to query DT maintainers: FWICT, in the past
even if the PLIC is the same between SoCs, adding a new compatible for
them seems a must. So when time goes on, the compatbile list would be
longer and longer, is it really necessary? Can we just use the existing
compatible string?
DT maintainers may answered the query in the past, if so, sorry for
querying again.

> 
> > > 
> > > Regards,
> > > Inochi
> > 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1865 bytes --]

On Mon, Jun 17, 2024 at 09:16:43PM +0800, Jisheng Zhang wrote:
> On Mon, Jun 17, 2024 at 11:16:32AM +0200, Thomas Bonnefille wrote:
> > On 6/17/24 1:58 AM, Yixun Lan wrote:
> > > On 18:47 Wed 12 Jun     , Inochi Amaoto wrote:

> > > > Is this change necessary? IIRC, the sdhci is the same across
> > > > the whole series.

> sorry for being late, I was busy in the past 2.5 month. Per my
> understanding, the sdhci in cv1800b is the same as the one in
> sg200x. Maybe I'm wrong, but this was my impression when I cooked
> the sdhci driver patch for these SoCs.
> 
> > > I tend to agree with Inochi here, if it's same across all SoC, then no bother to
> > > split, it will cause more trouble to maintain..
> > > 
> > 
> > To be honest, I agree with this to, but as a specific compatible for the
> > SG2002 was created in commit 849e81817b9b, I thought that the best practice
> > was to use it.
> 
> I'd like to take this chance to query DT maintainers: FWICT, in the past
> even if the PLIC is the same between SoCs, adding a new compatible for
> them seems a must. So when time goes on, the compatbile list would be
> longer and longer, is it really necessary? Can we just use the existing
> compatible string?
> DT maintainers may answered the query in the past, if so, sorry for
> querying again.

For new integrations of an IP, yes, new specific compatibles please. New
integrations may have different bugs etc, even if the IP itself is the
same. If there's different SoCs that are the same die, but with elements
fused off, then sure, use the same compatible.

I expect the list of compatibles in the binding to grow rather large, but
that is fine. No one SoC is going to do anything other than something like
compatible = "renesas,$soc-plic", "andestech,corecomplex-plic", "riscv,plic";
which I think is perfectly fine.


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Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Samuel Holland]

Hi Jisheng, Thomas,

On 2024-06-17 10:40 AM, Conor Dooley wrote:
> On Mon, Jun 17, 2024 at 09:16:43PM +0800, Jisheng Zhang wrote:
>> On Mon, Jun 17, 2024 at 11:16:32AM +0200, Thomas Bonnefille wrote:
>>> On 6/17/24 1:58 AM, Yixun Lan wrote:
>>>> On 18:47 Wed 12 Jun     , Inochi Amaoto wrote:
> 
>>>>> Is this change necessary? IIRC, the sdhci is the same across
>>>>> the whole series.
> 
>> sorry for being late, I was busy in the past 2.5 month. Per my
>> understanding, the sdhci in cv1800b is the same as the one in
>> sg200x. Maybe I'm wrong, but this was my impression when I cooked
>> the sdhci driver patch for these SoCs.
>>
>>>> I tend to agree with Inochi here, if it's same across all SoC, then no bother to
>>>> split, it will cause more trouble to maintain..
>>>>
>>>
>>> To be honest, I agree with this to, but as a specific compatible for the
>>> SG2002 was created in commit 849e81817b9b, I thought that the best practice
>>> was to use it.
>>
>> I'd like to take this chance to query DT maintainers: FWICT, in the past
>> even if the PLIC is the same between SoCs, adding a new compatible for
>> them seems a must. So when time goes on, the compatbile list would be
>> longer and longer, is it really necessary? Can we just use the existing
>> compatible string?
>> DT maintainers may answered the query in the past, if so, sorry for
>> querying again.
> 
> For new integrations of an IP, yes, new specific compatibles please. New
> integrations may have different bugs etc, even if the IP itself is the
> same. If there's different SoCs that are the same die, but with elements
> fused off, then sure, use the same compatible.
> 
> I expect the list of compatibles in the binding to grow rather large, but
> that is fine. No one SoC is going to do anything other than something like
> compatible = "renesas,$soc-plic", "andestech,corecomplex-plic", "riscv,plic";
> which I think is perfectly fine.

And you can do the same thing here for the SDHCI controller: if you think sg200x
has the same controller (and integration! e.g. number of clocks/resets) as
cv1800b, then you should keep sophgo,cv1800b-dwcmshc as a fallback compatible
string. Then the driver doesn't need any changes until/unless you eventually
find some reason they are not compatible.

It's better to have a SoC-specific compatible string in the DT and not need it,
than find out later you need one and not have it. :)

Regards,
Samuel

Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Jisheng Zhang]

On Mon, Jun 17, 2024 at 10:57:54AM -0500, Samuel Holland wrote:
> Hi Jisheng, Thomas,
> 
> On 2024-06-17 10:40 AM, Conor Dooley wrote:
> > On Mon, Jun 17, 2024 at 09:16:43PM +0800, Jisheng Zhang wrote:
> >> On Mon, Jun 17, 2024 at 11:16:32AM +0200, Thomas Bonnefille wrote:
> >>> On 6/17/24 1:58 AM, Yixun Lan wrote:
> >>>> On 18:47 Wed 12 Jun     , Inochi Amaoto wrote:
> > 
> >>>>> Is this change necessary? IIRC, the sdhci is the same across
> >>>>> the whole series.
> > 
> >> sorry for being late, I was busy in the past 2.5 month. Per my
> >> understanding, the sdhci in cv1800b is the same as the one in
> >> sg200x. Maybe I'm wrong, but this was my impression when I cooked
> >> the sdhci driver patch for these SoCs.
> >>
> >>>> I tend to agree with Inochi here, if it's same across all SoC, then no bother to
> >>>> split, it will cause more trouble to maintain..
> >>>>
> >>>
> >>> To be honest, I agree with this to, but as a specific compatible for the
> >>> SG2002 was created in commit 849e81817b9b, I thought that the best practice
> >>> was to use it.
> >>
> >> I'd like to take this chance to query DT maintainers: FWICT, in the past
> >> even if the PLIC is the same between SoCs, adding a new compatible for
> >> them seems a must. So when time goes on, the compatbile list would be
> >> longer and longer, is it really necessary? Can we just use the existing
> >> compatible string?
> >> DT maintainers may answered the query in the past, if so, sorry for
> >> querying again.
> > 
> > For new integrations of an IP, yes, new specific compatibles please. New
> > integrations may have different bugs etc, even if the IP itself is the
> > same. If there's different SoCs that are the same die, but with elements
> > fused off, then sure, use the same compatible.
> > 
> > I expect the list of compatibles in the binding to grow rather large, but
> > that is fine. No one SoC is going to do anything other than something like
> > compatible = "renesas,$soc-plic", "andestech,corecomplex-plic", "riscv,plic";
> > which I think is perfectly fine.
> 
> And you can do the same thing here for the SDHCI controller: if you think sg200x
> has the same controller (and integration! e.g. number of clocks/resets) as
> cv1800b, then you should keep sophgo,cv1800b-dwcmshc as a fallback compatible
> string. Then the driver doesn't need any changes until/unless you eventually
> find some reason they are not compatible.
> 
> It's better to have a SoC-specific compatible string in the DT and not need it,
> than find out later you need one and not have it. :)

Good idea, this solution looks better! Thanks for the suggestion

> 
> Regards,
> Samuel
> 

Re: [PATCH v2 1/6] riscv: dts: sophgo: Put sdhci compatible in dt of specific SoC

[Inochi Amaoto]

On Mon, Jun 17, 2024 at 10:57:54AM GMT, Samuel Holland wrote:
> Hi Jisheng, Thomas,
> 
> On 2024-06-17 10:40 AM, Conor Dooley wrote:
> > On Mon, Jun 17, 2024 at 09:16:43PM +0800, Jisheng Zhang wrote:
> >> On Mon, Jun 17, 2024 at 11:16:32AM +0200, Thomas Bonnefille wrote:
> >>> On 6/17/24 1:58 AM, Yixun Lan wrote:
> >>>> On 18:47 Wed 12 Jun     , Inochi Amaoto wrote:
> > 
> >>>>> Is this change necessary? IIRC, the sdhci is the same across
> >>>>> the whole series.
> > 
> >> sorry for being late, I was busy in the past 2.5 month. Per my
> >> understanding, the sdhci in cv1800b is the same as the one in
> >> sg200x. Maybe I'm wrong, but this was my impression when I cooked
> >> the sdhci driver patch for these SoCs.
> >>
> >>>> I tend to agree with Inochi here, if it's same across all SoC, then no bother to
> >>>> split, it will cause more trouble to maintain..
> >>>>
> >>>
> >>> To be honest, I agree with this to, but as a specific compatible for the
> >>> SG2002 was created in commit 849e81817b9b, I thought that the best practice
> >>> was to use it.
> >>
> >> I'd like to take this chance to query DT maintainers: FWICT, in the past
> >> even if the PLIC is the same between SoCs, adding a new compatible for
> >> them seems a must. So when time goes on, the compatbile list would be
> >> longer and longer, is it really necessary? Can we just use the existing
> >> compatible string?
> >> DT maintainers may answered the query in the past, if so, sorry for
> >> querying again.
> > 
> > For new integrations of an IP, yes, new specific compatibles please. New
> > integrations may have different bugs etc, even if the IP itself is the
> > same. If there's different SoCs that are the same die, but with elements
> > fused off, then sure, use the same compatible.
> > 
> > I expect the list of compatibles in the binding to grow rather large, but
> > that is fine. No one SoC is going to do anything other than something like
> > compatible = "renesas,$soc-plic", "andestech,corecomplex-plic", "riscv,plic";
> > which I think is perfectly fine.
> 
> And you can do the same thing here for the SDHCI controller: if you think sg200x
> has the same controller (and integration! e.g. number of clocks/resets) as
> cv1800b, then you should keep sophgo,cv1800b-dwcmshc as a fallback compatible
> string. Then the driver doesn't need any changes until/unless you eventually
> find some reason they are not compatible.
> 
> It's better to have a SoC-specific compatible string in the DT and not need it,
> than find out later you need one and not have it. :)
> 
> Regards,
> Samuel
> 

This is excellect and reasonable. I will take your advice for the DT
change. With your suggetion, I think it may be acceptable to mark the
low-profile SoC as the default value and let other override it.

Let take the clk as the example:

// in the base file cv18xx.dtsi
clk: clock-controller@3002000 {
	// set the "sophgo,cv1800-clk" as the fallback.
	compatible = "sophgo,cv1800-clk";
	[...]
};

// in the cv1800b.dtsi
// now no need for the clk override since we have the compatible
// default.

// in the cv1812h.dtsi
// we still need this override as it is not compatible
&clk {
	compatible = "sophgo,cv1810-clk";
};

// in the sg2002.dtsi of the patch
// we need this override as it is also not compatible
&clk {
	compatible = "sophgo,sg2000-clk";
};

Do I understand correctly? Or we still need to duplicate these node
for SoCs with different profiles.

Regards,
Inochi

[PATCH v2 2/6] dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic

[Thomas Bonnefille]

Add compatible string for SOPHGO SG2002 Platform-Level Interruter
Controller.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 .../devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml      | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
index 709b2211276b..7e1451f9786a 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
@@ -67,6 +67,7 @@ properties:
               - allwinner,sun20i-d1-plic
               - sophgo,cv1800b-plic
               - sophgo,cv1812h-plic
+              - sophgo,sg2002-plic
               - sophgo,sg2042-plic
               - thead,th1520-plic
           - const: thead,c900-plic

-- 
2.45.2

Re: [PATCH v2 2/6] dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic

[Rob Herring]

On Wed, Jun 12, 2024 at 10:02:32AM +0200, Thomas Bonnefille wrote:
> Add compatible string for SOPHGO SG2002 Platform-Level Interruter
> Controller.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Missing Conor's ack. When sending new versions, it is your 
responsibility to add tags.

> ---
>  .../devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml      | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> index 709b2211276b..7e1451f9786a 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> @@ -67,6 +67,7 @@ properties:
>                - allwinner,sun20i-d1-plic
>                - sophgo,cv1800b-plic
>                - sophgo,cv1812h-plic
> +              - sophgo,sg2002-plic
>                - sophgo,sg2042-plic
>                - thead,th1520-plic
>            - const: thead,c900-plic
> 
> -- 
> 2.45.2
> 

Re: [PATCH v2 2/6] dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 449 bytes --]

On Wed, Jun 12, 2024 at 09:30:51AM -0600, Rob Herring wrote:
> On Wed, Jun 12, 2024 at 10:02:32AM +0200, Thomas Bonnefille wrote:
> > Add compatible string for SOPHGO SG2002 Platform-Level Interruter
> > Controller.
> > 
> > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> 
> Missing Conor's ack. When sending new versions, it is your 
> responsibility to add tags.

Acked-by: Conor Dooley <conor.dooley@microchip.com>

[-- Attachment #2: signature.asc --]
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[PATCH v2 3/6] dt-bindings: timer: Add SOPHGO SG2002 clint

[Thomas Bonnefille]

Add compatible string for SOPHGO SG2002 Core-Local Interrupt Controller.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index fced6f2d8ecb..b42d43d2de48 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -40,6 +40,7 @@ properties:
               - allwinner,sun20i-d1-clint
               - sophgo,cv1800b-clint
               - sophgo,cv1812h-clint
+              - sophgo,sg2002-clint
               - thead,th1520-clint
           - const: thead,c900-clint
       - items:

-- 
2.45.2

Re: [PATCH v2 3/6] dt-bindings: timer: Add SOPHGO SG2002 clint

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 271 bytes --]

On Wed, Jun 12, 2024 at 10:02:33AM +0200, Thomas Bonnefille wrote:
> Add compatible string for SOPHGO SG2002 Core-Local Interrupt Controller.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

[-- Attachment #2: signature.asc --]
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[PATCH v2 4/6] dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles

[Thomas Bonnefille]

Document the compatible strings for the Sipeed LicheeRV Nano B board which
uses the SOPHGO SG2002 SoC.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 Documentation/devicetree/bindings/riscv/sophgo.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/riscv/sophgo.yaml b/Documentation/devicetree/bindings/riscv/sophgo.yaml
index 9bc813dad098..a14cb10ff3f0 100644
--- a/Documentation/devicetree/bindings/riscv/sophgo.yaml
+++ b/Documentation/devicetree/bindings/riscv/sophgo.yaml
@@ -26,6 +26,11 @@ properties:
           - enum:
               - sophgo,huashan-pi
           - const: sophgo,cv1812h
+      - items:
+          - enum:
+              - sipeed,licheerv-nano-b
+          - const: sipeed,licheerv-nano
+          - const: sophgo,sg2002
       - items:
           - enum:
               - milkv,pioneer

-- 
2.45.2

Re: [PATCH v2 4/6] dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 304 bytes --]

On Wed, Jun 12, 2024 at 10:02:34AM +0200, Thomas Bonnefille wrote:
> Document the compatible strings for the Sipeed LicheeRV Nano B board which
> uses the SOPHGO SG2002 SoC.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

[-- Attachment #2: signature.asc --]
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[PATCH v2 5/6] riscv: dts: sophgo: Add initial SG2002 SoC device tree

[Thomas Bonnefille]

Add initial device tree for the SG2002 RISC-V SoC by SOPHGO.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/sophgo/sg2002.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
new file mode 100644
index 000000000000..0fc80da7c139
--- /dev/null
+++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "cv18xx.dtsi"
+
+/ {
+	compatible = "sophgo,sg2002";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>;
+	};
+};
+
+&plic {
+	compatible = "sophgo,sg2002-plic", "thead,c900-plic";
+};
+
+&clint {
+	compatible = "sophgo,sg2002-clint", "thead,c900-clint";
+};
+
+&clk {
+	compatible = "sophgo,sg2000-clk";
+};
+
+&sdhci0 {
+	compatible = "sophgo,sg2002-dwcmshc";
+};

-- 
2.45.2

Re: [PATCH v2 5/6] riscv: dts: sophgo: Add initial SG2002 SoC device tree

[Samuel Holland]

Hi Thomas,

On 2024-06-12 3:02 AM, Thomas Bonnefille wrote:
> Add initial device tree for the SG2002 RISC-V SoC by SOPHGO.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
>  arch/riscv/boot/dts/sophgo/sg2002.dtsi | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
> new file mode 100644
> index 000000000000..0fc80da7c139
> --- /dev/null
> +++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi
> @@ -0,0 +1,34 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> + */
> +
> +/dts-v1/;

While it doesn't hurt, you don't need this directive in both the .dtsi and each
.dts file. It looks like it usually goes in the board .dts file only.

Regards,
Samuel

> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include "cv18xx.dtsi"
> +
> +/ {
> +	compatible = "sophgo,sg2002";
> +
> +	memory@80000000 {
> +		device_type = "memory";
> +		reg = <0x80000000 0x10000000>;
> +	};
> +};
> +
> +&plic {
> +	compatible = "sophgo,sg2002-plic", "thead,c900-plic";
> +};
> +
> +&clint {
> +	compatible = "sophgo,sg2002-clint", "thead,c900-clint";
> +};
> +
> +&clk {
> +	compatible = "sophgo,sg2000-clk";
> +};
> +
> +&sdhci0 {
> +	compatible = "sophgo,sg2002-dwcmshc";
> +};
> 

[PATCH v2 6/6] riscv: dts: sophgo: Add LicheeRV Nano board device tree

[Thomas Bonnefille]

LicheeRV Nano B [1] is an embedded development platform based on the SOPHGO
SG2002 chip, the B(ase) version is deprived of Wifi/Bluetooth and Ethernet.

Add only support for UART and SDHCI.

Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html [1]

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/sophgo/Makefile                |  1 +
 .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts     | 53 ++++++++++++++++++++++
 2 files changed, 54 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile
index 57ad82a61ea6..47d4243a8f35 100644
--- a/arch/riscv/boot/dts/sophgo/Makefile
+++ b/arch/riscv/boot/dts/sophgo/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
 dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb
 dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb
+dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb
 dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
diff --git a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
new file mode 100644
index 000000000000..d011fb15b097
--- /dev/null
+++ b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
+ */
+
+/dts-v1/;
+
+#include "sg2002.dtsi"
+
+/ {
+	model = "LicheeRV Nano B";
+	compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";
+
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+		gpio3 = &gpio3;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&osc {
+	clock-frequency = <25000000>;
+};
+
+&sdhci0 {
+	status = "okay";
+	bus-width = <4>;
+	no-1-8-v;
+	no-mmc;
+	no-sdio;
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+};

-- 
2.45.2

Re: [PATCH v2 6/6] riscv: dts: sophgo: Add LicheeRV Nano board device tree

[Inochi Amaoto]

On Wed, Jun 12, 2024 at 10:02:36AM GMT, Thomas Bonnefille wrote:
> LicheeRV Nano B [1] is an embedded development platform based on the SOPHGO
> SG2002 chip, the B(ase) version is deprived of Wifi/Bluetooth and Ethernet.
> 
> Add only support for UART and SDHCI.
> 
> Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html [1]
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
>  arch/riscv/boot/dts/sophgo/Makefile                |  1 +
>  .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts     | 53 ++++++++++++++++++++++
>  2 files changed, 54 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile
> index 57ad82a61ea6..47d4243a8f35 100644
> --- a/arch/riscv/boot/dts/sophgo/Makefile
> +++ b/arch/riscv/boot/dts/sophgo/Makefile
> @@ -1,4 +1,5 @@
>  # SPDX-License-Identifier: GPL-2.0
>  dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb
>  dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb
> +dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb
>  dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
> diff --git a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
> new file mode 100644
> index 000000000000..d011fb15b097
> --- /dev/null
> +++ b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
> @@ -0,0 +1,53 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> + */
> +
> +/dts-v1/;
> +
> +#include "sg2002.dtsi"
> +
> +/ {
> +	model = "LicheeRV Nano B";
> +	compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";
> +
> +	aliases {
> +		gpio0 = &gpio0;
> +		gpio1 = &gpio1;
> +		gpio2 = &gpio2;
> +		gpio3 = &gpio3;
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +		serial2 = &uart2;
> +		serial3 = &uart3;
> +		serial4 = &uart4;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +};
> +
> +&osc {
> +	clock-frequency = <25000000>;
> +};
> +
> +&sdhci0 {
> +	status = "okay";
> +	bus-width = <4>;
> +	no-1-8-v;
> +	no-mmc;
> +	no-sdio;
> +};

Please add "disable-wp" property. Otherwise the card will be
probed as read-only.

> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&uart1 {
> +	status = "okay";
> +};
> +
> +&i2c0 {
> +	status = "okay";
> +};
> 
> -- 
> 2.45.2
>