From: Judith Mendez <jm@ti.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
William Breathitt Gray <wbg@kernel.org>,
Nishanth Menon <nm@ti.com>
Cc: <linux-iio@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
David Lechner <david@lechnology.com>
Subject: [PATCH v5 7/8] arm64: dts: ti: k3-am64x-sk: Enable eQEP
Date: Wed, 12 Jun 2024 08:55:37 -0500 [thread overview]
Message-ID: <20240612135538.2447938-8-jm@ti.com> (raw)
In-Reply-To: <20240612135538.2447938-1-jm@ti.com>
There are 3 instances of eQEP on AM64x. Only EQEP0 signals
can be routed to the user expansion so enable only EQEP0
in k3-am642-sk.dts.
Signed-off-by: Judith Mendez <jm@ti.com>
---
Changes since v4:
- No change
---
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 5b028b3a3192f..1992444953745 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -357,6 +357,16 @@ main_ecap0_pins_default: main-ecap0-default-pins {
AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
>;
};
+
+ main_eqep0_pins_default: main-eqep0-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */
+ AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */
+ AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */
+ AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */
+ >;
+ };
+
main_wlan_en_pins_default: main-wlan-en-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
@@ -672,3 +682,10 @@ &ecap0 {
pinctrl-names = "default";
pinctrl-0 = <&main_ecap0_pins_default>;
};
+
+&eqep0 {
+ status = "okay";
+ /* EQEP0 A & B available on pins 18 & 22 of J4 header */
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_eqep0_pins_default>;
+};
--
2.45.1
next prev parent reply other threads:[~2024-06-12 13:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-12 13:55 [PATCH v5 0/8] Enable eQEP DT support for Sitara K3 platforms Judith Mendez
2024-06-12 13:55 ` [PATCH v5 1/8] dt-bindings: counter: Add new ti,am62-eqep compatible Judith Mendez
2024-06-26 22:42 ` William Breathitt Gray
2024-06-27 7:31 ` Krzysztof Kozlowski
2024-06-12 13:55 ` [PATCH v5 2/8] counter/ti-eqep: Add new ti-am62-eqep compatible Judith Mendez
2024-06-12 13:55 ` [PATCH v5 3/8] arm64: dts: ti: k3-am62-main: Add eQEP nodes Judith Mendez
2024-06-12 13:55 ` [PATCH v5 4/8] arm64: dts: ti: k3-am62a-main: " Judith Mendez
2024-06-12 13:55 ` [PATCH v5 5/8] arm64: dts: ti: k3-am62p-main: " Judith Mendez
2024-06-12 13:55 ` [PATCH v5 6/8] arm64: dts: ti: k3-am64-main: " Judith Mendez
2024-06-12 13:55 ` Judith Mendez [this message]
2024-06-12 13:55 ` [PATCH v5 8/8] counter: ti-eqep: Allow eQEP driver to be built for K3 devices Judith Mendez
2024-07-01 2:38 ` [PATCH v5 0/8] Enable eQEP DT support for Sitara K3 platforms William Breathitt Gray
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