* [PATCH v3 0/5] Communication Interface to NXP secure-enclave HW IP like Edgelock Enclave
@ 2024-06-17 7:29 Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 1/5] Documentation/firmware: add imx/se to other_interfaces Pankaj Gupta
` (4 more replies)
0 siblings, 5 replies; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-17 7:29 UTC (permalink / raw)
To: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Pankaj Gupta, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc, linux-kernel, devicetree, imx, linux-arm-kernel
Hardware interface of the NXP Secure Enclave HW IP(s) like EdgeLock Enclave,
V2X, SHE etc, is based on the Messaging Unit module that enables processing
elements like ARMv8 core, RISC V core, within the SoC to communicate and
coordinate by passing messages (e.g., data, status and control) through
these interfaces.
The NXP i.MX secure enclaves hardware interface kernel driver, is specifically
targeted for use between application core and NXP secure-enclave(s) HW. It allows
to send/receive messages to/from the secure-enclave.
Patch-set adds the kernel driver for communication interface to secure-enclave,
for exchanging messages with NXP secure enclave HW IP(s) like EdgeLock Enclave,
both from:
- User-Space Applications via character driver.
- Kernel-space, used by kernel management layers like DM-Crypt.
To: Jonathan Corbet <corbet@lwn.net>
To: Rob Herring <robh+dt@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Shawn Guo <shawnguo@kernel.org>
To: Sascha Hauer <s.hauer@pengutronix.de>
To: Pengutronix Kernel Team <kernel@pengutronix.de>
To: Fabio Estevam <festevam@gmail.com>
To: Rob Herring <robh@kernel.org>
Cc: linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Changes in v3:
5/5:
- Initialize tx_msg with NULL.
- memdup_user() returns an error pointer, not NULL. correct it by adding check for err_ptr.
- new IOCTL is added to send & recieve the message.
- replaced the while loop till list is empty, with list_for_each_entry.
- replaced __list_del_entry, with list_del.
- Removed the dev_err message from copy to user.
- Removed the casting of void *.
- corrected the typcasting in copy to user.
- removed un-necessary goto statement.
- Removed dead code for clean-up of memory.
- Removed un-mapping of secured memory
- Passing se_if_priv structure to init_device_context.
- Updated the below check to replace io.length with round_up(io.length).
if (shared_mem->size < shared_mem->pos|| io.length >= shared_mem->size - shared_mem->pos)
- Created a function to cleanup the list of shared memory buffers.
- Used list_for_each_entry_safe(). created a separate functions: se_dev_ctx_cpy_out_data() & se_dev_ctx_shared_mem_cleanup()
4/5
- Changed the compatible string to replace "-ele", to "-se".
- Declaration of imx_se_node_info, is done as const in the whole file
- Remove the unused macros from ele_base_msg.h
- Remove the function declaration get_phy_buf_mem_pool1, from the header file.
- Replace the use of dmam_alloc_coherent to dma_alloc_coherent
- Check for function pointer, before calling the fucntion pointer in imx_fetch_se_soc_info
- Removed the unused flag for SE_MU_IO_FLAGS_USE_SEC_MEM.
- Removed the unused macros WORD_SZ
- instead of struct device *dev, struct se_if_priv *priv, is used as argument to the funtions:se_save_imem_state, se_restore_imem_state, imx_fetch_se_soc_info
- Removed ret from validate_rsp_hdr.
- changed the prefix of the funtion: plat_add_msg_crc and plat_fill_cmd_msg_hdr.
- indentation correction for info structures.
- remove the check for priv not null from se_if_probe_cleanup
- Removed the casting of void *.
- se_load_firmware function is corrected for not freeing the buffer when allocation fails.
- Checking if get_imx_se_node_info() can return NULL, in se_if_probe()
- imem.size has type u32. return value from se_save_imem_state() will be assigned to imem.size in case of success only.
- removed the flag un-setting in case of failure. priv->flags &= (~RESERVED_DMA_POOL);
- removed the function call for devm_of_platform_populate(dev);
- Checking for not-NULL, before calling the funtion pointer se_fetch_soc_info.
- Removed the checking for reserved memory flag, before freeing up the reserved memory, in se_probe_if_cleanup.
3/5
- Changed the compatible string to replace "-ele", to "-se".
2/5
- to fix the warning error, replaced the "-ele" & "-v2x" in compatible string, to "-se".
- Added an example for ele@0 for compatible string "fsl,imx95-se"
Changes in v2:
4/4
- Split this patch into two: 1. base driver & 2. Miscdev
- Initialize the return variable "err" as 0, before calling 'return err', in the file ele_common.c
- Fix the usage of un-iniitialized pointer variable, by initializing them with NULL, in ele_base_msg.c.
- Fix initializing the ret variable, to return the correct error code in case of issue.
- replaced dmam_alloc_coherent with dma_alloc_coherent.
- Replace the use of ELE_GET_INFO_READ_SZ, with sizeof(soc_info).
- Replaced -1 with -EPERM
- Removed the safety check on func-input param, in ele_get_info().
- fix the assigning data[1] with lower 32 address, rather than zero, for ele_fw_authenticate API.
- Correctly initializing the function's return error code, for file ele_base_msg.c.
- replaced 'return' with 'goto'.
- Use length in bytes.
- Corrected the structure se_msg_hdr.
- Moved setting of rx_msg to priv, into the function imx_ele_msg_send_rcv
- Will add lockdep_assert_held, to receive path, in v2.
- corrected the spacing at "ret = validate_rsp_hdr"
- FIELD_GET() used for RES_STATUS
- Re-write the structure soc_info, matching the information provided in response to this api.
- The "|" goes to the end of the previous line.
- Moved the locking and unlocking of the command lock to the caller of the function.
- removed the safety check for device private data.
- Structure memory reference, used to read message header.
- In the interrupt call back function, remove assigning waiting_rsp_dev to NULL, in case of response message rcv from FW.
- do while removed.
- replaced BIT(1) for RESERVED_DMA_POOL, to BIT(0)
- The backslash is removed while assigning the file name with absolute path to structure variable.fw_name_in_rfs =.
- Update the 'if' condition by removing "idx < 0".
- mbox_request_channel_byname() uses a "char" for the name not a u8. Corrected.
- devm managed resources, are not cleaned now, in function se_probe_if_cleanup
- Used dev_err_probe().
- Used %pe to print error string.
- remove "__maybe_unused" for "struct platform_device *enum_plat_dev __maybe_unused;"
- used FIELD_GET(), for RES_STATUS. Removed the use of MSG_TAG, MSG_COMMAND, MSG_SIZE, MSG_VER.
- Depricated the used of member of struct se_if_priv, bool no_dev_ctx_used;
- Moved the text explaing the synchronization logic via mutexes, from patch 1/4 to se_ctrl.h.
- removed the type casting of info_list = (struct imx_se_node_info_list *) device_get_match_data(dev->parent);
- Used static variable priv->soc_rev in the se_ctrl.c, replaced the following condition: if (info_list->soc_rev) to if (priv->soc_rev) for checking if this flow is already executed or not.
- imx_fetch_soc_info will return failure if the get_info function fails.
- Removed devm_free from imx_fetch_soc_info too.
3/3
- Made changes to move all the properties to parent node, without any child node.
2/4
- Use Hex pattern string.
- Move the properties to parent node, with no child node.
- Add i.MX95-ele to compatible nodes to fix the warning "/example-2/v2x: failed to match any schema with compatible: ['fsl,imx95-v2x']"
1/1
- Corrected the spelling from creats to creates.
- drop the braces around the plural 's' for interfaces
- written se in upper case SE.
- Replace "multiple message(s)" with messages.
- Removed too much details about locks.
Testing
- make CHECK_DTBS=y freescale/imx8ulp-evk.dtb;
- make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- -j8 dt_binding_check DT_SCHEMA_FILES=fsl,imx-se.yaml
- make C=1 CHECK=scripts/coccicheck drivers/firmware/imx/*.* W=1 > r.txt
- ./scripts/checkpatch.pl --git <>..HEAD
- Tested the Image and .dtb, on the i.MX8ULP.
Reference
- Link to v1: https://lore.kernel.org/r/20240510-imx-se-if-v1-0-27c5a674916d@nxp.com
- Link to v2: https://lore.kernel.org/r/20240523-imx-se-if-v2-0-5a6fd189a539@nxp.com
---
Pankaj Gupta (5):
Documentation/firmware: add imx/se to other_interfaces
dt-bindings: arm: fsl: add imx-se-fw binding doc
arm64: dts: imx8ulp-evk: add nxp secure enclave firmware
firmware: imx: add driver for NXP EdgeLock Enclave
firmware: imx: adds miscdev
Documentation/ABI/testing/se-cdev | 42 +
.../devicetree/bindings/firmware/fsl,imx-se.yaml | 160 +++
.../driver-api/firmware/other_interfaces.rst | 119 ++
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 17 +-
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 14 +-
drivers/firmware/imx/Kconfig | 12 +
drivers/firmware/imx/Makefile | 2 +
drivers/firmware/imx/ele_base_msg.c | 284 +++++
drivers/firmware/imx/ele_base_msg.h | 90 ++
drivers/firmware/imx/ele_common.c | 382 ++++++
drivers/firmware/imx/ele_common.h | 49 +
drivers/firmware/imx/se_ctrl.c | 1230 ++++++++++++++++++++
drivers/firmware/imx/se_ctrl.h | 148 +++
include/linux/firmware/imx/se_api.h | 14 +
include/uapi/linux/se_ioctl.h | 94 ++
15 files changed, 2654 insertions(+), 3 deletions(-)
---
base-commit: b63ff26648537a5600cf79bd62f916792c53e015
change-id: 20240507-imx-se-if-a40055093dc6
Best regards,
--
Pankaj Gupta <pankaj.gupta@nxp.com>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 1/5] Documentation/firmware: add imx/se to other_interfaces
2024-06-17 7:29 [PATCH v3 0/5] Communication Interface to NXP secure-enclave HW IP like Edgelock Enclave Pankaj Gupta
@ 2024-06-17 7:29 ` Pankaj Gupta
2024-06-18 21:13 ` Randy Dunlap
2024-06-17 7:29 ` [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc Pankaj Gupta
` (3 subsequent siblings)
4 siblings, 1 reply; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-17 7:29 UTC (permalink / raw)
To: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Pankaj Gupta, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc, linux-kernel, devicetree, imx, linux-arm-kernel
Documents i.MX SoC's Service layer and C_DEV driver for selected SoC(s)
that contains the NXP hardware IP(s) for secure-enclaves(se) like:
- NXP EdgeLock Enclave on i.MX93 & i.MX8ULP
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
---
.../driver-api/firmware/other_interfaces.rst | 119 +++++++++++++++++++++
1 file changed, 119 insertions(+)
diff --git a/Documentation/driver-api/firmware/other_interfaces.rst b/Documentation/driver-api/firmware/other_interfaces.rst
index 06ac89adaafb..65e69396e22a 100644
--- a/Documentation/driver-api/firmware/other_interfaces.rst
+++ b/Documentation/driver-api/firmware/other_interfaces.rst
@@ -49,3 +49,122 @@ of the requests on to a secure monitor (EL3).
.. kernel-doc:: drivers/firmware/stratix10-svc.c
:export:
+
+NXP Secure Enclave Firmware Interface
+=====================================
+
+Introduction
+------------
+The NXP's i.MX HW IP like EdgeLock-Enclave, V2X etc., creates an embedded secure
+enclave within the SoC boundary to enable features like
+ - Hardware Security Module (HSM)
+ - Security Hardware Extension (SHE)
+ - Vehicular to Anything (V2X)
+
+Each of the above feature, is enabled through dedicated NXP H/W IP on the SoC.
+On a single SoC, multiple hardware IP (or can say more than one secure enclave)
+can exists.
+
+NXP SoCs enabled with the such secure enclaves(SEs) IPs are:
+i.MX93, i.MX8ULP
+
+To communicate with one or more co-existing SE(s) on SoC, there is/are dedicated
+messaging units(MU) per SE. Each co-existing 'se' can have one or multiple exclusive
+MU(s), dedicated to itself. None of the MU is shared between two SEs.
+Communication of the MU is realized using the Linux mailbox driver.
+
+NXP Secure Enclave(SE) Interface
+--------------------------------
+All those SE interfaces 'se-if' that is/are dedicated to a particular SE, will be
+enumerated and provisioned under the very single 'SE' node.
+
+Each 'se-if', comprise of twp layers:
+- (C_DEV Layer) User-Space software-access interface.
+- (Service Layer) OS-level software-access interface.
+
+ +--------------------------------------------+
+ | Character Device(C_DEV) |
+ | |
+ | +---------+ +---------+ +---------+ |
+ | | misc #1 | | misc #2 | ... | misc #n | |
+ | | dev | | dev | | dev | |
+ | +---------+ +---------+ +---------+ |
+ | +-------------------------+ |
+ | | Misc. Dev Synchr. Logic | |
+ | +-------------------------+ |
+ | |
+ +--------------------------------------------+
+
+ +--------------------------------------------+
+ | Service Layer |
+ | |
+ | +-----------------------------+ |
+ | | Message Serialization Logic | |
+ | +-----------------------------+ |
+ | +---------------+ |
+ | | imx-mailbox | |
+ | | mailbox.c | |
+ | +---------------+ |
+ | |
+ +--------------------------------------------+
+
+- service layer:
+ This layer is responsible for ensuring the communication protocol, that is defined
+ for communication with firmware.
+
+ FW Communication protocol ensures two things:
+ - Serializing the messages to be sent over an MU.
+
+ - FW can handle one command-message at a time.
+
+- c_dev:
+ This layer offers character device contexts, created as '/dev/<se>_mux_chx'.
+ Using these multiple device contexts, that are getting multiplexed over a single MU,
+ user-space application(s) can call fops like write/read to send the command-message,
+ and read back the command-response-message to/from Firmware.
+ fops like read & write uses the above defined service layer API(s) to communicate with
+ Firmware.
+
+ Misc-device(/dev/<se>_mux_chn) synchronization protocol:
+
+ Non-Secure + Secure
+ |
+ |
+ +---------+ +-------------+ |
+ | se_fw.c +<---->+imx-mailbox.c| |
+ | | | mailbox.c +<-->+------+ +------+
+ +---+-----+ +-------------+ | MU X +<-->+ ELE |
+ | +------+ +------+
+ +----------------+ |
+ | | |
+ v v |
+ logical logical |
+ receiver waiter |
+ + + |
+ | | |
+ | | |
+ | +----+------+ |
+ | | | |
+ | | | |
+ device_ctx device_ctx device_ctx |
+ |
+ User 0 User 1 User Y |
+ +------+ +------+ +------+ |
+ |misc.c| |misc.c| |misc.c| |
+ kernel space +------+ +------+ +------+ |
+ |
+ +------------------------------------------------------ |
+ | | | |
+ userspace /dev/ele_muXch0 | | |
+ /dev/ele_muXch1 | |
+ /dev/ele_muXchY |
+ |
+
+When a user sends a command to the firmware, it registers its device_ctx
+as waiter of a response from firmware.
+
+Enclave's Firmware owns the storage management, over linux filesystem.
+For this c_dev provisions a dedicated slave device called "receiver".
+
+.. kernel-doc:: drivers/firmware/imx/se_fw.c
+ :export:
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
2024-06-17 7:29 [PATCH v3 0/5] Communication Interface to NXP secure-enclave HW IP like Edgelock Enclave Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 1/5] Documentation/firmware: add imx/se to other_interfaces Pankaj Gupta
@ 2024-06-17 7:29 ` Pankaj Gupta
2024-06-17 16:37 ` Conor Dooley
2024-06-17 7:29 ` [PATCH v3 3/5] arm64: dts: imx8ulp-evk: add nxp secure enclave firmware Pankaj Gupta
` (2 subsequent siblings)
4 siblings, 1 reply; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-17 7:29 UTC (permalink / raw)
To: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Pankaj Gupta, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc, linux-kernel, devicetree, imx, linux-arm-kernel
The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X etc.,
creates an embedded secure enclave within the SoC boundary to enable
features like:
- HSM
- SHE
- V2X
Secure-Enclave(s) communication interface are typically via message
unit, i.e., based on mailbox linux kernel driver. This driver enables
communication ensuring well defined message sequence protocol between
Application Core and enclave's firmware.
Driver configures multiple misc-device on the MU, for multiple
user-space applications, to be able to communicate over single MU.
It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
---
.../devicetree/bindings/firmware/fsl,imx-se.yaml | 160 +++++++++++++++++++++
1 file changed, 160 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
new file mode 100644
index 000000000000..60ad1c4a3dfa
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
@@ -0,0 +1,160 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
+
+maintainers:
+ - Pankaj Gupta <pankaj.gupta@nxp.com>
+
+description: |
+ NXP's SoC may contain one or multiple embedded secure-enclave HW
+ IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
+ enables features like
+ - Hardware Security Module (HSM),
+ - Security Hardware Extension (SHE), and
+ - Vehicular to Anything (V2X)
+
+ Communication interface to the secure-enclaves is based on the
+ messaging unit(s).
+
+properties:
+ $nodename:
+ pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
+
+ compatible:
+ enum:
+ - fsl,imx8ulp-se
+ - fsl,imx93-se
+ - fsl,imx95-se
+
+ reg:
+ maxItems: 1
+ description: Identifier of the communication interface to secure-enclave.
+
+ mboxes:
+ description: contain a list of phandles to mailboxes.
+ items:
+ - description: Specify the mailbox used to send message to se firmware
+ - description: Specify the mailbox used to receive message from se firmware
+
+ mbox-names:
+ items:
+ - const: tx
+ - const: rx
+ - const: txdb
+ - const: rxdb
+ minItems: 2
+
+ memory-region:
+ description: contains a list of phandles to reserved external memory.
+ items:
+ - description: It is used by secure-enclave firmware. It is an optional
+ property based on compatible and identifier to communication interface.
+ (see bindings/reserved-memory/reserved-memory.txt)
+
+ sram:
+ description: contains a list of phandles to sram.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - description: Phandle to the device SRAM. It is an optional property
+ based on compatible and identifier to communication interface.
+
+allOf:
+ # memory-region
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8ulp-se
+ - fsl,imx93-se
+ then:
+ required:
+ - memory-region
+ else:
+ not:
+ required:
+ - memory-region
+
+ # sram
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8ulp-se
+ then:
+ required:
+ - sram
+ else:
+ not:
+ required:
+ - sram
+
+required:
+ - compatible
+ - reg
+ - mboxes
+ - mbox-names
+
+additionalProperties: false
+
+examples:
+ - |
+ firmware {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ele-if@0 {
+ compatible = "fsl,imx8ulp-se";
+ reg = <0x0>;
+ mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
+ mbox-names = "tx", "rx";
+ sram = <&sram0>;
+ memory-region = <&ele_reserved>;
+ };
+ };
+ - |
+ firmware {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ele-if@0 {
+ compatible = "fsl,imx93-se";
+ reg = <0x0>;
+ mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
+ mbox-names = "tx", "rx";
+ memory-region = <&ele_reserved>;
+ };
+ };
+ - |
+ firmware {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ele-if@0 {
+ compatible = "fsl,imx95-se";
+ reg = <0x0>;
+ mboxes = <&ele_mu0 0 0>, <&ele_mu0 1 0>;
+ mbox-names = "tx", "rx";
+ };
+ v2x-if@3 {
+ compatible = "fsl,imx95-se";
+ reg = <0x3>;
+ mboxes = <&v2x_mu 0 0>, <&v2x_mu 1 0>;
+ mbox-names = "tx", "rx";
+ };
+ v2x-if@4 {
+ compatible = "fsl,imx95-se";
+ reg = <0x4>;
+ mboxes = <&v2x_mu6 0 0>, <&v2x_mu6 1 0>;
+ mbox-names = "tx", "rx";
+ };
+ v2x-if@5 {
+ compatible = "fsl,imx95-se";
+ reg = <0x5>;
+ mboxes = <&v2x_mu7 0 0>, <&v2x_mu7 1 0>;
+ mbox-names = "tx", "rx";
+ };
+ };
+...
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 3/5] arm64: dts: imx8ulp-evk: add nxp secure enclave firmware
2024-06-17 7:29 [PATCH v3 0/5] Communication Interface to NXP secure-enclave HW IP like Edgelock Enclave Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 1/5] Documentation/firmware: add imx/se to other_interfaces Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc Pankaj Gupta
@ 2024-06-17 7:29 ` Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 5/5] firmware: imx: adds miscdev Pankaj Gupta
4 siblings, 0 replies; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-17 7:29 UTC (permalink / raw)
To: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Pankaj Gupta, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc, linux-kernel, devicetree, imx, linux-arm-kernel
Add support for NXP secure enclave called EdgeLock Enclave
firmware (se-fw) for imx8ulp-evk.
EdgeLock Enclave has a hardware limitation of restricted access to DDR
address: 0x80000000 to 0xAFFFFFFF, so reserve 1MB of DDR memory region
from 0x80000000.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 17 ++++++++++++++++-
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 14 ++++++++++++--
2 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 24bb253b938d..ca8958f28a83 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Copyright 2021 NXP
+ * Copyright 2021, 2024 NXP
*/
/dts-v1/;
@@ -19,6 +19,17 @@ memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0 0x80000000>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ele_reserved: ele-reserved@90000000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x90000000 0 0x100000>;
+ no-map;
+ };
+ };
reserved-memory {
#address-cells = <2>;
@@ -146,6 +157,10 @@ &usdhc0 {
status = "okay";
};
+&ele_if0 {
+ memory-region = <&ele_reserved>;
+};
+
&fec {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_enet>;
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index c460afaa76f5..1725a243521d 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Copyright 2021 NXP
+ * Copyright 2021, 2024 NXP
*/
#include <dt-bindings/clock/imx8ulp-clock.h>
@@ -152,7 +152,7 @@ sosc: clock-sosc {
#clock-cells = <0>;
};
- sram@2201f000 {
+ sram0: sram@2201f000 {
compatible = "mmio-sram";
reg = <0x0 0x2201f000 0x0 0x1000>;
@@ -167,6 +167,8 @@ scmi_buf: scmi-sram-section@0 {
};
firmware {
+ #address-cells = <1>;
+ #size-cells = <0>;
scmi {
compatible = "arm,scmi-smc";
arm,smc-id = <0xc20000fe>;
@@ -184,6 +186,14 @@ scmi_sensor: protocol@15 {
#thermal-sensor-cells = <1>;
};
};
+
+ ele_if0: ele-if@0 {
+ compatible = "fsl,imx8ulp-se";
+ reg = <0x0>;
+ mbox-names = "tx", "rx";
+ mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
+ sram = <&sram0>;
+ };
};
cm33: remoteproc-cm33 {
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave
2024-06-17 7:29 [PATCH v3 0/5] Communication Interface to NXP secure-enclave HW IP like Edgelock Enclave Pankaj Gupta
` (2 preceding siblings ...)
2024-06-17 7:29 ` [PATCH v3 3/5] arm64: dts: imx8ulp-evk: add nxp secure enclave firmware Pankaj Gupta
@ 2024-06-17 7:29 ` Pankaj Gupta
2024-06-18 8:31 ` Sascha Hauer
2024-06-17 7:29 ` [PATCH v3 5/5] firmware: imx: adds miscdev Pankaj Gupta
4 siblings, 1 reply; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-17 7:29 UTC (permalink / raw)
To: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Pankaj Gupta, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc, linux-kernel, devicetree, imx, linux-arm-kernel
NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE),
are embedded in the SoC to support the features like HSM, SHE & V2X,
using message based communication interface.
The secure enclave FW communicates on a dedicated messaging unit(MU)
based interface(s) with application core, where kernel is running.
It exists on specific i.MX processors. e.g. i.MX8ULP, i.MX93.
This patch adds the driver for communication interface to secure-enclave,
for exchanging messages with NXP secure enclave HW IP(s) like EdgeLock
Enclave (ELE) from Kernel-space, used by kernel management layers like
- DM-Crypt.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
---
drivers/firmware/imx/Kconfig | 12 +
drivers/firmware/imx/Makefile | 2 +
drivers/firmware/imx/ele_base_msg.c | 284 +++++++++++++++++++
drivers/firmware/imx/ele_base_msg.h | 90 ++++++
drivers/firmware/imx/ele_common.c | 233 ++++++++++++++++
drivers/firmware/imx/ele_common.h | 45 +++
drivers/firmware/imx/se_ctrl.c | 536 ++++++++++++++++++++++++++++++++++++
drivers/firmware/imx/se_ctrl.h | 99 +++++++
include/linux/firmware/imx/se_api.h | 14 +
9 files changed, 1315 insertions(+)
diff --git a/drivers/firmware/imx/Kconfig b/drivers/firmware/imx/Kconfig
index 183613f82a11..56bdca9bd917 100644
--- a/drivers/firmware/imx/Kconfig
+++ b/drivers/firmware/imx/Kconfig
@@ -22,3 +22,15 @@ config IMX_SCU
This driver manages the IPC interface between host CPU and the
SCU firmware running on M4.
+
+config IMX_SEC_ENCLAVE
+ tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave Firmware driver."
+ depends on IMX_MBOX && ARCH_MXC && ARM64
+ default m if ARCH_MXC
+
+ help
+ It is possible to use APIs exposed by the iMX Secure Enclave HW IP called:
+ - EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93),
+ like base, HSM, V2X & SHE using the SAB protocol via the shared Messaging
+ Unit. This driver exposes these interfaces via a set of file descriptors
+ allowing to configure shared memory, send and receive messages.
diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile
index 8f9f04a513a8..aa9033e0e9e3 100644
--- a/drivers/firmware/imx/Makefile
+++ b/drivers/firmware/imx/Makefile
@@ -1,3 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_IMX_DSP) += imx-dsp.o
obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o imx-scu-soc.o
+sec_enclave-objs = se_ctrl.o ele_common.o ele_base_msg.o
+obj-${CONFIG_IMX_SEC_ENCLAVE} += sec_enclave.o
diff --git a/drivers/firmware/imx/ele_base_msg.c b/drivers/firmware/imx/ele_base_msg.c
new file mode 100644
index 000000000000..5bfd9c7e3f7e
--- /dev/null
+++ b/drivers/firmware/imx/ele_base_msg.c
@@ -0,0 +1,284 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2024 NXP
+ */
+
+#include <linux/types.h>
+#include <linux/completion.h>
+#include <linux/dma-mapping.h>
+
+#include "ele_base_msg.h"
+#include "ele_common.h"
+
+int ele_get_info(struct device *dev, struct ele_dev_info *s_info)
+{
+ struct se_if_priv *priv = dev_get_drvdata(dev);
+ struct se_api_msg *tx_msg __free(kfree) = NULL;
+ struct se_api_msg *rx_msg __free(kfree) = NULL;
+ phys_addr_t get_info_addr = 0;
+ u32 *get_info_data = NULL;
+ u32 status;
+ int ret = 0;
+
+ memset(s_info, 0x0, sizeof(*s_info));
+
+ if (priv->mem_pool_name)
+ get_info_data = get_phy_buf_mem_pool(dev,
+ priv->mem_pool_name,
+ &get_info_addr,
+ ELE_GET_INFO_BUFF_SZ);
+ else
+ get_info_data = dma_alloc_coherent(dev,
+ ELE_GET_INFO_BUFF_SZ,
+ &get_info_addr,
+ GFP_KERNEL);
+ if (!get_info_data) {
+ ret = -ENOMEM;
+ dev_dbg(dev,
+ "%s: Failed to allocate get_info_addr.\n",
+ __func__);
+ goto exit;
+ }
+
+ tx_msg = kzalloc(ELE_GET_INFO_REQ_MSG_SZ, GFP_KERNEL);
+ if (!tx_msg) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+
+ rx_msg = kzalloc(ELE_GET_INFO_RSP_MSG_SZ, GFP_KERNEL);
+ if (!rx_msg) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+
+ ret = imx_se_fill_cmd_msg_hdr(priv,
+ (struct se_msg_hdr *)&tx_msg->header,
+ ELE_GET_INFO_REQ,
+ ELE_GET_INFO_REQ_MSG_SZ,
+ true);
+ if (ret)
+ goto exit;
+
+ tx_msg->data[0] = upper_32_bits(get_info_addr);
+ tx_msg->data[1] = lower_32_bits(get_info_addr);
+ tx_msg->data[2] = sizeof(struct ele_dev_info);
+ ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
+ if (ret < 0)
+ goto exit;
+
+ ret = validate_rsp_hdr(priv,
+ &priv->rx_msg->header,
+ ELE_GET_INFO_REQ,
+ ELE_GET_INFO_RSP_MSG_SZ,
+ true);
+ if (ret)
+ goto exit;
+
+ status = RES_STATUS(priv->rx_msg->data[0]);
+ if (status != priv->success_tag) {
+ dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
+ ELE_GET_INFO_REQ, status);
+ ret = -EPERM;
+ }
+
+ memcpy(s_info, get_info_data, sizeof(struct ele_dev_info));
+
+exit:
+ if (get_info_addr) {
+ if (priv->mem_pool_name)
+ free_phybuf_mem_pool(dev, priv->mem_pool_name,
+ get_info_data, ELE_GET_INFO_BUFF_SZ);
+ else
+ dma_free_coherent(dev,
+ ELE_GET_INFO_BUFF_SZ,
+ get_info_data,
+ get_info_addr);
+ }
+
+ return ret;
+}
+
+int ele_fetch_soc_info(struct device *dev, u16 *soc_rev, u64 *serial_num)
+{
+ struct ele_dev_info s_info = {0};
+ int err = 0;
+
+ err = ele_get_info(dev, &s_info);
+ if (err < 0) {
+ dev_err(dev, "Error");
+ return err;
+ }
+
+ *soc_rev = s_info.d_info.soc_rev;
+ *serial_num = GET_SERIAL_NUM_FROM_UID(s_info.d_info.uid, MAX_UID_SIZE >> 2);
+
+ return err;
+}
+
+int ele_ping(struct device *dev)
+{
+ struct se_if_priv *priv = dev_get_drvdata(dev);
+ struct se_api_msg *tx_msg __free(kfree) = NULL;
+ struct se_api_msg *rx_msg __free(kfree) = NULL;
+ u32 status;
+ int ret = 0;
+
+ tx_msg = kzalloc(ELE_PING_REQ_SZ, GFP_KERNEL);
+ if (!tx_msg) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+
+ rx_msg = kzalloc(ELE_PING_RSP_SZ, GFP_KERNEL);
+ if (!rx_msg) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+
+ ret = imx_se_fill_cmd_msg_hdr(priv,
+ (struct se_msg_hdr *)&tx_msg->header,
+ ELE_PING_REQ, ELE_PING_REQ_SZ, true);
+ if (ret) {
+ dev_err(dev, "Error: imx_se_fill_cmd_msg_hdr failed.\n");
+ goto exit;
+ }
+
+ ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
+ if (ret)
+ goto exit;
+
+ ret = validate_rsp_hdr(priv,
+ &priv->rx_msg->header,
+ ELE_PING_REQ,
+ ELE_PING_RSP_SZ,
+ true);
+ if (ret)
+ goto exit;
+
+ status = RES_STATUS(priv->rx_msg->data[0]);
+ if (status != priv->success_tag) {
+ dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
+ ELE_PING_REQ, status);
+ ret = -EPERM;
+ }
+exit:
+ return ret;
+}
+
+int ele_service_swap(struct device *dev,
+ phys_addr_t addr,
+ u32 addr_size, u16 flag)
+{
+ struct se_if_priv *priv = dev_get_drvdata(dev);
+ struct se_api_msg *tx_msg __free(kfree) = NULL;
+ struct se_api_msg *rx_msg __free(kfree) = NULL;
+ u32 status;
+ int ret = 0;
+
+ tx_msg = kzalloc(ELE_SERVICE_SWAP_REQ_MSG_SZ, GFP_KERNEL);
+ if (!tx_msg) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+
+ rx_msg = kzalloc(ELE_SERVICE_SWAP_RSP_MSG_SZ, GFP_KERNEL);
+ if (!rx_msg) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+
+ ret = imx_se_fill_cmd_msg_hdr(priv,
+ (struct se_msg_hdr *)&tx_msg->header,
+ ELE_SERVICE_SWAP_REQ,
+ ELE_SERVICE_SWAP_REQ_MSG_SZ, true);
+ if (ret)
+ goto exit;
+
+ tx_msg->data[0] = flag;
+ tx_msg->data[1] = addr_size;
+ tx_msg->data[2] = ELE_NONE_VAL;
+ tx_msg->data[3] = lower_32_bits(addr);
+ tx_msg->data[4] = imx_se_add_msg_crc((uint32_t *)&tx_msg[0],
+ ELE_SERVICE_SWAP_REQ_MSG_SZ);
+ ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
+ if (ret < 0)
+ goto exit;
+
+ ret = validate_rsp_hdr(priv,
+ &priv->rx_msg->header,
+ ELE_SERVICE_SWAP_REQ,
+ ELE_SERVICE_SWAP_RSP_MSG_SZ,
+ true);
+ if (ret)
+ goto exit;
+
+ status = RES_STATUS(priv->rx_msg->data[0]);
+ if (status != priv->success_tag) {
+ dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
+ ELE_SERVICE_SWAP_REQ, status);
+ ret = -EPERM;
+ } else {
+ if (flag == ELE_IMEM_EXPORT)
+ ret = priv->rx_msg->data[1];
+ else
+ ret = 0;
+ }
+exit:
+
+ return ret;
+}
+
+int ele_fw_authenticate(struct device *dev, phys_addr_t addr)
+{
+ struct se_if_priv *priv = dev_get_drvdata(dev);
+ struct se_api_msg *tx_msg __free(kfree) = NULL;
+ struct se_api_msg *rx_msg __free(kfree) = NULL;
+ u32 status;
+ int ret = 0;
+
+ tx_msg = kzalloc(ELE_FW_AUTH_REQ_SZ, GFP_KERNEL);
+ if (!tx_msg) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+
+ rx_msg = kzalloc(ELE_FW_AUTH_RSP_MSG_SZ, GFP_KERNEL);
+ if (!rx_msg) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+ ret = imx_se_fill_cmd_msg_hdr(priv,
+ (struct se_msg_hdr *)&tx_msg->header,
+ ELE_FW_AUTH_REQ,
+ ELE_FW_AUTH_REQ_SZ,
+ true);
+ if (ret)
+ goto exit;
+
+ tx_msg->data[0] = addr;
+ tx_msg->data[1] = addr >> 32;
+ tx_msg->data[2] = addr;
+
+ ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
+ if (ret < 0)
+ goto exit;
+
+ ret = validate_rsp_hdr(priv,
+ &priv->rx_msg->header,
+ ELE_FW_AUTH_REQ,
+ ELE_FW_AUTH_RSP_MSG_SZ,
+ true);
+ if (ret)
+ goto exit;
+
+ status = RES_STATUS(priv->rx_msg->data[0]);
+ if (status != priv->success_tag) {
+ dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
+ ELE_FW_AUTH_REQ, status);
+ ret = -EPERM;
+ }
+exit:
+
+ return ret;
+}
diff --git a/drivers/firmware/imx/ele_base_msg.h b/drivers/firmware/imx/ele_base_msg.h
new file mode 100644
index 000000000000..7838fe883810
--- /dev/null
+++ b/drivers/firmware/imx/ele_base_msg.h
@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2024 NXP
+ *
+ * Header file for the EdgeLock Enclave Base API(s).
+ */
+
+#ifndef ELE_BASE_MSG_H
+#define ELE_BASE_MSG_H
+
+#include <linux/device.h>
+#include <linux/types.h>
+
+#define WORD_SZ 4
+#define ELE_NONE_VAL 0x0
+
+#define ELE_GET_INFO_REQ 0xDA
+#define ELE_GET_INFO_REQ_MSG_SZ 0x10
+#define ELE_GET_INFO_RSP_MSG_SZ 0x08
+
+#define ELE_GET_INFO_BUFF_SZ 0x100
+
+#define DEFAULT_IMX_SOC_VER 0xA000
+#define SOC_VER_MASK 0xFFFF0000
+#define SOC_ID_MASK 0x0000FFFF
+
+#define MAX_UID_SIZE (16)
+#define DEV_GETINFO_ROM_PATCH_SHA_SZ (32)
+#define DEV_GETINFO_FW_SHA_SZ (32)
+#define DEV_GETINFO_OEM_SRKH_SZ (64)
+#define DEV_GETINFO_MIN_VER_MASK 0xFF
+#define DEV_GETINFO_MAJ_VER_MASK 0xFF00
+
+struct dev_info {
+ uint8_t cmd;
+ uint8_t ver;
+ uint16_t length;
+ uint16_t soc_id;
+ uint16_t soc_rev;
+ uint16_t lmda_val;
+ uint8_t ssm_state;
+ uint8_t dev_atts_api_ver;
+ uint8_t uid[MAX_UID_SIZE];
+ uint8_t sha_rom_patch[DEV_GETINFO_ROM_PATCH_SHA_SZ];
+ uint8_t sha_fw[DEV_GETINFO_FW_SHA_SZ];
+};
+
+struct dev_addn_info {
+ uint8_t oem_srkh[DEV_GETINFO_OEM_SRKH_SZ];
+ uint8_t trng_state;
+ uint8_t csal_state;
+ uint8_t imem_state;
+ uint8_t reserved2;
+};
+
+struct ele_dev_info {
+ struct dev_info d_info;
+ struct dev_addn_info d_addn_info;
+};
+
+#define GET_SERIAL_NUM_FROM_UID(x, uid_word_sz) \
+ (((u64)(((u32 *)(x))[(uid_word_sz) - 1]) << 32) | ((u32 *)(x))[0])
+
+#define ELE_PING_REQ 0x01
+#define ELE_PING_REQ_SZ 0x04
+#define ELE_PING_RSP_SZ 0x08
+
+#define ELE_SERVICE_SWAP_REQ 0xDF
+#define ELE_SERVICE_SWAP_REQ_MSG_SZ 0x18
+#define ELE_SERVICE_SWAP_RSP_MSG_SZ 0x0C
+#define ELE_IMEM_SIZE 0x10000
+#define ELE_IMEM_STATE_OK 0xCA
+#define ELE_IMEM_STATE_BAD 0xFE
+#define ELE_IMEM_STATE_WORD 0x27
+#define ELE_IMEM_STATE_MASK 0x00ff0000
+#define ELE_IMEM_EXPORT 0x1
+#define ELE_IMEM_IMPORT 0x2
+
+#define ELE_FW_AUTH_REQ 0x02
+#define ELE_FW_AUTH_REQ_SZ 0x10
+#define ELE_FW_AUTH_RSP_MSG_SZ 0x08
+
+int ele_get_info(struct device *dev, struct ele_dev_info *s_info);
+int ele_fetch_soc_info(struct device *dev, u16 *soc_rev, u64 *serial_num);
+int ele_ping(struct device *dev);
+int ele_service_swap(struct device *dev,
+ phys_addr_t addr,
+ u32 addr_size, u16 flag);
+int ele_fw_authenticate(struct device *dev, phys_addr_t addr);
+#endif
diff --git a/drivers/firmware/imx/ele_common.c b/drivers/firmware/imx/ele_common.c
new file mode 100644
index 000000000000..0139748f7150
--- /dev/null
+++ b/drivers/firmware/imx/ele_common.c
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2024 NXP
+ */
+
+#include "ele_base_msg.h"
+#include "ele_common.h"
+
+u32 imx_se_add_msg_crc(u32 *msg, u32 msg_len)
+{
+ u32 nb_words = msg_len / (u32)sizeof(u32);
+ u32 crc = 0;
+ u32 i;
+
+ for (i = 0; i < nb_words - 1; i++)
+ crc ^= *(msg + i);
+
+ return crc;
+}
+
+int imx_ele_msg_rcv(struct se_if_priv *priv)
+{
+ u32 wait;
+ int err = 0;
+
+ lockdep_assert_held(&priv->se_if_cmd_lock);
+
+ wait = msecs_to_jiffies(1000);
+ if (!wait_for_completion_timeout(&priv->done, wait)) {
+ dev_err(priv->dev,
+ "Error: wait_for_completion timed out.\n");
+ err = -ETIMEDOUT;
+ }
+
+ return err;
+}
+
+int imx_ele_msg_send(struct se_if_priv *priv, void *tx_msg)
+{
+ struct se_msg_hdr *header;
+ int err;
+
+ header = (struct se_msg_hdr *) tx_msg;
+
+ if (header->tag == priv->cmd_tag)
+ lockdep_assert_held(&priv->se_if_cmd_lock);
+
+ scoped_guard(mutex, &priv->se_if_lock);
+
+ err = mbox_send_message(priv->tx_chan, tx_msg);
+ if (err < 0) {
+ dev_err(priv->dev, "Error: mbox_send_message failure.\n");
+ return err;
+ }
+
+ return err;
+}
+
+/* API used for send/receive blocking call. */
+int imx_ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, void *rx_msg)
+{
+ int err;
+
+ scoped_guard(mutex, &priv->se_if_cmd_lock);
+ if (priv->waiting_rsp_dev) {
+ dev_warn(priv->dev,
+ "There should be no misc dev-ctx, waiting for resp.\n");
+ priv->waiting_rsp_dev = NULL;
+ }
+ priv->rx_msg = rx_msg;
+ err = imx_ele_msg_send(priv, tx_msg);
+ if (err < 0)
+ goto exit;
+
+ err = imx_ele_msg_rcv(priv);
+
+exit:
+ return err;
+}
+
+/*
+ * Callback called by mailbox FW, when data is received.
+ */
+void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg)
+{
+ struct device *dev = mbox_cl->dev;
+ struct se_if_priv *priv;
+ struct se_msg_hdr *header;
+
+ priv = dev_get_drvdata(dev);
+
+ /* The function can be called with NULL msg */
+ if (!msg) {
+ dev_err(dev, "Message is invalid\n");
+ return;
+ }
+
+ header = (struct se_msg_hdr *) msg;
+
+ if (header->tag == priv->rsp_tag) {
+ if (!priv->waiting_rsp_dev) {
+ /*
+ * Reading the EdgeLock Enclave response
+ * to the command, sent by other
+ * linux kernel services.
+ */
+ spin_lock(&priv->lock);
+ memcpy(priv->rx_msg, msg, header->size << 2);
+
+ complete(&priv->done);
+ spin_unlock(&priv->lock);
+ return;
+ }
+ } else {
+ dev_err(dev, "Failed to select a device for message: %.8x\n",
+ *((u32 *) header));
+ return;
+ }
+}
+
+int validate_rsp_hdr(struct se_if_priv *priv,
+ struct se_msg_hdr *header,
+ uint8_t msg_id,
+ uint8_t sz,
+ bool is_base_api)
+{
+ if (header->tag != priv->rsp_tag) {
+ dev_err(priv->dev,
+ "MSG[0x%x] Hdr: Resp tag mismatch. (0x%x != 0x%x)",
+ msg_id, header->tag, priv->rsp_tag);
+ return -EINVAL;
+ }
+
+ if (header->command != msg_id) {
+ dev_err(priv->dev,
+ "MSG Header: Cmd id mismatch. (0x%x != 0x%x)",
+ header->command, msg_id);
+ return -EINVAL;
+ }
+
+ if (header->size != (sz >> 2)) {
+ dev_err(priv->dev,
+ "MSG[0x%x] Hdr: Cmd size mismatch. (0x%x != 0x%x)",
+ msg_id, header->size, (sz >> 2));
+ return -EINVAL;
+ }
+
+ if (is_base_api && (header->ver != priv->base_api_ver)) {
+ dev_err(priv->dev,
+ "MSG[0x%x] Hdr: Base API Vers mismatch. (0x%x != 0x%x)",
+ msg_id, header->ver, priv->base_api_ver);
+ return -EINVAL;
+ } else if (!is_base_api && header->ver != priv->fw_api_ver) {
+ dev_err(priv->dev,
+ "MSG[0x%x] Hdr: FW API Vers mismatch. (0x%x != 0x%x)",
+ msg_id, header->ver, priv->fw_api_ver);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+int se_save_imem_state(struct se_if_priv *priv)
+{
+ int ret;
+
+ /* EXPORT command will save encrypted IMEM to given address,
+ * so later in resume, IMEM can be restored from the given
+ * address.
+ *
+ * Size must be at least 64 kB.
+ */
+ ret = ele_service_swap(priv->dev,
+ priv->imem.phyaddr,
+ ELE_IMEM_SIZE,
+ ELE_IMEM_EXPORT);
+ if (ret < 0)
+ dev_err(priv->dev, "Failed to export IMEM\n");
+ else
+ dev_info(priv->dev,
+ "Exported %d bytes of encrypted IMEM\n",
+ ret);
+
+ return ret;
+}
+
+int se_restore_imem_state(struct se_if_priv *priv)
+{
+ struct ele_dev_info s_info;
+ int ret;
+
+ /* get info from ELE */
+ ret = ele_get_info(priv->dev, &s_info);
+ if (ret) {
+ dev_err(priv->dev, "Failed to get info from ELE.\n");
+ return ret;
+ }
+
+ /* Get IMEM state, if 0xFE then import IMEM */
+ if (s_info.d_addn_info.imem_state == ELE_IMEM_STATE_BAD) {
+ /* IMPORT command will restore IMEM from the given
+ * address, here size is the actual size returned by ELE
+ * during the export operation
+ */
+ ret = ele_service_swap(priv->dev,
+ priv->imem.phyaddr,
+ priv->imem.size,
+ ELE_IMEM_IMPORT);
+ if (ret) {
+ dev_err(priv->dev, "Failed to import IMEM\n");
+ goto exit;
+ }
+ } else
+ goto exit;
+
+ /* After importing IMEM, check if IMEM state is equal to 0xCA
+ * to ensure IMEM is fully loaded and
+ * ELE functionality can be used.
+ */
+ ret = ele_get_info(priv->dev, &s_info);
+ if (ret) {
+ dev_err(priv->dev, "Failed to get info from ELE.\n");
+ goto exit;
+ }
+
+ if (s_info.d_addn_info.imem_state == ELE_IMEM_STATE_OK)
+ dev_info(priv->dev, "Successfully restored IMEM\n");
+ else
+ dev_err(priv->dev, "Failed to restore IMEM\n");
+
+exit:
+ return ret;
+}
diff --git a/drivers/firmware/imx/ele_common.h b/drivers/firmware/imx/ele_common.h
new file mode 100644
index 000000000000..24569ad29a1f
--- /dev/null
+++ b/drivers/firmware/imx/ele_common.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2024 NXP
+ */
+
+
+#ifndef __ELE_COMMON_H__
+#define __ELE_COMMON_H__
+
+#include "se_ctrl.h"
+
+#define ELE_SUCCESS_IND 0xD6
+
+#define IMX_ELE_FW_DIR "imx/ele/"
+
+uint32_t imx_se_add_msg_crc(uint32_t *msg, uint32_t msg_len);
+int imx_ele_msg_rcv(struct se_if_priv *priv);
+int imx_ele_msg_send(struct se_if_priv *priv, void *tx_msg);
+int imx_ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, void *rx_msg);
+void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg);
+int validate_rsp_hdr(struct se_if_priv *priv,
+ struct se_msg_hdr *header,
+ uint8_t msg_id,
+ uint8_t sz,
+ bool is_base_api);
+
+/* Fill a command message header with a given command ID and length in bytes. */
+static inline int imx_se_fill_cmd_msg_hdr(struct se_if_priv *priv,
+ struct se_msg_hdr *hdr,
+ u8 cmd,
+ u32 len,
+ bool is_base_api)
+{
+ hdr->tag = priv->cmd_tag;
+ hdr->ver = (is_base_api) ? priv->base_api_ver : priv->fw_api_ver;
+ hdr->command = cmd;
+ hdr->size = len >> 2;
+
+ return 0;
+}
+
+int se_save_imem_state(struct se_if_priv *priv);
+int se_restore_imem_state(struct se_if_priv *priv);
+
+#endif /*__ELE_COMMON_H__ */
diff --git a/drivers/firmware/imx/se_ctrl.c b/drivers/firmware/imx/se_ctrl.c
new file mode 100644
index 000000000000..a7a7cacb4416
--- /dev/null
+++ b/drivers/firmware/imx/se_ctrl.c
@@ -0,0 +1,536 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2024 NXP
+ */
+
+#include <linux/completion.h>
+#include <linux/delay.h>
+#include <linux/dev_printk.h>
+#include <linux/dma-mapping.h>
+#include <linux/errno.h>
+#include <linux/export.h>
+#include <linux/firmware.h>
+#include <linux/firmware/imx/se_api.h>
+#include <linux/genalloc.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/miscdevice.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/of_reserved_mem.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/sys_soc.h>
+
+#include "ele_base_msg.h"
+#include "ele_common.h"
+#include "se_ctrl.h"
+
+#define RESERVED_DMA_POOL BIT(0)
+
+struct imx_se_node_info {
+ u8 se_if_id;
+ u8 se_if_did;
+ u8 max_dev_ctx;
+ u8 cmd_tag;
+ u8 rsp_tag;
+ u8 success_tag;
+ u8 base_api_ver;
+ u8 fw_api_ver;
+ u8 *se_name;
+ u8 *mbox_tx_name;
+ u8 *mbox_rx_name;
+ u8 *pool_name;
+ u8 *fw_name_in_rfs;
+ bool soc_register;
+ bool reserved_dma_ranges;
+ bool imem_mgmt;
+ int (*se_fetch_soc_info)(struct device *dev, u16 *soc_rev, u64 *serial_num);
+};
+
+struct imx_se_node_info_list {
+ u8 num_mu;
+ u16 soc_id;
+ struct imx_se_node_info info[];
+};
+
+static const struct imx_se_node_info_list imx8ulp_info = {
+ .num_mu = 1,
+ .soc_id = SOC_ID_OF_IMX8ULP,
+ .info = {
+ {
+ .se_if_id = 2,
+ .se_if_did = 7,
+ .max_dev_ctx = 4,
+ .cmd_tag = 0x17,
+ .rsp_tag = 0xe1,
+ .success_tag = ELE_SUCCESS_IND,
+ .base_api_ver = MESSAGING_VERSION_6,
+ .fw_api_ver = MESSAGING_VERSION_7,
+ .se_name = "hsm1",
+ .mbox_tx_name = "tx",
+ .mbox_rx_name = "rx",
+ .pool_name = "sram",
+ .fw_name_in_rfs = IMX_ELE_FW_DIR
+ "mx8ulpa2ext-ahab-container.img",
+ .soc_register = true,
+ .reserved_dma_ranges = true,
+ .imem_mgmt = true,
+ .se_fetch_soc_info = ele_fetch_soc_info,
+ },
+ },
+};
+
+static const struct imx_se_node_info_list imx93_info = {
+ .num_mu = 1,
+ .soc_id = SOC_ID_OF_IMX93,
+ .info = {
+ {
+ .se_if_id = 2,
+ .se_if_did = 3,
+ .max_dev_ctx = 4,
+ .cmd_tag = 0x17,
+ .rsp_tag = 0xe1,
+ .success_tag = ELE_SUCCESS_IND,
+ .base_api_ver = MESSAGING_VERSION_6,
+ .fw_api_ver = MESSAGING_VERSION_7,
+ .se_name = "hsm1",
+ .mbox_tx_name = "tx",
+ .mbox_rx_name = "rx",
+ .reserved_dma_ranges = true,
+ .soc_register = true,
+ },
+ },
+};
+
+static const struct of_device_id se_match[] = {
+ { .compatible = "fsl,imx8ulp-se", .data = (void *)&imx8ulp_info},
+ { .compatible = "fsl,imx93-se", .data = (void *)&imx93_info},
+ {},
+};
+
+static const struct imx_se_node_info
+ *get_imx_se_node_info(const struct imx_se_node_info_list *info_list,
+ const u32 idx)
+{
+ if (idx > info_list->num_mu)
+ return NULL;
+
+ return &info_list->info[idx];
+}
+
+void *get_phy_buf_mem_pool(struct device *dev,
+ u8 *mem_pool_name,
+ dma_addr_t *buf,
+ u32 size)
+{
+ struct device_node *of_node = dev->of_node;
+ struct gen_pool *mem_pool;
+
+ mem_pool = of_gen_pool_get(of_node, mem_pool_name, 0);
+ if (!mem_pool) {
+ dev_err(dev,
+ "Unable to get sram pool = %s\n",
+ mem_pool_name);
+ return 0;
+ }
+
+ return gen_pool_dma_alloc(mem_pool, size, buf);
+}
+
+void free_phybuf_mem_pool(struct device *dev,
+ u8 *mem_pool_name,
+ u32 *buf,
+ u32 size)
+{
+ struct device_node *of_node = dev->of_node;
+ struct gen_pool *mem_pool;
+
+ mem_pool = of_gen_pool_get(of_node, mem_pool_name, 0);
+ if (!mem_pool)
+ dev_err(dev,
+ "%s: Failed: Unable to get sram pool.\n",
+ __func__);
+
+ gen_pool_free(mem_pool, (u64)buf, size);
+}
+
+static int imx_fetch_se_soc_info(struct se_if_priv *priv,
+ const struct imx_se_node_info_list *info_list)
+{
+ const struct imx_se_node_info *info;
+ struct soc_device_attribute *attr;
+ struct soc_device *sdev;
+ u64 serial_num;
+ u16 soc_rev;
+ int err = 0;
+
+ info = priv->info;
+
+ /* This function should be called once.
+ * Check if the soc_rev is zero to continue.
+ */
+ if (priv->soc_rev)
+ return err;
+
+ if (info->se_fetch_soc_info) {
+ err = info->se_fetch_soc_info(priv->dev, &soc_rev, &serial_num);
+ if (err < 0) {
+ dev_err(priv->dev, "Failed to fetch SoC Info.");
+ return err;
+ }
+ } else {
+ dev_err(priv->dev, "Failed to fetch SoC revision.");
+ if (info->soc_register)
+ dev_err(priv->dev, "Failed to do SoC registration.");
+ err = -EINVAL;
+ return err;
+ }
+
+ priv->soc_rev = soc_rev;
+ if (!info->soc_register)
+ return 0;
+
+ attr = devm_kzalloc(priv->dev, sizeof(*attr), GFP_KERNEL);
+ if (!attr)
+ return -ENOMEM;
+
+ if (FIELD_GET(DEV_GETINFO_MIN_VER_MASK, soc_rev))
+ attr->revision = devm_kasprintf(priv->dev, GFP_KERNEL, "%x.%x",
+ FIELD_GET(DEV_GETINFO_MIN_VER_MASK,
+ soc_rev),
+ FIELD_GET(DEV_GETINFO_MAJ_VER_MASK,
+ soc_rev));
+ else
+ attr->revision = devm_kasprintf(priv->dev, GFP_KERNEL, "%x",
+ FIELD_GET(DEV_GETINFO_MAJ_VER_MASK,
+ soc_rev));
+
+ switch (info_list->soc_id) {
+ case SOC_ID_OF_IMX8ULP:
+ attr->soc_id = devm_kasprintf(priv->dev, GFP_KERNEL,
+ "i.MX8ULP");
+ break;
+ case SOC_ID_OF_IMX93:
+ attr->soc_id = devm_kasprintf(priv->dev, GFP_KERNEL,
+ "i.MX93");
+ break;
+ }
+
+ err = of_property_read_string(of_root, "model",
+ &attr->machine);
+ if (err)
+ return -EINVAL;
+
+ attr->family = devm_kasprintf(priv->dev, GFP_KERNEL, "Freescale i.MX");
+
+ attr->serial_number
+ = devm_kasprintf(priv->dev, GFP_KERNEL, "%016llX", serial_num);
+
+ sdev = soc_device_register(attr);
+ if (IS_ERR(sdev))
+ return PTR_ERR(sdev);
+
+ return 0;
+}
+
+/* interface for managed res to free a mailbox channel */
+static void if_mbox_free_channel(void *mbox_chan)
+{
+ mbox_free_channel(mbox_chan);
+}
+
+static int se_if_request_channel(struct device *dev,
+ struct mbox_chan **chan,
+ struct mbox_client *cl,
+ const char *name)
+{
+ struct mbox_chan *t_chan;
+ int ret = 0;
+
+ t_chan = mbox_request_channel_byname(cl, name);
+ if (IS_ERR(t_chan)) {
+ ret = PTR_ERR(t_chan);
+ return dev_err_probe(dev, ret,
+ "Failed to request %s channel.", name);
+ }
+
+ ret = devm_add_action(dev, if_mbox_free_channel, t_chan);
+ if (ret) {
+ dev_err(dev, "failed to add devm removal of mbox %s\n", name);
+ goto exit;
+ }
+
+ *chan = t_chan;
+
+exit:
+ return ret;
+}
+
+static int se_probe_if_cleanup(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct se_if_priv *priv;
+ int ret = 0;
+
+ priv = dev_get_drvdata(dev);
+
+ if (priv->tx_chan)
+ mbox_free_channel(priv->tx_chan);
+ if (priv->rx_chan)
+ mbox_free_channel(priv->rx_chan);
+
+ /* free the buffer in se remove, previously allocated
+ * in se probe to store encrypted IMEM
+ */
+ if (priv->imem.buf) {
+ dmam_free_coherent(dev,
+ ELE_IMEM_SIZE,
+ priv->imem.buf,
+ priv->imem.phyaddr);
+ priv->imem.buf = NULL;
+ }
+
+ /* No need to check, if reserved memory is allocated
+ * before calling for its release. Or clearing the
+ * un-set bit.
+ */
+ of_reserved_mem_device_release(dev);
+ priv->flags &= (~RESERVED_DMA_POOL);
+
+ return ret;
+}
+
+static void se_load_firmware(const struct firmware *fw, void *context)
+{
+ struct se_if_priv *priv = (struct se_if_priv *) context;
+ const struct imx_se_node_info *info = priv->info;
+ const u8 *se_fw_name = info->fw_name_in_rfs;
+ phys_addr_t se_fw_phyaddr;
+ u8 *se_fw_buf;
+
+ if (!fw) {
+ if (priv->fw_fail > MAX_FW_LOAD_RETRIES)
+ dev_dbg(priv->dev,
+ "External FW not found, using ROM FW.\n");
+ else {
+ /*add a bit delay to wait for firmware priv released */
+ msleep(20);
+
+ /* Load firmware one more time if timeout */
+ request_firmware_nowait(THIS_MODULE,
+ FW_ACTION_UEVENT, info->fw_name_in_rfs,
+ priv->dev, GFP_KERNEL, priv,
+ se_load_firmware);
+ priv->fw_fail++;
+ dev_dbg(priv->dev, "Value of retries = 0x%x.\n",
+ priv->fw_fail);
+ }
+
+ return;
+ }
+
+ /* allocate buffer to store the SE FW */
+ se_fw_buf = dma_alloc_coherent(priv->dev, fw->size,
+ &se_fw_phyaddr, GFP_KERNEL);
+ if (!se_fw_buf) {
+ dev_err(priv->dev, "Failed to alloc SE fw buffer memory\n");
+ goto exit;
+ }
+
+ memcpy(se_fw_buf, fw->data, fw->size);
+
+ if (ele_fw_authenticate(priv->dev, se_fw_phyaddr))
+ dev_err(priv->dev,
+ "Failed to authenticate & load SE firmware %s.\n",
+ se_fw_name);
+
+ dma_free_coherent(priv->dev,
+ fw->size,
+ se_fw_buf,
+ se_fw_phyaddr);
+
+exit:
+ release_firmware(fw);
+}
+
+static int se_if_probe(struct platform_device *pdev)
+{
+ const struct imx_se_node_info_list *info_list;
+ const struct imx_se_node_info *info;
+ struct device *dev = &pdev->dev;
+ struct se_if_priv *priv;
+ u32 idx;
+ int ret;
+
+ if (of_property_read_u32(dev->of_node, "reg", &idx)) {
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ info_list = device_get_match_data(dev);
+ info = get_imx_se_node_info(info_list, idx);
+ if (!info) {
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+
+ dev_set_drvdata(dev, priv);
+
+ /* Mailbox client configuration */
+ priv->se_mb_cl.dev = dev;
+ priv->se_mb_cl.tx_block = false;
+ priv->se_mb_cl.knows_txdone = true;
+ priv->se_mb_cl.rx_callback = se_if_rx_callback;
+
+ ret = se_if_request_channel(dev, &priv->tx_chan,
+ &priv->se_mb_cl, info->mbox_tx_name);
+ if (ret)
+ goto exit;
+
+ ret = se_if_request_channel(dev, &priv->rx_chan,
+ &priv->se_mb_cl, info->mbox_rx_name);
+ if (ret)
+ goto exit;
+
+ priv->dev = dev;
+ priv->info = info;
+
+ mutex_init(&priv->se_if_lock);
+ mutex_init(&priv->se_if_cmd_lock);
+
+ priv->cmd_receiver_dev = NULL;
+ priv->waiting_rsp_dev = NULL;
+ priv->max_dev_ctx = info->max_dev_ctx;
+ priv->cmd_tag = info->cmd_tag;
+ priv->rsp_tag = info->rsp_tag;
+ priv->mem_pool_name = info->pool_name;
+ priv->success_tag = info->success_tag;
+ priv->base_api_ver = info->base_api_ver;
+ priv->fw_api_ver = info->fw_api_ver;
+
+ init_completion(&priv->done);
+ spin_lock_init(&priv->lock);
+
+ if (info->reserved_dma_ranges) {
+ ret = of_reserved_mem_device_init(dev);
+ if (ret) {
+ dev_err(dev,
+ "failed to init reserved memory region %d\n",
+ ret);
+ goto exit;
+ }
+ priv->flags |= RESERVED_DMA_POOL;
+ }
+
+ ret = imx_fetch_se_soc_info(priv, info_list);
+ if (ret) {
+ dev_err(dev,
+ "failed[%pe] to fetch SoC Info\n", ERR_PTR(ret));
+ goto exit;
+ }
+
+ if (info->imem_mgmt) {
+ /* allocate buffer where SE store encrypted IMEM */
+ priv->imem.buf = dmam_alloc_coherent(dev, ELE_IMEM_SIZE,
+ &priv->imem.phyaddr,
+ GFP_KERNEL);
+ if (!priv->imem.buf) {
+ dev_err(dev,
+ "dmam-alloc-failed: To store encr-IMEM.\n");
+ ret = -ENOMEM;
+ goto exit;
+ }
+ }
+
+ if (info->fw_name_in_rfs) {
+ ret = request_firmware_nowait(THIS_MODULE,
+ FW_ACTION_UEVENT,
+ info->fw_name_in_rfs,
+ dev, GFP_KERNEL, priv,
+ se_load_firmware);
+ if (ret)
+ dev_warn(dev, "Failed to get firmware [%s].\n",
+ info->fw_name_in_rfs);
+ ret = 0;
+ }
+
+ dev_info(dev, "i.MX secure-enclave: %s interface to firmware, configured.\n",
+ info->se_name);
+ return ret;
+
+exit:
+ /* if execution control reaches here, if probe fails.
+ * hence doing the cleanup
+ */
+ if (se_probe_if_cleanup(pdev))
+ dev_err(dev,
+ "Failed to clean-up the child node probe.\n");
+
+ return ret;
+}
+
+static int se_remove(struct platform_device *pdev)
+{
+ if (se_probe_if_cleanup(pdev))
+ dev_err(&pdev->dev,
+ "i.MX Secure Enclave is not cleanly un-probed.");
+
+ return 0;
+}
+
+static int se_suspend(struct device *dev)
+{
+ struct se_if_priv *priv = dev_get_drvdata(dev);
+ const struct imx_se_node_info *info = priv->info;
+ int ret = 0;
+
+ if (info && info->imem_mgmt) {
+ ret = se_save_imem_state(priv);
+ if (ret < 0)
+ goto exit;
+ priv->imem.size = ret;
+ }
+exit:
+ return ret;
+}
+
+static int se_resume(struct device *dev)
+{
+ struct se_if_priv *priv = dev_get_drvdata(dev);
+ const struct imx_se_node_info *info = priv->info;
+
+ if (info && info->imem_mgmt)
+ se_restore_imem_state(priv);
+
+ return 0;
+}
+
+static const struct dev_pm_ops se_pm = {
+ RUNTIME_PM_OPS(se_suspend, se_resume, NULL)
+};
+
+static struct platform_driver se_driver = {
+ .driver = {
+ .name = "fsl-se-fw",
+ .of_match_table = se_match,
+ .pm = &se_pm,
+ },
+ .probe = se_if_probe,
+ .remove = se_remove,
+};
+MODULE_DEVICE_TABLE(of, se_match);
+
+module_platform_driver(se_driver);
+
+MODULE_AUTHOR("Pankaj Gupta <pankaj.gupta@nxp.com>");
+MODULE_DESCRIPTION("iMX Secure Enclave Driver.");
+MODULE_LICENSE("GPL");
diff --git a/drivers/firmware/imx/se_ctrl.h b/drivers/firmware/imx/se_ctrl.h
new file mode 100644
index 000000000000..7d4f439a6158
--- /dev/null
+++ b/drivers/firmware/imx/se_ctrl.h
@@ -0,0 +1,99 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2024 NXP
+ */
+
+#ifndef SE_MU_H
+#define SE_MU_H
+
+#include <linux/miscdevice.h>
+#include <linux/semaphore.h>
+#include <linux/mailbox_client.h>
+
+#define MAX_FW_LOAD_RETRIES 50
+
+#define RES_STATUS(x) FIELD_GET(0x000000ff, x)
+#define MESSAGING_VERSION_6 0x6
+#define MESSAGING_VERSION_7 0x7
+
+struct se_imem_buf {
+ u8 *buf;
+ phys_addr_t phyaddr;
+ u32 size;
+};
+
+/* Header of the messages exchange with the EdgeLock Enclave */
+struct se_msg_hdr {
+ u8 ver;
+ u8 size;
+ u8 command;
+ u8 tag;
+} __packed;
+
+#define SE_MU_HDR_SZ 4
+
+struct se_api_msg {
+ struct se_msg_hdr header;
+ u32 data[];
+};
+
+struct se_if_priv {
+ struct se_if_device_ctx *cmd_receiver_dev;
+ /* Update to the waiting_rsp_dev, to be protected
+ * under se_if_lock.
+ */
+ struct se_if_device_ctx *waiting_rsp_dev;
+ /*
+ * prevent parallel access to the se interface registers
+ * e.g. a user trying to send a command while the other one is
+ * sending a response.
+ */
+ struct mutex se_if_lock;
+ /*
+ * prevent a command to be sent on the se interface while another one is
+ * still processing. (response to a command is allowed)
+ */
+ struct mutex se_if_cmd_lock;
+ struct device *dev;
+ u8 *mem_pool_name;
+ u8 cmd_tag;
+ u8 rsp_tag;
+ u8 success_tag;
+ u8 base_api_ver;
+ u8 fw_api_ver;
+ u32 fw_fail;
+ u16 soc_rev;
+ const void *info;
+
+ struct mbox_client se_mb_cl;
+ struct mbox_chan *tx_chan, *rx_chan;
+
+ /* Assignment of the rx_msg buffer to held till the
+ * received content as part callback function, is copied.
+ */
+ struct se_api_msg *rx_msg;
+ struct completion done;
+ spinlock_t lock;
+ /*
+ * Flag to retain the state of initialization done at
+ * the time of se-if probe.
+ */
+ uint32_t flags;
+ u8 max_dev_ctx;
+ struct se_if_device_ctx **ctxs;
+ struct se_imem_buf imem;
+};
+
+void *get_phy_buf_mem_pool(struct device *dev,
+ u8 *mem_pool_name,
+ dma_addr_t *buf,
+ u32 size);
+phys_addr_t get_phy_buf_mem_pool1(struct device *dev,
+ u8 *mem_pool_name,
+ u32 **buf,
+ u32 size);
+void free_phybuf_mem_pool(struct device *dev,
+ u8 *mem_pool_name,
+ u32 *buf,
+ u32 size);
+#endif
diff --git a/include/linux/firmware/imx/se_api.h b/include/linux/firmware/imx/se_api.h
new file mode 100644
index 000000000000..c47f84906837
--- /dev/null
+++ b/include/linux/firmware/imx/se_api.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2024 NXP
+ */
+
+#ifndef __SE_API_H__
+#define __SE_API_H__
+
+#include <linux/types.h>
+
+#define SOC_ID_OF_IMX8ULP 0x084D
+#define SOC_ID_OF_IMX93 0x9300
+
+#endif /* __SE_API_H__ */
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 5/5] firmware: imx: adds miscdev
2024-06-17 7:29 [PATCH v3 0/5] Communication Interface to NXP secure-enclave HW IP like Edgelock Enclave Pankaj Gupta
` (3 preceding siblings ...)
2024-06-17 7:29 ` [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave Pankaj Gupta
@ 2024-06-17 7:29 ` Pankaj Gupta
2024-06-18 21:28 ` Randy Dunlap
4 siblings, 1 reply; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-17 7:29 UTC (permalink / raw)
To: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Pankaj Gupta, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc, linux-kernel, devicetree, imx, linux-arm-kernel
Adds the driver for communication interface to secure-enclave,
for exchanging messages with NXP secure enclave HW IP(s) like
EdgeLock Enclave from:
- User-Space Applications via character driver.
ABI documentation for the NXP secure-enclave driver.
User-space library using this driver:
- i.MX Secure Enclave library:
-- URL: https://github.com/nxp-imx/imx-secure-enclave.git,
- i.MX Secure Middle-Ware:
-- URL: https://github.com/nxp-imx/imx-smw.git
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
---
Documentation/ABI/testing/se-cdev | 42 +++
drivers/firmware/imx/ele_common.c | 153 ++++++++-
drivers/firmware/imx/ele_common.h | 4 +
drivers/firmware/imx/se_ctrl.c | 694 ++++++++++++++++++++++++++++++++++++++
drivers/firmware/imx/se_ctrl.h | 49 +++
include/uapi/linux/se_ioctl.h | 94 ++++++
6 files changed, 1034 insertions(+), 2 deletions(-)
diff --git a/Documentation/ABI/testing/se-cdev b/Documentation/ABI/testing/se-cdev
new file mode 100644
index 000000000000..699525af6b86
--- /dev/null
+++ b/Documentation/ABI/testing/se-cdev
@@ -0,0 +1,42 @@
+What: /dev/<se>_mu[0-9]+_ch[0-9]+
+Date: May 2024
+KernelVersion: 6.8
+Contact: linux-imx@nxp.com, pankaj.gupta@nxp.com
+Description:
+ NXP offers multiple hardware IP(s) for secure-enclaves like EdgeLock-
+ Enclave(ELE), SECO. The character device file-descriptors
+ /dev/<se>_mu*_ch* are the interface between user-space NXP's secure-
+ enclave shared-library and the kernel driver.
+
+ The ioctl(2)-based ABI is defined and documented in
+ [include]<linux/firmware/imx/ele_mu_ioctl.h>
+ ioctl(s) are used primarily for:
+ - shared memory management
+ - allocation of I/O buffers
+ - get mu info
+ - setting a dev-ctx as receiver that is slave to fw
+ - get SoC info
+
+ The following file operations are supported:
+
+ open(2)
+ Currently the only useful flags are O_RDWR.
+
+ read(2)
+ Every read() from the opened character device context is waiting on
+ wakeup_intruptible, that gets set by the registered mailbox callback
+ function; indicating a message received from the firmware on message-
+ unit.
+
+ write(2)
+ Every write() to the opened character device context needs to acquire
+ mailbox_lock, before sending message on to the message unit.
+
+ close(2)
+ Stops and free up the I/O contexts that was associated
+ with the file descriptor.
+
+Users: https://github.com/nxp-imx/imx-secure-enclave.git,
+ https://github.com/nxp-imx/imx-smw.git
+ crypto/skcipher,
+ drivers/nvmem/imx-ocotp-ele.c
diff --git a/drivers/firmware/imx/ele_common.c b/drivers/firmware/imx/ele_common.c
index 0139748f7150..3d608a851962 100644
--- a/drivers/firmware/imx/ele_common.c
+++ b/drivers/firmware/imx/ele_common.c
@@ -78,12 +78,146 @@ int imx_ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, void *rx_msg)
return err;
}
+int imx_ele_miscdev_msg_rcv(struct se_if_device_ctx *dev_ctx,
+ void *rx_buf,
+ int rx_buf_sz)
+{
+ struct se_msg_hdr *header;
+ u32 size_to_copy;
+ int err;
+
+ err = wait_event_interruptible(dev_ctx->wq, dev_ctx->pending_hdr != 0);
+ if (err)
+ dev_err(dev_ctx->dev,
+ "%s: Err[0x%x]:Interrupted by signal.\n",
+ dev_ctx->miscdev.name, err);
+
+ header = (struct se_msg_hdr *) dev_ctx->temp_resp;
+
+ if (header->tag == dev_ctx->priv->rsp_tag) {
+ if (dev_ctx->priv->waiting_rsp_dev != dev_ctx) {
+ dev_warn(dev_ctx->dev,
+ "%s: Device context waiting for response mismatch.\n",
+ dev_ctx->miscdev.name);
+ err = -EPERM;
+ }
+ }
+
+ dev_dbg(dev_ctx->dev,
+ "%s: %s %s\n",
+ dev_ctx->miscdev.name,
+ __func__,
+ "message received, start transmit to user");
+
+ /*
+ * Check that the size passed as argument is larger than
+ * the one carried in the message.
+ */
+ size_to_copy = dev_ctx->temp_resp_size << 2;
+ if (size_to_copy > rx_buf_sz) {
+ dev_dbg(dev_ctx->dev,
+ "%s: User buffer too small (%d < %d)\n",
+ dev_ctx->miscdev.name,
+ rx_buf_sz, size_to_copy);
+ size_to_copy = rx_buf_sz;
+ }
+
+ /* We may need to copy the output data to user before
+ * delivering the completion message.
+ */
+ err = se_dev_ctx_cpy_out_data(dev_ctx);
+ if (err < 0)
+ goto exit;
+
+ /* Copy data from the buffer */
+ print_hex_dump_debug("to user ", DUMP_PREFIX_OFFSET, 4, 4,
+ dev_ctx->temp_resp, size_to_copy, false);
+ if (copy_to_user(rx_buf, dev_ctx->temp_resp, size_to_copy)) {
+ dev_err(dev_ctx->dev,
+ "%s: Failed to copy to user\n",
+ dev_ctx->miscdev.name);
+ err = -EFAULT;
+ goto exit;
+ }
+
+ err = size_to_copy;
+exit:
+
+ /* free memory allocated on the shared buffers. */
+ dev_ctx->secure_mem.pos = 0;
+ dev_ctx->non_secure_mem.pos = 0;
+
+ dev_ctx->pending_hdr = 0;
+ se_dev_ctx_shared_mem_cleanup(dev_ctx);
+
+ return err;
+}
+
+int imx_ele_miscdev_msg_send(struct se_if_device_ctx *dev_ctx,
+ void *tx_msg, int tx_msg_sz)
+{
+ struct se_if_priv *priv = dev_ctx->priv;
+ struct se_msg_hdr *header;
+ u32 size_to_send;
+ int err;
+
+ header = (struct se_msg_hdr *) tx_msg;
+
+ /*
+ * Check that the size passed as argument matches the size
+ * carried in the message.
+ */
+ size_to_send = header->size << 2;
+
+ if (size_to_send != tx_msg_sz) {
+ err = -EINVAL;
+ dev_err(priv->dev,
+ "%s: User buffer header size mismatced with input size.\n",
+ dev_ctx->miscdev.name);
+ goto exit;
+ }
+ /* Check the message is valid according to tags */
+ if (header->tag == priv->rsp_tag) {
+ /* Check the device context can send the command */
+ if (dev_ctx != priv->cmd_receiver_dev) {
+ dev_err(priv->dev,
+ "%s: Channel not configured to send resp to FW.",
+ dev_ctx->miscdev.name);
+ err = -EPERM;
+ goto exit;
+ }
+ } else if (header->tag == priv->cmd_tag) {
+ if (priv->waiting_rsp_dev != dev_ctx) {
+ dev_err(priv->dev,
+ "%s: Channel not configured to send cmd to FW.",
+ dev_ctx->miscdev.name);
+ err = -EPERM;
+ goto exit;
+ }
+ lockdep_assert_held(&priv->se_if_cmd_lock);
+ } else {
+ dev_err(priv->dev,
+ "%s: The message does not have a valid TAG\n",
+ dev_ctx->miscdev.name);
+ err = -EINVAL;
+ goto exit;
+ }
+ err = imx_ele_msg_send(priv, tx_msg);
+ if (err < 0)
+ goto exit;
+
+ err = size_to_send;
+exit:
+ return err;
+}
+
/*
* Callback called by mailbox FW, when data is received.
*/
void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg)
{
struct device *dev = mbox_cl->dev;
+ struct se_if_device_ctx *dev_ctx;
struct se_if_priv *priv;
struct se_msg_hdr *header;
@@ -97,8 +231,15 @@ void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg)
header = (struct se_msg_hdr *) msg;
- if (header->tag == priv->rsp_tag) {
- if (!priv->waiting_rsp_dev) {
+ /* Incoming command: wake up the receiver if any. */
+ if (header->tag == priv->cmd_tag) {
+ dev_dbg(dev, "Selecting cmd receiver\n");
+ dev_ctx = priv->cmd_receiver_dev;
+ } else if (header->tag == priv->rsp_tag) {
+ if (priv->waiting_rsp_dev) {
+ dev_dbg(dev, "Selecting rsp waiter\n");
+ dev_ctx = priv->waiting_rsp_dev;
+ } else {
/*
* Reading the EdgeLock Enclave response
* to the command, sent by other
@@ -116,6 +257,14 @@ void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg)
*((u32 *) header));
return;
}
+ /* Init reception */
+ memcpy(dev_ctx->temp_resp, msg, header->size << 2);
+
+ dev_ctx->temp_resp_size = header->size;
+
+ /* Allow user to read */
+ dev_ctx->pending_hdr = 1;
+ wake_up_interruptible(&dev_ctx->wq);
}
int validate_rsp_hdr(struct se_if_priv *priv,
diff --git a/drivers/firmware/imx/ele_common.h b/drivers/firmware/imx/ele_common.h
index 24569ad29a1f..ea443a9f7ad0 100644
--- a/drivers/firmware/imx/ele_common.h
+++ b/drivers/firmware/imx/ele_common.h
@@ -14,6 +14,10 @@
#define IMX_ELE_FW_DIR "imx/ele/"
uint32_t imx_se_add_msg_crc(uint32_t *msg, uint32_t msg_len);
+int imx_ele_miscdev_msg_rcv(struct se_if_device_ctx *dev_ctx,
+ void *rx_msg, int rx_msg_sz);
+int imx_ele_miscdev_msg_send(struct se_if_device_ctx *dev_ctx,
+ void *tx_msg, int tx_msg_sz);
int imx_ele_msg_rcv(struct se_if_priv *priv);
int imx_ele_msg_send(struct se_if_priv *priv, void *tx_msg);
int imx_ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, void *rx_msg);
diff --git a/drivers/firmware/imx/se_ctrl.c b/drivers/firmware/imx/se_ctrl.c
index a7a7cacb4416..c018a4f728d0 100644
--- a/drivers/firmware/imx/se_ctrl.c
+++ b/drivers/firmware/imx/se_ctrl.c
@@ -23,6 +23,7 @@
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/sys_soc.h>
+#include <uapi/linux/se_ioctl.h>
#include "ele_base_msg.h"
#include "ele_common.h"
@@ -236,6 +237,605 @@ static int imx_fetch_se_soc_info(struct se_if_priv *priv,
return 0;
}
+static int se_ioctl_cmd_snd_rcv_rsp_handler(struct se_if_device_ctx *dev_ctx,
+ u64 arg)
+{
+ struct se_if_priv *priv = dev_get_drvdata(dev_ctx->dev);
+ struct se_ioctl_cmd_snd_rcv_rsp_info cmd_snd_rcv_rsp_info;
+ struct se_api_msg *tx_msg __free(kfree) = NULL;
+ struct se_api_msg *rx_msg __free(kfree) = NULL;
+ int err = 0;
+
+ if (copy_from_user(&cmd_snd_rcv_rsp_info, (u8 *)arg,
+ sizeof(struct se_ioctl_cmd_snd_rcv_rsp_info))) {
+ dev_err(dev_ctx->priv->dev,
+ "%s: Failed to copy cmd_snd_rcv_rsp_info from user\n",
+ dev_ctx->miscdev.name);
+ err = -EFAULT;
+ goto exit;
+ }
+
+ if (cmd_snd_rcv_rsp_info.tx_buf_sz < SE_MU_HDR_SZ) {
+ dev_err(dev_ctx->priv->dev,
+ "%s: User buffer too small(%d < %d)\n",
+ dev_ctx->miscdev.name,
+ cmd_snd_rcv_rsp_info.tx_buf_sz,
+ SE_MU_HDR_SZ);
+ err = -ENOSPC;
+ goto exit;
+ }
+
+ rx_msg = kzalloc(cmd_snd_rcv_rsp_info.rx_buf_sz, GFP_KERNEL);
+ if (!rx_msg) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ tx_msg = memdup_user(cmd_snd_rcv_rsp_info.tx_buf,
+ cmd_snd_rcv_rsp_info.tx_buf_sz);
+ if (IS_ERR(tx_msg)) {
+ err = PTR_ERR(tx_msg);
+ goto exit;
+ }
+
+ if (tx_msg->header.tag != priv->cmd_tag) {
+ err = -EINVAL;
+ goto exit;
+ }
+
+ scoped_guard(mutex, &priv->se_if_cmd_lock);
+ priv->waiting_rsp_dev = dev_ctx;
+
+ /* Device Context that is assigned to be a
+ * FW's command receiver, has pre-allocated buffer.
+ */
+ if (dev_ctx != priv->cmd_receiver_dev)
+ dev_ctx->temp_resp = rx_msg;
+
+ err = imx_ele_miscdev_msg_send(dev_ctx,
+ tx_msg,
+ cmd_snd_rcv_rsp_info.tx_buf_sz);
+ cmd_snd_rcv_rsp_info.tx_buf_sz = err;
+ if (err < 0)
+ goto exit;
+
+ err = imx_ele_miscdev_msg_rcv(dev_ctx,
+ cmd_snd_rcv_rsp_info.rx_buf,
+ cmd_snd_rcv_rsp_info.rx_buf_sz);
+
+ cmd_snd_rcv_rsp_info.rx_buf_sz = err;
+ priv->waiting_rsp_dev = NULL;
+ if (dev_ctx != priv->cmd_receiver_dev)
+ dev_ctx->temp_resp = NULL;
+
+exit:
+ if (copy_to_user((void *)arg, &cmd_snd_rcv_rsp_info,
+ sizeof(cmd_snd_rcv_rsp_info))) {
+ dev_err(dev_ctx->priv->dev,
+ "%s: Failed to copy cmd_snd_rcv_rsp_info from user\n",
+ dev_ctx->miscdev.name);
+ err = -EFAULT;
+ }
+ return err;
+}
+
+/*
+ * File operations for user-space
+ */
+
+/* Write a message to the MU. */
+static ssize_t se_if_fops_write(struct file *fp, const char __user *buf,
+ size_t size, loff_t *ppos)
+{
+ struct se_api_msg *tx_msg __free(kfree) = NULL;
+ struct se_if_device_ctx *dev_ctx;
+ struct se_if_priv *priv;
+ int err;
+
+ dev_ctx = container_of(fp->private_data,
+ struct se_if_device_ctx,
+ miscdev);
+ priv = dev_ctx->priv;
+ dev_dbg(priv->dev,
+ "%s: write from buf (%p)%zu, ppos=%lld\n",
+ dev_ctx->miscdev.name,
+ buf, size, ((ppos) ? *ppos : 0));
+
+ if (down_interruptible(&dev_ctx->fops_lock))
+ return -EBUSY;
+
+ if (dev_ctx->status != SE_IF_CTX_OPENED) {
+ err = -EINVAL;
+ goto exit;
+ }
+
+ if (size < SE_MU_HDR_SZ) {
+ dev_err(priv->dev,
+ "%s: User buffer too small(%zu < %d)\n",
+ dev_ctx->miscdev.name,
+ size, SE_MU_HDR_SZ);
+ err = -ENOSPC;
+ goto exit;
+ }
+ tx_msg = memdup_user(buf, size);
+ if (IS_ERR(tx_msg)) {
+ err = PTR_ERR(tx_msg);
+ goto exit;
+ }
+
+ print_hex_dump_debug("from user ", DUMP_PREFIX_OFFSET, 4, 4,
+ tx_msg, size, false);
+
+ err = imx_ele_miscdev_msg_send(dev_ctx, tx_msg, size);
+
+exit:
+ up(&dev_ctx->fops_lock);
+ return err;
+}
+
+/*
+ * Read a message from the MU.
+ * Blocking until a message is available.
+ */
+static ssize_t se_if_fops_read(struct file *fp, char __user *buf,
+ size_t size, loff_t *ppos)
+{
+ struct se_if_device_ctx *dev_ctx;
+ struct se_if_priv *priv;
+ int err;
+
+ dev_ctx = container_of(fp->private_data,
+ struct se_if_device_ctx,
+ miscdev);
+ priv = dev_ctx->priv;
+ dev_dbg(priv->dev,
+ "%s: read to buf %p(%zu), ppos=%lld\n",
+ dev_ctx->miscdev.name,
+ buf, size, ((ppos) ? *ppos : 0));
+
+ if (down_interruptible(&dev_ctx->fops_lock))
+ return -EBUSY;
+
+ if (dev_ctx->status != SE_IF_CTX_OPENED) {
+ err = -EINVAL;
+ goto exit;
+ }
+
+ err = imx_ele_miscdev_msg_rcv(dev_ctx, buf, size);
+
+exit:
+ up(&dev_ctx->fops_lock);
+ return err;
+}
+
+static int se_ioctl_get_mu_info(struct se_if_device_ctx *dev_ctx,
+ u64 arg)
+{
+ struct se_if_priv *priv = dev_get_drvdata(dev_ctx->dev);
+ struct imx_se_node_info *if_node_info;
+ struct se_ioctl_get_if_info info;
+ int err = 0;
+
+ if_node_info = (struct imx_se_node_info *)priv->info;
+
+ info.se_if_id = if_node_info->se_if_id;
+ info.interrupt_idx = 0;
+ info.tz = 0;
+ info.did = if_node_info->se_if_did;
+ info.cmd_tag = if_node_info->cmd_tag;
+ info.rsp_tag = if_node_info->rsp_tag;
+ info.success_tag = if_node_info->success_tag;
+ info.base_api_ver = if_node_info->base_api_ver;
+ info.fw_api_ver = if_node_info->fw_api_ver;
+
+ dev_dbg(priv->dev,
+ "%s: info [se_if_id: %d, irq_idx: %d, tz: 0x%x, did: 0x%x]\n",
+ dev_ctx->miscdev.name,
+ info.se_if_id, info.interrupt_idx, info.tz, info.did);
+
+ if (copy_to_user((u8 *)arg, &info, sizeof(info))) {
+ dev_err(dev_ctx->priv->dev,
+ "%s: Failed to copy mu info to user\n",
+ dev_ctx->miscdev.name);
+ err = -EFAULT;
+ goto exit;
+ }
+
+exit:
+ return err;
+}
+
+/* Need to copy the output data to user-device context.
+ */
+int se_dev_ctx_cpy_out_data(struct se_if_device_ctx *dev_ctx)
+{
+ struct se_buf_desc *b_desc, *temp;
+
+ list_for_each_entry_safe(b_desc, temp, &dev_ctx->pending_out, link) {
+ if (b_desc->usr_buf_ptr && b_desc->shared_buf_ptr) {
+
+ dev_dbg(dev_ctx->dev,
+ "%s: Copy output data to user\n",
+ dev_ctx->miscdev.name);
+ if (copy_to_user(b_desc->usr_buf_ptr,
+ b_desc->shared_buf_ptr,
+ b_desc->size)) {
+ dev_err(dev_ctx->dev,
+ "%s: Failure copying output data to user.",
+ dev_ctx->miscdev.name);
+ return -EFAULT;
+ }
+ }
+
+ if (b_desc->shared_buf_ptr)
+ memset(b_desc->shared_buf_ptr, 0, b_desc->size);
+
+ list_del(&b_desc->link);
+ kfree(b_desc);
+ }
+ return 0;
+}
+
+/*
+ * Clean the used Shared Memory space,
+ * whether its Input Data copied from user buffers, or
+ * Data received from FW.
+ */
+void se_dev_ctx_shared_mem_cleanup(struct se_if_device_ctx *dev_ctx)
+{
+ struct list_head *dev_ctx_lists[] = {&dev_ctx->pending_in,
+ &dev_ctx->pending_out};
+ struct se_buf_desc *b_desc, *temp;
+ int i;
+
+ for (i = 0; i < 2; i++) {
+ list_for_each_entry_safe(b_desc, temp,
+ dev_ctx_lists[i], link) {
+
+ if (!b_desc)
+ continue;
+
+ if (b_desc->shared_buf_ptr)
+ memset(b_desc->shared_buf_ptr, 0, b_desc->size);
+
+ list_del(&b_desc->link);
+ kfree(b_desc);
+ }
+ }
+}
+
+/*
+ * Copy a buffer of data to/from the user and return the address to use in
+ * messages
+ */
+static int se_ioctl_setup_iobuf_handler(struct se_if_device_ctx *dev_ctx,
+ u64 arg)
+{
+ struct se_shared_mem *shared_mem = NULL;
+ struct se_ioctl_setup_iobuf io = {0};
+ struct se_buf_desc *b_desc = NULL;
+ int err = 0;
+ u32 pos;
+
+ if (copy_from_user(&io, (u8 *)arg, sizeof(io))) {
+ dev_err(dev_ctx->priv->dev,
+ "%s: Failed copy iobuf config from user\n",
+ dev_ctx->miscdev.name);
+ err = -EFAULT;
+ goto exit;
+ }
+
+ dev_dbg(dev_ctx->priv->dev,
+ "%s: io [buf: %p(%d) flag: %x]\n",
+ dev_ctx->miscdev.name,
+ io.user_buf, io.length, io.flags);
+
+ if (io.length == 0 || !io.user_buf) {
+ /*
+ * Accept NULL pointers since some buffers are optional
+ * in FW commands. In this case we should return 0 as
+ * pointer to be embedded into the message.
+ * Skip all data copy part of code below.
+ */
+ io.ele_addr = 0;
+ goto copy;
+ }
+
+ /* Select the shared memory to be used for this buffer. */
+ if (io.flags & SE_MU_IO_FLAGS_USE_SEC_MEM) {
+ /* App requires to use secure memory for this buffer.*/
+ dev_err(dev_ctx->priv->dev,
+ "%s: Failed allocate SEC MEM memory\n",
+ dev_ctx->miscdev.name);
+ err = -EFAULT;
+ goto exit;
+ } else {
+ /* No specific requirement for this buffer. */
+ shared_mem = &dev_ctx->non_secure_mem;
+ }
+
+ /* Check there is enough space in the shared memory. */
+ if (shared_mem->size < shared_mem->pos ||
+ round_up(io.length, 8u) >= (shared_mem->size - shared_mem->pos)) {
+ dev_err(dev_ctx->priv->dev,
+ "%s: Not enough space in shared memory\n",
+ dev_ctx->miscdev.name);
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ /* Allocate space in shared memory. 8 bytes aligned. */
+ pos = shared_mem->pos;
+ shared_mem->pos += round_up(io.length, 8u);
+ io.ele_addr = (u64)shared_mem->dma_addr + pos;
+
+ if ((io.flags & SE_MU_IO_FLAGS_USE_SEC_MEM) &&
+ !(io.flags & SE_MU_IO_FLAGS_USE_SHORT_ADDR)) {
+ /*Add base address to get full address.*/
+ dev_err(dev_ctx->priv->dev,
+ "%s: Failed allocate SEC MEM memory\n",
+ dev_ctx->miscdev.name);
+ err = -EFAULT;
+ goto exit;
+ }
+
+ memset(shared_mem->ptr + pos, 0, io.length);
+ if ((io.flags & SE_IO_BUF_FLAGS_IS_INPUT) ||
+ (io.flags & SE_IO_BUF_FLAGS_IS_IN_OUT)) {
+ /*
+ * buffer is input:
+ * copy data from user space to this allocated buffer.
+ */
+ if (copy_from_user(shared_mem->ptr + pos, io.user_buf,
+ io.length)) {
+ dev_err(dev_ctx->priv->dev,
+ "%s: Failed copy data to shared memory\n",
+ dev_ctx->miscdev.name);
+ err = -EFAULT;
+ goto exit;
+ }
+ }
+
+ b_desc = kzalloc(sizeof(*b_desc), GFP_KERNEL);
+ if (!b_desc) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+copy:
+ /* Provide the EdgeLock Enclave address to user space only if success.*/
+ if (copy_to_user((u8 *)arg, &io, sizeof(io))) {
+ dev_err(dev_ctx->priv->dev,
+ "%s: Failed to copy iobuff setup to user\n",
+ dev_ctx->miscdev.name);
+ kfree(b_desc);
+ err = -EFAULT;
+ goto exit;
+ }
+
+ if (b_desc) {
+ b_desc->shared_buf_ptr = shared_mem->ptr + pos;
+ b_desc->usr_buf_ptr = io.user_buf;
+ b_desc->size = io.length;
+
+ if (io.flags & SE_IO_BUF_FLAGS_IS_INPUT) {
+ /*
+ * buffer is input:
+ * add an entry in the "pending input buffers" list so
+ * that copied data can be cleaned from shared memory
+ * later.
+ */
+ list_add_tail(&b_desc->link, &dev_ctx->pending_in);
+ } else {
+ /*
+ * buffer is output:
+ * add an entry in the "pending out buffers" list so data
+ * can be copied to user space when receiving Secure-Enclave
+ * response.
+ */
+ list_add_tail(&b_desc->link, &dev_ctx->pending_out);
+ }
+ }
+
+exit:
+ return err;
+}
+
+/* IOCTL to provide SoC information */
+static int se_ioctl_get_se_soc_info_handler(struct se_if_device_ctx *dev_ctx,
+ u64 arg)
+{
+ struct imx_se_node_info_list *info_list;
+ struct se_ioctl_get_soc_info soc_info;
+ int err = -EINVAL;
+
+ info_list = (struct imx_se_node_info_list *)
+ device_get_match_data(dev_ctx->priv->dev);
+ if (!info_list)
+ goto exit;
+
+ soc_info.soc_id = info_list->soc_id;
+ soc_info.soc_rev = dev_ctx->priv->soc_rev;
+
+ err = (int)copy_to_user((u8 *)arg, (u8 *)(&soc_info), sizeof(soc_info));
+ if (err) {
+ dev_err(dev_ctx->priv->dev,
+ "%s: Failed to copy soc info to user\n",
+ dev_ctx->miscdev.name);
+ err = -EFAULT;
+ goto exit;
+ }
+
+exit:
+ return err;
+}
+
+/* Open a character device. */
+static int se_if_fops_open(struct inode *nd, struct file *fp)
+{
+ struct se_if_device_ctx *dev_ctx = container_of(fp->private_data,
+ struct se_if_device_ctx,
+ miscdev);
+ int err = 0;
+
+ /* Avoid race if opened at the same time */
+ if (down_trylock(&dev_ctx->fops_lock))
+ return -EBUSY;
+
+ /* Authorize only 1 instance. */
+ if (dev_ctx->status != SE_IF_CTX_FREE) {
+ err = -EBUSY;
+ goto exit;
+ }
+
+ /*
+ * Allocate some memory for data exchanges with S40x.
+ * This will be used for data not requiring secure memory.
+ */
+ dev_ctx->non_secure_mem.ptr = dmam_alloc_coherent(dev_ctx->dev,
+ MAX_DATA_SIZE_PER_USER,
+ &dev_ctx->non_secure_mem.dma_addr,
+ GFP_KERNEL);
+ if (!dev_ctx->non_secure_mem.ptr) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ dev_ctx->non_secure_mem.size = MAX_DATA_SIZE_PER_USER;
+ dev_ctx->non_secure_mem.pos = 0;
+ dev_ctx->status = SE_IF_CTX_OPENED;
+
+ dev_ctx->pending_hdr = 0;
+
+ goto exit;
+
+ dmam_free_coherent(dev_ctx->priv->dev, MAX_DATA_SIZE_PER_USER,
+ dev_ctx->non_secure_mem.ptr,
+ dev_ctx->non_secure_mem.dma_addr);
+
+exit:
+ up(&dev_ctx->fops_lock);
+ return err;
+}
+
+/* Close a character device. */
+static int se_if_fops_close(struct inode *nd, struct file *fp)
+{
+ struct se_if_device_ctx *dev_ctx = container_of(fp->private_data,
+ struct se_if_device_ctx,
+ miscdev);
+ struct se_if_priv *priv = dev_ctx->priv;
+
+ /* Avoid race if closed at the same time */
+ if (down_trylock(&dev_ctx->fops_lock))
+ return -EBUSY;
+
+ /* The device context has not been opened */
+ if (dev_ctx->status != SE_IF_CTX_OPENED)
+ goto exit;
+
+ /* check if this device was registered as command receiver. */
+ if (priv->cmd_receiver_dev == dev_ctx) {
+ priv->cmd_receiver_dev = NULL;
+ kfree(dev_ctx->temp_resp);
+ }
+
+ /* check if this device was registered as waiting response. */
+ if (priv->waiting_rsp_dev == dev_ctx) {
+ priv->waiting_rsp_dev = NULL;
+ mutex_unlock(&priv->se_if_cmd_lock);
+ }
+
+ /* Unmap secure memory shared buffer. */
+ if (dev_ctx->secure_mem.ptr)
+ devm_iounmap(dev_ctx->dev, dev_ctx->secure_mem.ptr);
+
+ dev_ctx->secure_mem.ptr = NULL;
+ dev_ctx->secure_mem.dma_addr = 0;
+ dev_ctx->secure_mem.size = 0;
+ dev_ctx->secure_mem.pos = 0;
+
+ /* Free non-secure shared buffer. */
+ dmam_free_coherent(dev_ctx->priv->dev, MAX_DATA_SIZE_PER_USER,
+ dev_ctx->non_secure_mem.ptr,
+ dev_ctx->non_secure_mem.dma_addr);
+
+ dev_ctx->non_secure_mem.ptr = NULL;
+ dev_ctx->non_secure_mem.dma_addr = 0;
+ dev_ctx->non_secure_mem.size = 0;
+ dev_ctx->non_secure_mem.pos = 0;
+ se_dev_ctx_shared_mem_cleanup(dev_ctx);
+ dev_ctx->status = SE_IF_CTX_FREE;
+
+exit:
+ up(&dev_ctx->fops_lock);
+ return 0;
+}
+
+/* IOCTL entry point of a character device */
+static long se_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
+{
+ struct se_if_device_ctx *dev_ctx = container_of(fp->private_data,
+ struct se_if_device_ctx,
+ miscdev);
+ struct se_if_priv *se_if_priv = dev_ctx->priv;
+ int err = -EINVAL;
+
+ /* Prevent race during change of device context */
+ if (down_interruptible(&dev_ctx->fops_lock))
+ return -EBUSY;
+
+ switch (cmd) {
+ case SE_IOCTL_ENABLE_CMD_RCV:
+ if (!se_if_priv->cmd_receiver_dev) {
+ err = 0;
+ se_if_priv->cmd_receiver_dev = dev_ctx;
+ dev_ctx->temp_resp = kzalloc(MAX_NVM_MSG_LEN, GFP_KERNEL);
+ if (!dev_ctx->temp_resp)
+ err = -ENOMEM;
+ }
+ break;
+ case SE_IOCTL_GET_MU_INFO:
+ err = se_ioctl_get_mu_info(dev_ctx, arg);
+ break;
+ case SE_IOCTL_SETUP_IOBUF:
+ err = se_ioctl_setup_iobuf_handler(dev_ctx, arg);
+ break;
+ case SE_IOCTL_GET_SOC_INFO:
+ err = se_ioctl_get_se_soc_info_handler(dev_ctx, arg);
+ break;
+ case SE_IOCTL_CMD_SEND_RCV_RSP:
+ err = se_ioctl_cmd_snd_rcv_rsp_handler(dev_ctx, arg);
+ break;
+
+ default:
+ err = -EINVAL;
+ dev_dbg(se_if_priv->dev,
+ "%s: IOCTL %.8x not supported\n",
+ dev_ctx->miscdev.name,
+ cmd);
+ }
+
+ up(&dev_ctx->fops_lock);
+ return (long)err;
+}
+
+/* Char driver setup */
+static const struct file_operations se_if_fops = {
+ .open = se_if_fops_open,
+ .owner = THIS_MODULE,
+ .release = se_if_fops_close,
+ .unlocked_ioctl = se_ioctl,
+ .read = se_if_fops_read,
+ .write = se_if_fops_write,
+};
+
+/* interface for managed res to unregister a character device */
+static void if_misc_deregister(void *miscdevice)
+{
+ misc_deregister(miscdevice);
+}
+
/* interface for managed res to free a mailbox channel */
static void if_mbox_free_channel(void *mbox_chan)
{
@@ -274,6 +874,7 @@ static int se_probe_if_cleanup(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct se_if_priv *priv;
int ret = 0;
+ int i;
priv = dev_get_drvdata(dev);
@@ -293,6 +894,17 @@ static int se_probe_if_cleanup(struct platform_device *pdev)
priv->imem.buf = NULL;
}
+ if (priv->ctxs) {
+ for (i = 0; i < priv->max_dev_ctx; i++) {
+ if (priv->ctxs[i]) {
+ devm_remove_action(dev,
+ if_misc_deregister,
+ &priv->ctxs[i]->miscdev);
+ misc_deregister(&priv->ctxs[i]->miscdev);
+ }
+ }
+ }
+
/* No need to check, if reserved memory is allocated
* before calling for its release. Or clearing the
* un-set bit.
@@ -303,6 +915,74 @@ static int se_probe_if_cleanup(struct platform_device *pdev)
return ret;
}
+static int init_device_context(struct se_if_priv *priv)
+{
+ const struct imx_se_node_info *info = priv->info;
+ struct se_if_device_ctx *dev_ctx;
+ u8 *devname;
+ int ret = 0;
+ int i;
+
+ priv->ctxs = devm_kzalloc(priv->dev, sizeof(dev_ctx) * priv->max_dev_ctx,
+ GFP_KERNEL);
+
+ if (!priv->ctxs) {
+ ret = -ENOMEM;
+ return ret;
+ }
+
+ /* Create users */
+ for (i = 0; i < priv->max_dev_ctx; i++) {
+ dev_ctx = devm_kzalloc(priv->dev, sizeof(*dev_ctx), GFP_KERNEL);
+ if (!dev_ctx) {
+ ret = -ENOMEM;
+ return ret;
+ }
+
+ dev_ctx->dev = priv->dev;
+ dev_ctx->status = SE_IF_CTX_FREE;
+ dev_ctx->priv = priv;
+
+ priv->ctxs[i] = dev_ctx;
+
+ /* Default value invalid for an header. */
+ init_waitqueue_head(&dev_ctx->wq);
+
+ INIT_LIST_HEAD(&dev_ctx->pending_out);
+ INIT_LIST_HEAD(&dev_ctx->pending_in);
+ sema_init(&dev_ctx->fops_lock, 1);
+
+ devname = devm_kasprintf(priv->dev, GFP_KERNEL, "%s_ch%d",
+ info->se_name, i);
+ if (!devname) {
+ ret = -ENOMEM;
+ return ret;
+ }
+
+ dev_ctx->miscdev.name = devname;
+ dev_ctx->miscdev.minor = MISC_DYNAMIC_MINOR;
+ dev_ctx->miscdev.fops = &se_if_fops;
+ dev_ctx->miscdev.parent = priv->dev;
+ ret = misc_register(&dev_ctx->miscdev);
+ if (ret) {
+ dev_err(priv->dev, "failed to register misc device %d\n",
+ ret);
+ return ret;
+ }
+
+ ret = devm_add_action(priv->dev, if_misc_deregister,
+ &dev_ctx->miscdev);
+ if (ret) {
+ dev_err(priv->dev,
+ "failed[%d] to add action to the misc-dev\n",
+ ret);
+ return ret;
+ }
+ }
+
+ return ret;
+}
+
static void se_load_firmware(const struct firmware *fw, void *context)
{
struct se_if_priv *priv = (struct se_if_priv *) context;
@@ -463,6 +1143,16 @@ static int se_if_probe(struct platform_device *pdev)
ret = 0;
}
+ if (info->max_dev_ctx) {
+ ret = init_device_context(priv);
+ if (ret) {
+ dev_err(dev,
+ "Failed[0x%x] to create device contexts.\n",
+ ret);
+ goto exit;
+ }
+ }
+
dev_info(dev, "i.MX secure-enclave: %s interface to firmware, configured.\n",
info->se_name);
return ret;
@@ -507,6 +1197,10 @@ static int se_resume(struct device *dev)
{
struct se_if_priv *priv = dev_get_drvdata(dev);
const struct imx_se_node_info *info = priv->info;
+ int i;
+
+ for (i = 0; i < priv->max_dev_ctx; i++)
+ wake_up_interruptible(&priv->ctxs[i]->wq);
if (info && info->imem_mgmt)
se_restore_imem_state(priv);
diff --git a/drivers/firmware/imx/se_ctrl.h b/drivers/firmware/imx/se_ctrl.h
index 7d4f439a6158..7d7469348f1d 100644
--- a/drivers/firmware/imx/se_ctrl.h
+++ b/drivers/firmware/imx/se_ctrl.h
@@ -13,15 +13,62 @@
#define MAX_FW_LOAD_RETRIES 50
#define RES_STATUS(x) FIELD_GET(0x000000ff, x)
+#define MAX_DATA_SIZE_PER_USER (65 * 1024)
+#define MAX_NVM_MSG_LEN (256)
#define MESSAGING_VERSION_6 0x6
#define MESSAGING_VERSION_7 0x7
+#define SE_MU_IO_FLAGS_USE_SEC_MEM (0x02u)
+#define SE_MU_IO_FLAGS_USE_SHORT_ADDR (0x04u)
+
struct se_imem_buf {
u8 *buf;
phys_addr_t phyaddr;
u32 size;
};
+struct se_buf_desc {
+ u8 *shared_buf_ptr;
+ u8 *usr_buf_ptr;
+ u32 size;
+ struct list_head link;
+};
+
+/* Status of a char device */
+enum se_if_dev_ctx_status_t {
+ SE_IF_CTX_FREE,
+ SE_IF_CTX_OPENED
+};
+
+struct se_shared_mem {
+ dma_addr_t dma_addr;
+ u32 size;
+ u32 pos;
+ u8 *ptr;
+};
+
+/* Private struct for each char device instance. */
+struct se_if_device_ctx {
+ struct device *dev;
+ struct se_if_priv *priv;
+ struct miscdevice miscdev;
+
+ enum se_if_dev_ctx_status_t status;
+ wait_queue_head_t wq;
+ struct semaphore fops_lock;
+
+ u32 pending_hdr;
+ struct list_head pending_in;
+ struct list_head pending_out;
+
+ struct se_shared_mem secure_mem;
+ struct se_shared_mem non_secure_mem;
+
+ struct se_api_msg *temp_resp;
+ u32 temp_resp_size;
+ struct notifier_block se_notify;
+};
+
/* Header of the messages exchange with the EdgeLock Enclave */
struct se_msg_hdr {
u8 ver;
@@ -96,4 +143,6 @@ void free_phybuf_mem_pool(struct device *dev,
u8 *mem_pool_name,
u32 *buf,
u32 size);
+int se_dev_ctx_cpy_out_data(struct se_if_device_ctx *dev_ctx);
+void se_dev_ctx_shared_mem_cleanup(struct se_if_device_ctx *dev_ctx);
#endif
diff --git a/include/uapi/linux/se_ioctl.h b/include/uapi/linux/se_ioctl.h
new file mode 100644
index 000000000000..c2d0a92ef626
--- /dev/null
+++ b/include/uapi/linux/se_ioctl.h
@@ -0,0 +1,94 @@
+/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause*/
+/*
+ * Copyright 2024 NXP
+ */
+
+#ifndef SE_IOCTL_H
+#define SE_IOCTL_H
+
+/* IOCTL definitions. */
+
+struct se_ioctl_setup_iobuf {
+ u8 *user_buf;
+ u32 length;
+ u32 flags;
+ u64 ele_addr;
+};
+
+struct se_ioctl_shared_mem_cfg {
+ u32 base_offset;
+ u32 size;
+};
+
+struct se_ioctl_get_if_info {
+ u8 se_if_id;
+ u8 interrupt_idx;
+ u8 tz;
+ u8 did;
+ u8 cmd_tag;
+ u8 rsp_tag;
+ u8 success_tag;
+ u8 base_api_ver;
+ u8 fw_api_ver;
+};
+
+struct se_ioctl_cmd_snd_rcv_rsp_info {
+ u32 *tx_buf;
+ int tx_buf_sz;
+ u32 *rx_buf;
+ int rx_buf_sz;
+};
+
+struct se_ioctl_get_soc_info {
+ u16 soc_id;
+ u16 soc_rev;
+};
+
+/* IO Buffer Flags */
+#define SE_IO_BUF_FLAGS_IS_OUTPUT (0x00u)
+#define SE_IO_BUF_FLAGS_IS_INPUT (0x01u)
+#define SE_IO_BUF_FLAGS_USE_SEC_MEM (0x02u)
+#define SE_IO_BUF_FLAGS_USE_SHORT_ADDR (0x04u)
+#define SE_IO_BUF_FLAGS_IS_IN_OUT (0x10u)
+
+/* IOCTLS */
+#define SE_IOCTL 0x0A /* like MISC_MAJOR. */
+
+/*
+ * ioctl to designated the current fd as logical-reciever.
+ * This is ioctl is send when the nvm-daemon, a slave to the
+ * firmware is started by the user.
+ */
+#define SE_IOCTL_ENABLE_CMD_RCV _IO(SE_IOCTL, 0x01)
+
+/*
+ * ioctl to get the buffer allocated from the memory, which is shared
+ * between kernel and FW.
+ * Post allocation, the kernel tagged the allocated memory with:
+ * Output
+ * Input
+ * Input-Output
+ * Short address
+ * Secure-memory
+ */
+#define SE_IOCTL_SETUP_IOBUF _IOWR(SE_IOCTL, 0x03, \
+ struct se_ioctl_setup_iobuf)
+
+/*
+ * ioctl to get the mu information, that is used to exchange message
+ * with FW, from user-spaced.
+ */
+#define SE_IOCTL_GET_MU_INFO _IOR(SE_IOCTL, 0x04, \
+ struct se_ioctl_get_if_info)
+/*
+ * ioctl to get SoC Info from user-space.
+ */
+#define SE_IOCTL_GET_SOC_INFO _IOR(SE_IOCTL, 0x06, \
+ struct se_ioctl_get_soc_info)
+
+/*
+ * ioctl to send command and receive response from user-space.
+ */
+#define SE_IOCTL_CMD_SEND_RCV_RSP _IOWR(SE_IOCTL, 0x07, \
+ struct se_ioctl_cmd_snd_rcv_rsp_info)
+#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
2024-06-17 7:29 ` [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc Pankaj Gupta
@ 2024-06-17 16:37 ` Conor Dooley
2024-06-18 10:58 ` [EXT] " Pankaj Gupta
0 siblings, 1 reply; 24+ messages in thread
From: Conor Dooley @ 2024-06-17 16:37 UTC (permalink / raw)
To: Pankaj Gupta
Cc: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Rob Herring, Krzysztof Kozlowski, linux-doc, linux-kernel,
devicetree, imx, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 6285 bytes --]
On Mon, Jun 17, 2024 at 12:59:40PM +0530, Pankaj Gupta wrote:
> The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X etc.,
> creates an embedded secure enclave within the SoC boundary to enable
> features like:
> - HSM
> - SHE
> - V2X
>
> Secure-Enclave(s) communication interface are typically via message
> unit, i.e., based on mailbox linux kernel driver. This driver enables
> communication ensuring well defined message sequence protocol between
> Application Core and enclave's firmware.
>
> Driver configures multiple misc-device on the MU, for multiple
> user-space applications, to be able to communicate over single MU.
>
> It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
>
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> ---
> .../devicetree/bindings/firmware/fsl,imx-se.yaml | 160 +++++++++++++++++++++
> 1 file changed, 160 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> new file mode 100644
> index 000000000000..60ad1c4a3dfa
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> @@ -0,0 +1,160 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
> +
> +maintainers:
> + - Pankaj Gupta <pankaj.gupta@nxp.com>
> +
> +description: |
> + NXP's SoC may contain one or multiple embedded secure-enclave HW
> + IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
> + enables features like
> + - Hardware Security Module (HSM),
> + - Security Hardware Extension (SHE), and
> + - Vehicular to Anything (V2X)
> +
> + Communication interface to the secure-enclaves is based on the
> + messaging unit(s).
> +
> +properties:
> + $nodename:
> + pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
Just "firmware@<hex>" please.
> +
> + compatible:
> + enum:
> + - fsl,imx8ulp-se
> + - fsl,imx93-se
> + - fsl,imx95-se
> +
> + reg:
> + maxItems: 1
> + description: Identifier of the communication interface to secure-enclave.
> +
> + mboxes:
> + description: contain a list of phandles to mailboxes.
> + items:
> + - description: Specify the mailbox used to send message to se firmware
> + - description: Specify the mailbox used to receive message from se firmware
> +
> + mbox-names:
> + items:
> + - const: tx
> + - const: rx
> + - const: txdb
> + - const: rxdb
> + minItems: 2
> +
> + memory-region:
> + description: contains a list of phandles to reserved external memory.
> + items:
> + - description: It is used by secure-enclave firmware. It is an optional
> + property based on compatible and identifier to communication interface.
> + (see bindings/reserved-memory/reserved-memory.txt)
> +
> + sram:
> + description: contains a list of phandles to sram.
There's only 1 phandle allowed, don't describe it as a list.
Same for memory-region.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + - description: Phandle to the device SRAM. It is an optional property
> + based on compatible and identifier to communication interface.
> +
> +allOf:
> + # memory-region
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - fsl,imx8ulp-se
> + - fsl,imx93-se
> + then:
> + required:
> + - memory-region
> + else:
> + not:
> + required:
> + - memory-region
Use
else: properties: memory-region: false
Same for sram. Sort the allOf after required.
> +
> + # sram
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - fsl,imx8ulp-se
> + then:
> + required:
> + - sram
> + else:
> + not:
> + required:
> + - sram
> +
> +required:
> + - compatible
> + - reg
> + - mboxes
> + - mbox-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + firmware {
You've made up these firmware "buses" here, what purpose do they serve,
other than allowing you to have a reg property?
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ele-if@0 {
> + compatible = "fsl,imx8ulp-se";
> + reg = <0x0>;
What does the reg property even do? Is it ever more than 0? Can this
information be provided as a mbox cell?
> + mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> + mbox-names = "tx", "rx";
> + sram = <&sram0>;
> + memory-region = <&ele_reserved>;
> + };
> + };
> + - |
> + firmware {
These examples are all basically the same, drop all but one.
Thanks,
Conor.
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ele-if@0 {
> + compatible = "fsl,imx93-se";
> + reg = <0x0>;
> + mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> + mbox-names = "tx", "rx";
> + memory-region = <&ele_reserved>;
> + };
> + };
> + - |
> + firmware {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ele-if@0 {
> + compatible = "fsl,imx95-se";
> + reg = <0x0>;
> + mboxes = <&ele_mu0 0 0>, <&ele_mu0 1 0>;
> + mbox-names = "tx", "rx";
> + };
> + v2x-if@3 {
> + compatible = "fsl,imx95-se";
> + reg = <0x3>;
> + mboxes = <&v2x_mu 0 0>, <&v2x_mu 1 0>;
> + mbox-names = "tx", "rx";
> + };
> + v2x-if@4 {
> + compatible = "fsl,imx95-se";
> + reg = <0x4>;
> + mboxes = <&v2x_mu6 0 0>, <&v2x_mu6 1 0>;
> + mbox-names = "tx", "rx";
> + };
> + v2x-if@5 {
> + compatible = "fsl,imx95-se";
> + reg = <0x5>;
> + mboxes = <&v2x_mu7 0 0>, <&v2x_mu7 1 0>;
> + mbox-names = "tx", "rx";
> + };
> + };
> +...
>
> --
> 2.34.1
>
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave
2024-06-17 7:29 ` [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave Pankaj Gupta
@ 2024-06-18 8:31 ` Sascha Hauer
2024-07-01 7:45 ` [EXT] " Pankaj Gupta
0 siblings, 1 reply; 24+ messages in thread
From: Sascha Hauer @ 2024-06-18 8:31 UTC (permalink / raw)
To: Pankaj Gupta
Cc: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, devicetree, imx, linux-kernel,
linux-arm-kernel, linux-doc
Hi Pankaj,
Here's some review feedback. I think it'll take some more rounds to get
this into shape.
On Mon, Jun 17, 2024 at 12:59:42PM +0530, Pankaj Gupta wrote:
> NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE),
> are embedded in the SoC to support the features like HSM, SHE & V2X,
> using message based communication interface.
>
> The secure enclave FW communicates on a dedicated messaging unit(MU)
> based interface(s) with application core, where kernel is running.
> It exists on specific i.MX processors. e.g. i.MX8ULP, i.MX93.
>
> This patch adds the driver for communication interface to secure-enclave,
> for exchanging messages with NXP secure enclave HW IP(s) like EdgeLock
> Enclave (ELE) from Kernel-space, used by kernel management layers like
> - DM-Crypt.
>
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> ---
> drivers/firmware/imx/Kconfig | 12 +
> drivers/firmware/imx/Makefile | 2 +
> drivers/firmware/imx/ele_base_msg.c | 284 +++++++++++++++++++
> drivers/firmware/imx/ele_base_msg.h | 90 ++++++
> drivers/firmware/imx/ele_common.c | 233 ++++++++++++++++
> drivers/firmware/imx/ele_common.h | 45 +++
> drivers/firmware/imx/se_ctrl.c | 536 ++++++++++++++++++++++++++++++++++++
> drivers/firmware/imx/se_ctrl.h | 99 +++++++
> include/linux/firmware/imx/se_api.h | 14 +
> 9 files changed, 1315 insertions(+)
>
> diff --git a/drivers/firmware/imx/Kconfig b/drivers/firmware/imx/Kconfig
> index 183613f82a11..56bdca9bd917 100644
> --- a/drivers/firmware/imx/Kconfig
> +++ b/drivers/firmware/imx/Kconfig
> @@ -22,3 +22,15 @@ config IMX_SCU
>
> This driver manages the IPC interface between host CPU and the
> SCU firmware running on M4.
> +
> +config IMX_SEC_ENCLAVE
> + tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave Firmware driver."
> + depends on IMX_MBOX && ARCH_MXC && ARM64
> + default m if ARCH_MXC
> +
> + help
> + It is possible to use APIs exposed by the iMX Secure Enclave HW IP called:
> + - EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93),
> + like base, HSM, V2X & SHE using the SAB protocol via the shared Messaging
> + Unit. This driver exposes these interfaces via a set of file descriptors
> + allowing to configure shared memory, send and receive messages.
> diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile
> index 8f9f04a513a8..aa9033e0e9e3 100644
> --- a/drivers/firmware/imx/Makefile
> +++ b/drivers/firmware/imx/Makefile
> @@ -1,3 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
> obj-$(CONFIG_IMX_DSP) += imx-dsp.o
> obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o imx-scu-soc.o
> +sec_enclave-objs = se_ctrl.o ele_common.o ele_base_msg.o
> +obj-${CONFIG_IMX_SEC_ENCLAVE} += sec_enclave.o
> diff --git a/drivers/firmware/imx/ele_base_msg.c b/drivers/firmware/imx/ele_base_msg.c
> new file mode 100644
> index 000000000000..5bfd9c7e3f7e
> --- /dev/null
> +++ b/drivers/firmware/imx/ele_base_msg.c
> @@ -0,0 +1,284 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +#include <linux/types.h>
> +#include <linux/completion.h>
> +#include <linux/dma-mapping.h>
> +
> +#include "ele_base_msg.h"
> +#include "ele_common.h"
> +
> +int ele_get_info(struct device *dev, struct ele_dev_info *s_info)
> +{
I think all currently exported functions should take a struct se_if_priv
* as context pointer.
I can't find any place in which any of these functions is called
differently than with priv->dev.
> + struct se_if_priv *priv = dev_get_drvdata(dev);
> + struct se_api_msg *tx_msg __free(kfree) = NULL;
> + struct se_api_msg *rx_msg __free(kfree) = NULL;
> + phys_addr_t get_info_addr = 0;
> + u32 *get_info_data = NULL;
> + u32 status;
> + int ret = 0;
> +
> + memset(s_info, 0x0, sizeof(*s_info));
> +
> + if (priv->mem_pool_name)
> + get_info_data = get_phy_buf_mem_pool(dev,
> + priv->mem_pool_name,
> + &get_info_addr,
> + ELE_GET_INFO_BUFF_SZ);
> + else
> + get_info_data = dma_alloc_coherent(dev,
> + ELE_GET_INFO_BUFF_SZ,
> + &get_info_addr,
> + GFP_KERNEL);
> + if (!get_info_data) {
> + ret = -ENOMEM;
> + dev_dbg(dev,
> + "%s: Failed to allocate get_info_addr.\n",
> + __func__);
> + goto exit;
Just return here and you can drop the if(get_info_data) in the exit
path.
> + }
> +
> + tx_msg = kzalloc(ELE_GET_INFO_REQ_MSG_SZ, GFP_KERNEL);
> + if (!tx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + rx_msg = kzalloc(ELE_GET_INFO_RSP_MSG_SZ, GFP_KERNEL);
> + if (!rx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + ret = imx_se_fill_cmd_msg_hdr(priv,
> + (struct se_msg_hdr *)&tx_msg->header,
> + ELE_GET_INFO_REQ,
> + ELE_GET_INFO_REQ_MSG_SZ,
> + true);
> + if (ret)
> + goto exit;
> +
> + tx_msg->data[0] = upper_32_bits(get_info_addr);
> + tx_msg->data[1] = lower_32_bits(get_info_addr);
> + tx_msg->data[2] = sizeof(struct ele_dev_info);
Use sizeof(*s_info). It will increase the chance of doing the right
thing here on struct renames and such.
> + ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
> + if (ret < 0)
> + goto exit;
> +
> + ret = validate_rsp_hdr(priv,
> + &priv->rx_msg->header,
> + ELE_GET_INFO_REQ,
> + ELE_GET_INFO_RSP_MSG_SZ,
> + true);
> + if (ret)
> + goto exit;
> +
> + status = RES_STATUS(priv->rx_msg->data[0]);
> + if (status != priv->success_tag) {
> + dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
> + ELE_GET_INFO_REQ, status);
> + ret = -EPERM;
> + }
> +
> + memcpy(s_info, get_info_data, sizeof(struct ele_dev_info));
> +
> +exit:
> + if (get_info_addr) {
> + if (priv->mem_pool_name)
> + free_phybuf_mem_pool(dev, priv->mem_pool_name,
> + get_info_data, ELE_GET_INFO_BUFF_SZ);
> + else
> + dma_free_coherent(dev,
> + ELE_GET_INFO_BUFF_SZ,
> + get_info_data,
> + get_info_addr);
> + }
> +
> + return ret;
> +}
> +
> +int ele_fetch_soc_info(struct device *dev, u16 *soc_rev, u64 *serial_num)
> +{
> + struct ele_dev_info s_info = {0};
> + int err = 0;
> +
> + err = ele_get_info(dev, &s_info);
> + if (err < 0) {
> + dev_err(dev, "Error");
> + return err;
> + }
> +
> + *soc_rev = s_info.d_info.soc_rev;
> + *serial_num = GET_SERIAL_NUM_FROM_UID(s_info.d_info.uid, MAX_UID_SIZE >> 2);
> +
> + return err;
> +}
> +
> +int ele_ping(struct device *dev)
> +{
> + struct se_if_priv *priv = dev_get_drvdata(dev);
> + struct se_api_msg *tx_msg __free(kfree) = NULL;
> + struct se_api_msg *rx_msg __free(kfree) = NULL;
> + u32 status;
> + int ret = 0;
> +
> + tx_msg = kzalloc(ELE_PING_REQ_SZ, GFP_KERNEL);
> + if (!tx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + rx_msg = kzalloc(ELE_PING_RSP_SZ, GFP_KERNEL);
> + if (!rx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + ret = imx_se_fill_cmd_msg_hdr(priv,
> + (struct se_msg_hdr *)&tx_msg->header,
> + ELE_PING_REQ, ELE_PING_REQ_SZ, true);
> + if (ret) {
> + dev_err(dev, "Error: imx_se_fill_cmd_msg_hdr failed.\n");
> + goto exit;
> + }
> +
> + ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
> + if (ret)
> + goto exit;
> +
> + ret = validate_rsp_hdr(priv,
> + &priv->rx_msg->header,
> + ELE_PING_REQ,
> + ELE_PING_RSP_SZ,
> + true);
> + if (ret)
> + goto exit;
> +
> + status = RES_STATUS(priv->rx_msg->data[0]);
> + if (status != priv->success_tag) {
> + dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
> + ELE_PING_REQ, status);
> + ret = -EPERM;
> + }
> +exit:
> + return ret;
> +}
> +
> +int ele_service_swap(struct device *dev,
> + phys_addr_t addr,
> + u32 addr_size, u16 flag)
> +{
> + struct se_if_priv *priv = dev_get_drvdata(dev);
> + struct se_api_msg *tx_msg __free(kfree) = NULL;
> + struct se_api_msg *rx_msg __free(kfree) = NULL;
> + u32 status;
> + int ret = 0;
> +
> + tx_msg = kzalloc(ELE_SERVICE_SWAP_REQ_MSG_SZ, GFP_KERNEL);
> + if (!tx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + rx_msg = kzalloc(ELE_SERVICE_SWAP_RSP_MSG_SZ, GFP_KERNEL);
> + if (!rx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + ret = imx_se_fill_cmd_msg_hdr(priv,
> + (struct se_msg_hdr *)&tx_msg->header,
> + ELE_SERVICE_SWAP_REQ,
> + ELE_SERVICE_SWAP_REQ_MSG_SZ, true);
> + if (ret)
> + goto exit;
> +
> + tx_msg->data[0] = flag;
> + tx_msg->data[1] = addr_size;
> + tx_msg->data[2] = ELE_NONE_VAL;
> + tx_msg->data[3] = lower_32_bits(addr);
> + tx_msg->data[4] = imx_se_add_msg_crc((uint32_t *)&tx_msg[0],
> + ELE_SERVICE_SWAP_REQ_MSG_SZ);
> + ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
> + if (ret < 0)
> + goto exit;
> +
> + ret = validate_rsp_hdr(priv,
> + &priv->rx_msg->header,
> + ELE_SERVICE_SWAP_REQ,
> + ELE_SERVICE_SWAP_RSP_MSG_SZ,
> + true);
> + if (ret)
> + goto exit;
> +
> + status = RES_STATUS(priv->rx_msg->data[0]);
> + if (status != priv->success_tag) {
> + dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
> + ELE_SERVICE_SWAP_REQ, status);
> + ret = -EPERM;
> + } else {
> + if (flag == ELE_IMEM_EXPORT)
> + ret = priv->rx_msg->data[1];
> + else
> + ret = 0;
> + }
> +exit:
> +
> + return ret;
> +}
> +
> +int ele_fw_authenticate(struct device *dev, phys_addr_t addr)
> +{
> + struct se_if_priv *priv = dev_get_drvdata(dev);
> + struct se_api_msg *tx_msg __free(kfree) = NULL;
> + struct se_api_msg *rx_msg __free(kfree) = NULL;
> + u32 status;
> + int ret = 0;
> +
> + tx_msg = kzalloc(ELE_FW_AUTH_REQ_SZ, GFP_KERNEL);
> + if (!tx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + rx_msg = kzalloc(ELE_FW_AUTH_RSP_MSG_SZ, GFP_KERNEL);
> + if (!rx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> + ret = imx_se_fill_cmd_msg_hdr(priv,
> + (struct se_msg_hdr *)&tx_msg->header,
> + ELE_FW_AUTH_REQ,
> + ELE_FW_AUTH_REQ_SZ,
> + true);
> + if (ret)
> + goto exit;
> +
> + tx_msg->data[0] = addr;
> + tx_msg->data[1] = addr >> 32;
> + tx_msg->data[2] = addr;
Use upper_32_bits() and lower_32_bits() as done elsewhere.
> +
> + ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
> + if (ret < 0)
> + goto exit;
> +
> + ret = validate_rsp_hdr(priv,
> + &priv->rx_msg->header,
> + ELE_FW_AUTH_REQ,
> + ELE_FW_AUTH_RSP_MSG_SZ,
> + true);
You should use rx_msg here instead of priv->rx_msg. First of all it
makes the code clearer and also you take the mutex protecting
priv->rx_msg only inside of imx_ele_msg_send_rcv() which means
priv->rx_msg could have been set differently by a concurrent call
already.
Same applies to other places in this file.
> + if (ret)
> + goto exit;
> +
> + status = RES_STATUS(priv->rx_msg->data[0]);
> + if (status != priv->success_tag) {
Apart from priv->rx_msg (which you shouldn't use here) priv->success_tag
is the only member of struct se_if_priv that you actually use in this
file.
You could add a imx_ele_message_status() function to ele_common.c and
make struct se_if_priv opaque to this file.
> + dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
> + ELE_FW_AUTH_REQ, status);
> + ret = -EPERM;
> + }
> +exit:
> +
> + return ret;
> +}
> diff --git a/drivers/firmware/imx/ele_base_msg.h b/drivers/firmware/imx/ele_base_msg.h
> new file mode 100644
> index 000000000000..7838fe883810
> --- /dev/null
> +++ b/drivers/firmware/imx/ele_base_msg.h
> @@ -0,0 +1,90 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2024 NXP
> + *
> + * Header file for the EdgeLock Enclave Base API(s).
> + */
> +
> +#ifndef ELE_BASE_MSG_H
> +#define ELE_BASE_MSG_H
> +
> +#include <linux/device.h>
> +#include <linux/types.h>
> +
> +#define WORD_SZ 4
> +#define ELE_NONE_VAL 0x0
> +
> +#define ELE_GET_INFO_REQ 0xDA
> +#define ELE_GET_INFO_REQ_MSG_SZ 0x10
> +#define ELE_GET_INFO_RSP_MSG_SZ 0x08
> +
> +#define ELE_GET_INFO_BUFF_SZ 0x100
> +
> +#define DEFAULT_IMX_SOC_VER 0xA000
> +#define SOC_VER_MASK 0xFFFF0000
> +#define SOC_ID_MASK 0x0000FFFF
> +
> +#define MAX_UID_SIZE (16)
> +#define DEV_GETINFO_ROM_PATCH_SHA_SZ (32)
> +#define DEV_GETINFO_FW_SHA_SZ (32)
> +#define DEV_GETINFO_OEM_SRKH_SZ (64)
> +#define DEV_GETINFO_MIN_VER_MASK 0xFF
> +#define DEV_GETINFO_MAJ_VER_MASK 0xFF00
> +
> +struct dev_info {
> + uint8_t cmd;
> + uint8_t ver;
> + uint16_t length;
> + uint16_t soc_id;
> + uint16_t soc_rev;
> + uint16_t lmda_val;
> + uint8_t ssm_state;
> + uint8_t dev_atts_api_ver;
> + uint8_t uid[MAX_UID_SIZE];
> + uint8_t sha_rom_patch[DEV_GETINFO_ROM_PATCH_SHA_SZ];
> + uint8_t sha_fw[DEV_GETINFO_FW_SHA_SZ];
> +};
> +
> +struct dev_addn_info {
> + uint8_t oem_srkh[DEV_GETINFO_OEM_SRKH_SZ];
> + uint8_t trng_state;
> + uint8_t csal_state;
> + uint8_t imem_state;
> + uint8_t reserved2;
> +};
> +
> +struct ele_dev_info {
> + struct dev_info d_info;
> + struct dev_addn_info d_addn_info;
> +};
> +
> +#define GET_SERIAL_NUM_FROM_UID(x, uid_word_sz) \
> + (((u64)(((u32 *)(x))[(uid_word_sz) - 1]) << 32) | ((u32 *)(x))[0])
> +
> +#define ELE_PING_REQ 0x01
> +#define ELE_PING_REQ_SZ 0x04
> +#define ELE_PING_RSP_SZ 0x08
> +
> +#define ELE_SERVICE_SWAP_REQ 0xDF
> +#define ELE_SERVICE_SWAP_REQ_MSG_SZ 0x18
> +#define ELE_SERVICE_SWAP_RSP_MSG_SZ 0x0C
> +#define ELE_IMEM_SIZE 0x10000
> +#define ELE_IMEM_STATE_OK 0xCA
> +#define ELE_IMEM_STATE_BAD 0xFE
> +#define ELE_IMEM_STATE_WORD 0x27
> +#define ELE_IMEM_STATE_MASK 0x00ff0000
> +#define ELE_IMEM_EXPORT 0x1
> +#define ELE_IMEM_IMPORT 0x2
> +
> +#define ELE_FW_AUTH_REQ 0x02
> +#define ELE_FW_AUTH_REQ_SZ 0x10
> +#define ELE_FW_AUTH_RSP_MSG_SZ 0x08
> +
> +int ele_get_info(struct device *dev, struct ele_dev_info *s_info);
> +int ele_fetch_soc_info(struct device *dev, u16 *soc_rev, u64 *serial_num);
> +int ele_ping(struct device *dev);
> +int ele_service_swap(struct device *dev,
> + phys_addr_t addr,
> + u32 addr_size, u16 flag);
> +int ele_fw_authenticate(struct device *dev, phys_addr_t addr);
> +#endif
> diff --git a/drivers/firmware/imx/ele_common.c b/drivers/firmware/imx/ele_common.c
> new file mode 100644
> index 000000000000..0139748f7150
> --- /dev/null
> +++ b/drivers/firmware/imx/ele_common.c
> @@ -0,0 +1,233 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +#include "ele_base_msg.h"
> +#include "ele_common.h"
> +
> +u32 imx_se_add_msg_crc(u32 *msg, u32 msg_len)
> +{
> + u32 nb_words = msg_len / (u32)sizeof(u32);
> + u32 crc = 0;
> + u32 i;
> +
> + for (i = 0; i < nb_words - 1; i++)
> + crc ^= *(msg + i);
> +
> + return crc;
> +}
> +
> +int imx_ele_msg_rcv(struct se_if_priv *priv)
> +{
> + u32 wait;
> + int err = 0;
> +
> + lockdep_assert_held(&priv->se_if_cmd_lock);
> +
> + wait = msecs_to_jiffies(1000);
> + if (!wait_for_completion_timeout(&priv->done, wait)) {
> + dev_err(priv->dev,
> + "Error: wait_for_completion timed out.\n");
> + err = -ETIMEDOUT;
> + }
> +
> + return err;
> +}
> +
> +int imx_ele_msg_send(struct se_if_priv *priv, void *tx_msg)
> +{
> + struct se_msg_hdr *header;
> + int err;
> +
> + header = (struct se_msg_hdr *) tx_msg;
Unnecessary cast.
> +
> + if (header->tag == priv->cmd_tag)
> + lockdep_assert_held(&priv->se_if_cmd_lock);
> +
> + scoped_guard(mutex, &priv->se_if_lock);
> +
> + err = mbox_send_message(priv->tx_chan, tx_msg);
> + if (err < 0) {
> + dev_err(priv->dev, "Error: mbox_send_message failure.\n");
> + return err;
> + }
> +
> + return err;
> +}
> +
> +/* API used for send/receive blocking call. */
> +int imx_ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, void *rx_msg)
> +{
> + int err;
> +
> + scoped_guard(mutex, &priv->se_if_cmd_lock);
> + if (priv->waiting_rsp_dev) {
> + dev_warn(priv->dev,
> + "There should be no misc dev-ctx, waiting for resp.\n");
> + priv->waiting_rsp_dev = NULL;
> + }
> + priv->rx_msg = rx_msg;
> + err = imx_ele_msg_send(priv, tx_msg);
> + if (err < 0)
> + goto exit;
> +
> + err = imx_ele_msg_rcv(priv);
> +
> +exit:
> + return err;
> +}
> +
> +/*
> + * Callback called by mailbox FW, when data is received.
> + */
> +void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg)
> +{
> + struct device *dev = mbox_cl->dev;
> + struct se_if_priv *priv;
> + struct se_msg_hdr *header;
> +
> + priv = dev_get_drvdata(dev);
> +
> + /* The function can be called with NULL msg */
> + if (!msg) {
> + dev_err(dev, "Message is invalid\n");
Is it really worth spamming the log with this? It doesn't seem to
contain useful information.
> + return;
> + }
> +
> + header = (struct se_msg_hdr *) msg;
No need to cast explicitly.
> +
> + if (header->tag == priv->rsp_tag) {
> + if (!priv->waiting_rsp_dev) {
> + /*
> + * Reading the EdgeLock Enclave response
> + * to the command, sent by other
> + * linux kernel services.
> + */
> + spin_lock(&priv->lock);
> + memcpy(priv->rx_msg, msg, header->size << 2);
You should check that header->size << 2 fits into the rx_msg before
doing this.
> +
> + complete(&priv->done);
> + spin_unlock(&priv->lock);
> + return;
> + }
> + } else {
> + dev_err(dev, "Failed to select a device for message: %.8x\n",
> + *((u32 *) header));
> + return;
> + }
> +}
> +
> +int validate_rsp_hdr(struct se_if_priv *priv,
> + struct se_msg_hdr *header,
> + uint8_t msg_id,
> + uint8_t sz,
> + bool is_base_api)
> +{
> + if (header->tag != priv->rsp_tag) {
> + dev_err(priv->dev,
> + "MSG[0x%x] Hdr: Resp tag mismatch. (0x%x != 0x%x)",
> + msg_id, header->tag, priv->rsp_tag);
> + return -EINVAL;
> + }
> +
> + if (header->command != msg_id) {
> + dev_err(priv->dev,
> + "MSG Header: Cmd id mismatch. (0x%x != 0x%x)",
> + header->command, msg_id);
> + return -EINVAL;
> + }
> +
> + if (header->size != (sz >> 2)) {
> + dev_err(priv->dev,
> + "MSG[0x%x] Hdr: Cmd size mismatch. (0x%x != 0x%x)",
> + msg_id, header->size, (sz >> 2));
> + return -EINVAL;
> + }
> +
> + if (is_base_api && (header->ver != priv->base_api_ver)) {
> + dev_err(priv->dev,
> + "MSG[0x%x] Hdr: Base API Vers mismatch. (0x%x != 0x%x)",
> + msg_id, header->ver, priv->base_api_ver);
> + return -EINVAL;
> + } else if (!is_base_api && header->ver != priv->fw_api_ver) {
> + dev_err(priv->dev,
> + "MSG[0x%x] Hdr: FW API Vers mismatch. (0x%x != 0x%x)",
> + msg_id, header->ver, priv->fw_api_ver);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +int se_save_imem_state(struct se_if_priv *priv)
> +{
> + int ret;
> +
> + /* EXPORT command will save encrypted IMEM to given address,
> + * so later in resume, IMEM can be restored from the given
> + * address.
> + *
> + * Size must be at least 64 kB.
> + */
> + ret = ele_service_swap(priv->dev,
> + priv->imem.phyaddr,
> + ELE_IMEM_SIZE,
> + ELE_IMEM_EXPORT);
> + if (ret < 0)
> + dev_err(priv->dev, "Failed to export IMEM\n");
> + else
> + dev_info(priv->dev,
> + "Exported %d bytes of encrypted IMEM\n",
> + ret);
> +
> + return ret;
> +}
> +
> +int se_restore_imem_state(struct se_if_priv *priv)
> +{
> + struct ele_dev_info s_info;
> + int ret;
> +
> + /* get info from ELE */
> + ret = ele_get_info(priv->dev, &s_info);
> + if (ret) {
> + dev_err(priv->dev, "Failed to get info from ELE.\n");
> + return ret;
> + }
> +
> + /* Get IMEM state, if 0xFE then import IMEM */
> + if (s_info.d_addn_info.imem_state == ELE_IMEM_STATE_BAD) {
> + /* IMPORT command will restore IMEM from the given
> + * address, here size is the actual size returned by ELE
> + * during the export operation
> + */
> + ret = ele_service_swap(priv->dev,
> + priv->imem.phyaddr,
> + priv->imem.size,
> + ELE_IMEM_IMPORT);
> + if (ret) {
> + dev_err(priv->dev, "Failed to import IMEM\n");
> + goto exit;
> + }
> + } else
> + goto exit;
> +
> + /* After importing IMEM, check if IMEM state is equal to 0xCA
> + * to ensure IMEM is fully loaded and
> + * ELE functionality can be used.
> + */
> + ret = ele_get_info(priv->dev, &s_info);
> + if (ret) {
> + dev_err(priv->dev, "Failed to get info from ELE.\n");
> + goto exit;
> + }
> +
> + if (s_info.d_addn_info.imem_state == ELE_IMEM_STATE_OK)
> + dev_info(priv->dev, "Successfully restored IMEM\n");
> + else
> + dev_err(priv->dev, "Failed to restore IMEM\n");
> +
> +exit:
> + return ret;
> +}
> diff --git a/drivers/firmware/imx/ele_common.h b/drivers/firmware/imx/ele_common.h
> new file mode 100644
> index 000000000000..24569ad29a1f
> --- /dev/null
> +++ b/drivers/firmware/imx/ele_common.h
> @@ -0,0 +1,45 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +
> +#ifndef __ELE_COMMON_H__
> +#define __ELE_COMMON_H__
> +
> +#include "se_ctrl.h"
> +
> +#define ELE_SUCCESS_IND 0xD6
> +
> +#define IMX_ELE_FW_DIR "imx/ele/"
> +
> +uint32_t imx_se_add_msg_crc(uint32_t *msg, uint32_t msg_len);
> +int imx_ele_msg_rcv(struct se_if_priv *priv);
> +int imx_ele_msg_send(struct se_if_priv *priv, void *tx_msg);
> +int imx_ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, void *rx_msg);
> +void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg);
> +int validate_rsp_hdr(struct se_if_priv *priv,
> + struct se_msg_hdr *header,
> + uint8_t msg_id,
> + uint8_t sz,
> + bool is_base_api);
> +
> +/* Fill a command message header with a given command ID and length in bytes. */
> +static inline int imx_se_fill_cmd_msg_hdr(struct se_if_priv *priv,
> + struct se_msg_hdr *hdr,
> + u8 cmd,
> + u32 len,
> + bool is_base_api)
> +{
> + hdr->tag = priv->cmd_tag;
> + hdr->ver = (is_base_api) ? priv->base_api_ver : priv->fw_api_ver;
> + hdr->command = cmd;
> + hdr->size = len >> 2;
> +
> + return 0;
> +}
> +
> +int se_save_imem_state(struct se_if_priv *priv);
> +int se_restore_imem_state(struct se_if_priv *priv);
The function prefixes are still not consistent. We have imx_se_*,
imx_ele_*, ele_* and se_*. Unless these are really different things please
decide for one prefix.
> +
> +#endif /*__ELE_COMMON_H__ */
> diff --git a/drivers/firmware/imx/se_ctrl.c b/drivers/firmware/imx/se_ctrl.c
> new file mode 100644
> index 000000000000..a7a7cacb4416
> --- /dev/null
> +++ b/drivers/firmware/imx/se_ctrl.c
> @@ -0,0 +1,536 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +#include <linux/completion.h>
> +#include <linux/delay.h>
> +#include <linux/dev_printk.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/errno.h>
> +#include <linux/export.h>
> +#include <linux/firmware.h>
> +#include <linux/firmware/imx/se_api.h>
> +#include <linux/genalloc.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/miscdevice.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/module.h>
> +#include <linux/of_platform.h>
> +#include <linux/of_reserved_mem.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/string.h>
> +#include <linux/sys_soc.h>
> +
> +#include "ele_base_msg.h"
> +#include "ele_common.h"
> +#include "se_ctrl.h"
> +
> +#define RESERVED_DMA_POOL BIT(0)
> +
> +struct imx_se_node_info {
> + u8 se_if_id;
> + u8 se_if_did;
> + u8 max_dev_ctx;
> + u8 cmd_tag;
> + u8 rsp_tag;
> + u8 success_tag;
> + u8 base_api_ver;
> + u8 fw_api_ver;
> + u8 *se_name;
> + u8 *mbox_tx_name;
> + u8 *mbox_rx_name;
> + u8 *pool_name;
> + u8 *fw_name_in_rfs;
> + bool soc_register;
> + bool reserved_dma_ranges;
> + bool imem_mgmt;
> + int (*se_fetch_soc_info)(struct device *dev, u16 *soc_rev, u64 *serial_num);
> +};
> +
> +struct imx_se_node_info_list {
> + u8 num_mu;
> + u16 soc_id;
> + struct imx_se_node_info info[];
> +};
> +
> +static const struct imx_se_node_info_list imx8ulp_info = {
> + .num_mu = 1,
> + .soc_id = SOC_ID_OF_IMX8ULP,
> + .info = {
> + {
> + .se_if_id = 2,
> + .se_if_did = 7,
> + .max_dev_ctx = 4,
> + .cmd_tag = 0x17,
> + .rsp_tag = 0xe1,
> + .success_tag = ELE_SUCCESS_IND,
> + .base_api_ver = MESSAGING_VERSION_6,
> + .fw_api_ver = MESSAGING_VERSION_7,
> + .se_name = "hsm1",
> + .mbox_tx_name = "tx",
> + .mbox_rx_name = "rx",
> + .pool_name = "sram",
> + .fw_name_in_rfs = IMX_ELE_FW_DIR
> + "mx8ulpa2ext-ahab-container.img",
> + .soc_register = true,
> + .reserved_dma_ranges = true,
> + .imem_mgmt = true,
> + .se_fetch_soc_info = ele_fetch_soc_info,
> + },
> + },
> +};
> +
> +static const struct imx_se_node_info_list imx93_info = {
> + .num_mu = 1,
> + .soc_id = SOC_ID_OF_IMX93,
> + .info = {
> + {
> + .se_if_id = 2,
> + .se_if_did = 3,
> + .max_dev_ctx = 4,
> + .cmd_tag = 0x17,
> + .rsp_tag = 0xe1,
> + .success_tag = ELE_SUCCESS_IND,
> + .base_api_ver = MESSAGING_VERSION_6,
> + .fw_api_ver = MESSAGING_VERSION_7,
> + .se_name = "hsm1",
> + .mbox_tx_name = "tx",
> + .mbox_rx_name = "rx",
> + .reserved_dma_ranges = true,
> + .soc_register = true,
> + },
> + },
> +};
> +
> +static const struct of_device_id se_match[] = {
> + { .compatible = "fsl,imx8ulp-se", .data = (void *)&imx8ulp_info},
> + { .compatible = "fsl,imx93-se", .data = (void *)&imx93_info},
> + {},
> +};
> +
> +static const struct imx_se_node_info
> + *get_imx_se_node_info(const struct imx_se_node_info_list *info_list,
> + const u32 idx)
> +{
> + if (idx > info_list->num_mu)
> + return NULL;
> +
> + return &info_list->info[idx];
> +}
> +
> +void *get_phy_buf_mem_pool(struct device *dev,
> + u8 *mem_pool_name,
> + dma_addr_t *buf,
> + u32 size)
> +{
> + struct device_node *of_node = dev->of_node;
> + struct gen_pool *mem_pool;
> +
> + mem_pool = of_gen_pool_get(of_node, mem_pool_name, 0);
> + if (!mem_pool) {
> + dev_err(dev,
> + "Unable to get sram pool = %s\n",
> + mem_pool_name);
> + return 0;
> + }
> +
> + return gen_pool_dma_alloc(mem_pool, size, buf);
> +}
> +
> +void free_phybuf_mem_pool(struct device *dev,
> + u8 *mem_pool_name,
> + u32 *buf,
> + u32 size)
The function name is not consistent with the get_ function above (phybuf
vs. phy_buf). Also a function prefix would be nice.
> +{
> + struct device_node *of_node = dev->of_node;
> + struct gen_pool *mem_pool;
> +
> + mem_pool = of_gen_pool_get(of_node, mem_pool_name, 0);
> + if (!mem_pool)
> + dev_err(dev,
> + "%s: Failed: Unable to get sram pool.\n",
> + __func__);
> +
> + gen_pool_free(mem_pool, (u64)buf, size);
> +}
> +
> +static int imx_fetch_se_soc_info(struct se_if_priv *priv,
> + const struct imx_se_node_info_list *info_list)
> +{
> + const struct imx_se_node_info *info;
> + struct soc_device_attribute *attr;
> + struct soc_device *sdev;
> + u64 serial_num;
> + u16 soc_rev;
> + int err = 0;
> +
> + info = priv->info;
> +
> + /* This function should be called once.
> + * Check if the soc_rev is zero to continue.
> + */
> + if (priv->soc_rev)
> + return err;
Just return 0 here. It takes one step less to understand what this is
about.
> +
> + if (info->se_fetch_soc_info) {
> + err = info->se_fetch_soc_info(priv->dev, &soc_rev, &serial_num);
> + if (err < 0) {
> + dev_err(priv->dev, "Failed to fetch SoC Info.");
> + return err;
> + }
> + } else {
> + dev_err(priv->dev, "Failed to fetch SoC revision.");
> + if (info->soc_register)
> + dev_err(priv->dev, "Failed to do SoC registration.");
> + err = -EINVAL;
> + return err;
> + }
i.MX93 doesn't have a info->se_fetch_soc_info. Does this mean it doesn't
work on this SoC?
> +
> + priv->soc_rev = soc_rev;
> + if (!info->soc_register)
> + return 0;
> +
> + attr = devm_kzalloc(priv->dev, sizeof(*attr), GFP_KERNEL);
> + if (!attr)
> + return -ENOMEM;
> +
> + if (FIELD_GET(DEV_GETINFO_MIN_VER_MASK, soc_rev))
> + attr->revision = devm_kasprintf(priv->dev, GFP_KERNEL, "%x.%x",
> + FIELD_GET(DEV_GETINFO_MIN_VER_MASK,
> + soc_rev),
> + FIELD_GET(DEV_GETINFO_MAJ_VER_MASK,
> + soc_rev));
> + else
> + attr->revision = devm_kasprintf(priv->dev, GFP_KERNEL, "%x",
> + FIELD_GET(DEV_GETINFO_MAJ_VER_MASK,
> + soc_rev));
> +
> + switch (info_list->soc_id) {
> + case SOC_ID_OF_IMX8ULP:
> + attr->soc_id = devm_kasprintf(priv->dev, GFP_KERNEL,
> + "i.MX8ULP");
> + break;
> + case SOC_ID_OF_IMX93:
> + attr->soc_id = devm_kasprintf(priv->dev, GFP_KERNEL,
> + "i.MX93");
> + break;
> + }
> +
> + err = of_property_read_string(of_root, "model",
> + &attr->machine);
> + if (err)
> + return -EINVAL;
> +
> + attr->family = devm_kasprintf(priv->dev, GFP_KERNEL, "Freescale i.MX");
> +
> + attr->serial_number
> + = devm_kasprintf(priv->dev, GFP_KERNEL, "%016llX", serial_num);
> +
> + sdev = soc_device_register(attr);
> + if (IS_ERR(sdev))
> + return PTR_ERR(sdev);
> +
> + return 0;
> +}
> +
> +/* interface for managed res to free a mailbox channel */
> +static void if_mbox_free_channel(void *mbox_chan)
> +{
> + mbox_free_channel(mbox_chan);
> +}
> +
> +static int se_if_request_channel(struct device *dev,
> + struct mbox_chan **chan,
> + struct mbox_client *cl,
> + const char *name)
> +{
> + struct mbox_chan *t_chan;
> + int ret = 0;
> +
> + t_chan = mbox_request_channel_byname(cl, name);
> + if (IS_ERR(t_chan)) {
> + ret = PTR_ERR(t_chan);
> + return dev_err_probe(dev, ret,
> + "Failed to request %s channel.", name);
> + }
> +
> + ret = devm_add_action(dev, if_mbox_free_channel, t_chan);
> + if (ret) {
> + dev_err(dev, "failed to add devm removal of mbox %s\n", name);
> + goto exit;
> + }
> +
> + *chan = t_chan;
> +
> +exit:
> + return ret;
> +}
> +
> +static int se_probe_if_cleanup(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct se_if_priv *priv;
> + int ret = 0;
> +
> + priv = dev_get_drvdata(dev);
> +
> + if (priv->tx_chan)
> + mbox_free_channel(priv->tx_chan);
> + if (priv->rx_chan)
> + mbox_free_channel(priv->rx_chan);
In se_if_request_channel() you use devm_add_action() to free the mbox
channels. With this you release them twice.
> +
> + /* free the buffer in se remove, previously allocated
> + * in se probe to store encrypted IMEM
> + */
> + if (priv->imem.buf) {
> + dmam_free_coherent(dev,
> + ELE_IMEM_SIZE,
> + priv->imem.buf,
> + priv->imem.phyaddr);
> + priv->imem.buf = NULL;
> + }
> +
> + /* No need to check, if reserved memory is allocated
> + * before calling for its release. Or clearing the
> + * un-set bit.
> + */
> + of_reserved_mem_device_release(dev);
> + priv->flags &= (~RESERVED_DMA_POOL);
priv->flags is only set but never checked. Remove.
> +
> + return ret;
> +}
This function can't fail and I think it shouldn't be able to. Let it
return void.
> +
> +static void se_load_firmware(const struct firmware *fw, void *context)
> +{
> + struct se_if_priv *priv = (struct se_if_priv *) context;
> + const struct imx_se_node_info *info = priv->info;
> + const u8 *se_fw_name = info->fw_name_in_rfs;
> + phys_addr_t se_fw_phyaddr;
> + u8 *se_fw_buf;
> +
> + if (!fw) {
> + if (priv->fw_fail > MAX_FW_LOAD_RETRIES)
> + dev_dbg(priv->dev,
> + "External FW not found, using ROM FW.\n");
> + else {
> + /*add a bit delay to wait for firmware priv released */
> + msleep(20);
> +
> + /* Load firmware one more time if timeout */
> + request_firmware_nowait(THIS_MODULE,
> + FW_ACTION_UEVENT, info->fw_name_in_rfs,
> + priv->dev, GFP_KERNEL, priv,
> + se_load_firmware);
> + priv->fw_fail++;
> + dev_dbg(priv->dev, "Value of retries = 0x%x.\n",
> + priv->fw_fail);
> + }
> +
> + return;
> + }
> +
> + /* allocate buffer to store the SE FW */
> + se_fw_buf = dma_alloc_coherent(priv->dev, fw->size,
> + &se_fw_phyaddr, GFP_KERNEL);
> + if (!se_fw_buf) {
> + dev_err(priv->dev, "Failed to alloc SE fw buffer memory\n");
> + goto exit;
> + }
> +
> + memcpy(se_fw_buf, fw->data, fw->size);
> +
> + if (ele_fw_authenticate(priv->dev, se_fw_phyaddr))
> + dev_err(priv->dev,
> + "Failed to authenticate & load SE firmware %s.\n",
> + se_fw_name);
> +
> + dma_free_coherent(priv->dev,
> + fw->size,
> + se_fw_buf,
> + se_fw_phyaddr);
> +
> +exit:
> + release_firmware(fw);
> +}
> +
> +static int se_if_probe(struct platform_device *pdev)
> +{
> + const struct imx_se_node_info_list *info_list;
> + const struct imx_se_node_info *info;
> + struct device *dev = &pdev->dev;
> + struct se_if_priv *priv;
> + u32 idx;
> + int ret;
> +
> + if (of_property_read_u32(dev->of_node, "reg", &idx)) {
> + ret = -EINVAL;
> + goto exit;
> + }
> +
> + info_list = device_get_match_data(dev);
> + info = get_imx_se_node_info(info_list, idx);
> + if (!info) {
> + ret = -EINVAL;
> + goto exit;
> + }
> +
> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + dev_set_drvdata(dev, priv);
> +
> + /* Mailbox client configuration */
> + priv->se_mb_cl.dev = dev;
> + priv->se_mb_cl.tx_block = false;
> + priv->se_mb_cl.knows_txdone = true;
> + priv->se_mb_cl.rx_callback = se_if_rx_callback;
> +
> + ret = se_if_request_channel(dev, &priv->tx_chan,
> + &priv->se_mb_cl, info->mbox_tx_name);
> + if (ret)
> + goto exit;
> +
> + ret = se_if_request_channel(dev, &priv->rx_chan,
> + &priv->se_mb_cl, info->mbox_rx_name);
> + if (ret)
> + goto exit;
> +
> + priv->dev = dev;
> + priv->info = info;
> +
> + mutex_init(&priv->se_if_lock);
> + mutex_init(&priv->se_if_cmd_lock);
> +
> + priv->cmd_receiver_dev = NULL;
> + priv->waiting_rsp_dev = NULL;
These are NULL already.
> + priv->max_dev_ctx = info->max_dev_ctx;
> + priv->cmd_tag = info->cmd_tag;
> + priv->rsp_tag = info->rsp_tag;
> + priv->mem_pool_name = info->pool_name;
Instead of storing the mem_pool_name in priv you should call
of_gen_pool_get() directly here and store the returned mem_pool in priv.
It safes you from device tree parsing during runtime and makes the
runtime code simpler.
> + priv->success_tag = info->success_tag;
> + priv->base_api_ver = info->base_api_ver;
> + priv->fw_api_ver = info->fw_api_ver;
> +
> + init_completion(&priv->done);
> + spin_lock_init(&priv->lock);
> +
> + if (info->reserved_dma_ranges) {
> + ret = of_reserved_mem_device_init(dev);
> + if (ret) {
> + dev_err(dev,
> + "failed to init reserved memory region %d\n",
> + ret);
> + goto exit;
> + }
> + priv->flags |= RESERVED_DMA_POOL;
> + }
> +
> + ret = imx_fetch_se_soc_info(priv, info_list);
> + if (ret) {
> + dev_err(dev,
> + "failed[%pe] to fetch SoC Info\n", ERR_PTR(ret));
> + goto exit;
> + }
> +
> + if (info->imem_mgmt) {
> + /* allocate buffer where SE store encrypted IMEM */
> + priv->imem.buf = dmam_alloc_coherent(dev, ELE_IMEM_SIZE,
> + &priv->imem.phyaddr,
> + GFP_KERNEL);
> + if (!priv->imem.buf) {
> + dev_err(dev,
> + "dmam-alloc-failed: To store encr-IMEM.\n");
> + ret = -ENOMEM;
> + goto exit;
> + }
> + }
> +
> + if (info->fw_name_in_rfs) {
> + ret = request_firmware_nowait(THIS_MODULE,
> + FW_ACTION_UEVENT,
> + info->fw_name_in_rfs,
> + dev, GFP_KERNEL, priv,
> + se_load_firmware);
> + if (ret)
> + dev_warn(dev, "Failed to get firmware [%s].\n",
> + info->fw_name_in_rfs);
> + ret = 0;
> + }
> +
> + dev_info(dev, "i.MX secure-enclave: %s interface to firmware, configured.\n",
> + info->se_name);
> + return ret;
> +
> +exit:
> + /* if execution control reaches here, if probe fails.
> + * hence doing the cleanup
> + */
> + if (se_probe_if_cleanup(pdev))
> + dev_err(dev,
> + "Failed to clean-up the child node probe.\n");
> +
> + return ret;
> +}
> +
> +static int se_remove(struct platform_device *pdev)
> +{
> + if (se_probe_if_cleanup(pdev))
> + dev_err(&pdev->dev,
> + "i.MX Secure Enclave is not cleanly un-probed.");
> +
> + return 0;
> +}
> +
> +static int se_suspend(struct device *dev)
> +{
> + struct se_if_priv *priv = dev_get_drvdata(dev);
> + const struct imx_se_node_info *info = priv->info;
> + int ret = 0;
> +
> + if (info && info->imem_mgmt) {
> + ret = se_save_imem_state(priv);
> + if (ret < 0)
> + goto exit;
> + priv->imem.size = ret;
> + }
> +exit:
> + return ret;
> +}
> +
> +static int se_resume(struct device *dev)
> +{
> + struct se_if_priv *priv = dev_get_drvdata(dev);
> + const struct imx_se_node_info *info = priv->info;
> +
> + if (info && info->imem_mgmt)
> + se_restore_imem_state(priv);
> +
> + return 0;
> +}
> +
> +static const struct dev_pm_ops se_pm = {
> + RUNTIME_PM_OPS(se_suspend, se_resume, NULL)
> +};
> +
> +static struct platform_driver se_driver = {
> + .driver = {
> + .name = "fsl-se-fw",
> + .of_match_table = se_match,
> + .pm = &se_pm,
> + },
> + .probe = se_if_probe,
> + .remove = se_remove,
> +};
> +MODULE_DEVICE_TABLE(of, se_match);
> +
> +module_platform_driver(se_driver);
> +
> +MODULE_AUTHOR("Pankaj Gupta <pankaj.gupta@nxp.com>");
> +MODULE_DESCRIPTION("iMX Secure Enclave Driver.");
> +MODULE_LICENSE("GPL");
> diff --git a/drivers/firmware/imx/se_ctrl.h b/drivers/firmware/imx/se_ctrl.h
> new file mode 100644
> index 000000000000..7d4f439a6158
> --- /dev/null
> +++ b/drivers/firmware/imx/se_ctrl.h
> @@ -0,0 +1,99 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +#ifndef SE_MU_H
> +#define SE_MU_H
> +
> +#include <linux/miscdevice.h>
> +#include <linux/semaphore.h>
> +#include <linux/mailbox_client.h>
> +
> +#define MAX_FW_LOAD_RETRIES 50
> +
> +#define RES_STATUS(x) FIELD_GET(0x000000ff, x)
> +#define MESSAGING_VERSION_6 0x6
> +#define MESSAGING_VERSION_7 0x7
> +
> +struct se_imem_buf {
> + u8 *buf;
> + phys_addr_t phyaddr;
> + u32 size;
> +};
> +
> +/* Header of the messages exchange with the EdgeLock Enclave */
> +struct se_msg_hdr {
> + u8 ver;
> + u8 size;
> + u8 command;
> + u8 tag;
> +} __packed;
> +
> +#define SE_MU_HDR_SZ 4
> +
> +struct se_api_msg {
> + struct se_msg_hdr header;
> + u32 data[];
> +};
> +
> +struct se_if_priv {
> + struct se_if_device_ctx *cmd_receiver_dev;
> + /* Update to the waiting_rsp_dev, to be protected
> + * under se_if_lock.
> + */
> + struct se_if_device_ctx *waiting_rsp_dev;
> + /*
> + * prevent parallel access to the se interface registers
> + * e.g. a user trying to send a command while the other one is
> + * sending a response.
> + */
> + struct mutex se_if_lock;
> + /*
> + * prevent a command to be sent on the se interface while another one is
> + * still processing. (response to a command is allowed)
> + */
> + struct mutex se_if_cmd_lock;
> + struct device *dev;
> + u8 *mem_pool_name;
> + u8 cmd_tag;
> + u8 rsp_tag;
> + u8 success_tag;
> + u8 base_api_ver;
> + u8 fw_api_ver;
> + u32 fw_fail;
> + u16 soc_rev;
> + const void *info;
> +
> + struct mbox_client se_mb_cl;
> + struct mbox_chan *tx_chan, *rx_chan;
> +
> + /* Assignment of the rx_msg buffer to held till the
> + * received content as part callback function, is copied.
> + */
> + struct se_api_msg *rx_msg;
> + struct completion done;
> + spinlock_t lock;
> + /*
> + * Flag to retain the state of initialization done at
> + * the time of se-if probe.
> + */
> + uint32_t flags;
> + u8 max_dev_ctx;
> + struct se_if_device_ctx **ctxs;
> + struct se_imem_buf imem;
> +};
> +
> +void *get_phy_buf_mem_pool(struct device *dev,
> + u8 *mem_pool_name,
> + dma_addr_t *buf,
> + u32 size);
> +phys_addr_t get_phy_buf_mem_pool1(struct device *dev,
> + u8 *mem_pool_name,
> + u32 **buf,
> + u32 size);
This function prototype is unused.
Sascha
--
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31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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^ permalink raw reply [flat|nested] 24+ messages in thread
* RE: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
2024-06-17 16:37 ` Conor Dooley
@ 2024-06-18 10:58 ` Pankaj Gupta
2024-06-18 11:19 ` Conor Dooley
2024-06-24 13:12 ` Pankaj Gupta
0 siblings, 2 replies; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-18 10:58 UTC (permalink / raw)
To: Conor Dooley
Cc: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Rob Herring, Krzysztof Kozlowski, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org
> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Monday, June 17, 2024 10:07 PM
> To: Pankaj Gupta <pankaj.gupta@nxp.com>
> Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring <robh@kernel.org>;
> Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Sascha Hauer
> <s.hauer@pengutronix.de>; Pengutronix Kernel Team
> <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>; Rob
> Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; linux-doc@vger.kernel.org; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev;
> linux-arm-kernel@lists.infradead.org
> Subject: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding
> doc
>
> On Mon, Jun 17, 2024 at 12:59:40PM +0530, Pankaj Gupta wrote:
> > The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X etc.,
> > creates an embedded secure enclave within the SoC boundary to enable
> > features like:
> > - HSM
> > - SHE
> > - V2X
> >
> > Secure-Enclave(s) communication interface are typically via message
> > unit, i.e., based on mailbox linux kernel driver. This driver enables
> > communication ensuring well defined message sequence protocol between
> > Application Core and enclave's firmware.
> >
> > Driver configures multiple misc-device on the MU, for multiple
> > user-space applications, to be able to communicate over single MU.
> >
> > It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
> >
> > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > ---
> > .../devicetree/bindings/firmware/fsl,imx-se.yaml | 160
> +++++++++++++++++++++
> > 1 file changed, 160 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > new file mode 100644
> > index 000000000000..60ad1c4a3dfa
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > @@ -0,0 +1,160 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
> > +
> > +maintainers:
> > + - Pankaj Gupta <pankaj.gupta@nxp.com>
> > +
> > +description: |
> > + NXP's SoC may contain one or multiple embedded secure-enclave HW
> > + IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
> > + enables features like
> > + - Hardware Security Module (HSM),
> > + - Security Hardware Extension (SHE), and
> > + - Vehicular to Anything (V2X)
> > +
> > + Communication interface to the secure-enclaves is based on the
> > + messaging unit(s).
> > +
> > +properties:
> > + $nodename:
> > + pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
>
> Just "firmware@<hex>" please.
>
Modified as per your suggestion,
- pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
+ pattern: "^[0-9a-z]*-if@<hex>"
encountering the following error:
/home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: ele-if@0: $nodename:0: 'ele-if@0' does not match '^[0-9a-z]*-if@<hex>'
from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
/home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: v2x-if@3: $nodename:0: 'v2x-if@3' does not match '^[0-9a-z]*-if@<hex>'
from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
/home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: v2x-if@4: $nodename:0: 'v2x-if@4' does not match '^[0-9a-z]*-if@<hex>'
from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
/home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: v2x-if@5: $nodename:0: 'v2x-if@5' does not match '^[0-9a-z]*-if@<hex>'
from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
Please help and guide to resolve this comment, correctly.
Highly appreciated. Thanks.
> > +
> > + compatible:
> > + enum:
> > + - fsl,imx8ulp-se
> > + - fsl,imx93-se
> > + - fsl,imx95-se
> > +
> > + reg:
> > + maxItems: 1
> > + description: Identifier of the communication interface to secure-enclave.
> > +
> > + mboxes:
> > + description: contain a list of phandles to mailboxes.
> > + items:
> > + - description: Specify the mailbox used to send message to se firmware
> > + - description: Specify the mailbox used to receive message from
> > + se firmware
> > +
> > + mbox-names:
> > + items:
> > + - const: tx
> > + - const: rx
> > + - const: txdb
> > + - const: rxdb
> > + minItems: 2
> > +
> > + memory-region:
> > + description: contains a list of phandles to reserved external memory.
> > + items:
> > + - description: It is used by secure-enclave firmware. It is an optional
> > + property based on compatible and identifier to communication
> interface.
> > + (see bindings/reserved-memory/reserved-memory.txt)
> > +
> > + sram:
> > + description: contains a list of phandles to sram.
>
> There's only 1 phandle allowed, don't describe it as a list.
> Same for memory-region.
Accepted. Will do the following changes.
memory-region:
- description: contains a list of phandles to reserved external memory.
+ description: contains the phandle to reserved external memory.
sram:
- description: contains a list of phandles to sram.
- $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: contains the phandle to sram.
items:
>
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + items:
> > + - description: Phandle to the device SRAM. It is an optional property
> > + based on compatible and identifier to communication interface.
> > +
> > +allOf:
> > + # memory-region
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - fsl,imx8ulp-se
> > + - fsl,imx93-se
> > + then:
> > + required:
> > + - memory-region
>
> > + else:
> > + not:
> > + required:
> > + - memory-region
>
> Use
>
> else: properties: memory-region: false
>
> Same for sram.
Accepted will be corrected in V4.
# memory-region
- not:
- required:
- - memory-region
+ properties:
+ memory-region: false
# sram
else:
- not:
- required:
- - sram
+ properties:
+ sram: false
> Sort the allOf after required.
Accepted. Will move allOf after "additionalProperties:"
>
> > +
> > + # sram
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - fsl,imx8ulp-se
> > + then:
> > + required:
> > + - sram
> > + else:
> > + not:
> > + required:
> > + - sram
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - mboxes
> > + - mbox-names
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + firmware {
>
> You've made up these firmware "buses" here, what purpose do they serve,
> other than allowing you to have a reg property?
True.
Additionally, these are firmware nodes, these nodes are semantically put in firmware "buses".
>
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + ele-if@0 {
> > + compatible = "fsl,imx8ulp-se";
> > + reg = <0x0>;
>
> What does the reg property even do? Is it ever more than 0?
> Can this information be provided as a mbox cell?
Yes, there are more than 0 nodes for i.MX95 platforms, i.e., total of around 7 such nodes.
Reg property will help to identify the node id, by other kernel management layer like NVMEM (patches to follow).
>
> > + mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> > + mbox-names = "tx", "rx";
> > + sram = <&sram0>;
> > + memory-region = <&ele_reserved>;
> > + };
> > + };
> > + - |
> > + firmware {
>
> These examples are all basically the same, drop all but one.
Ok, will keep the example of i.MX95.
>
> Thanks,
> Conor.
>
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + ele-if@0 {
> > + compatible = "fsl,imx93-se";
> > + reg = <0x0>;
> > + mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> > + mbox-names = "tx", "rx";
> > + memory-region = <&ele_reserved>;
> > + };
> > + };
> > + - |
> > + firmware {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + ele-if@0 {
> > + compatible = "fsl,imx95-se";
> > + reg = <0x0>;
> > + mboxes = <&ele_mu0 0 0>, <&ele_mu0 1 0>;
> > + mbox-names = "tx", "rx";
> > + };
> > + v2x-if@3 {
> > + compatible = "fsl,imx95-se";
> > + reg = <0x3>;
> > + mboxes = <&v2x_mu 0 0>, <&v2x_mu 1 0>;
> > + mbox-names = "tx", "rx";
> > + };
> > + v2x-if@4 {
> > + compatible = "fsl,imx95-se";
> > + reg = <0x4>;
> > + mboxes = <&v2x_mu6 0 0>, <&v2x_mu6 1 0>;
> > + mbox-names = "tx", "rx";
> > + };
> > + v2x-if@5 {
> > + compatible = "fsl,imx95-se";
> > + reg = <0x5>;
> > + mboxes = <&v2x_mu7 0 0>, <&v2x_mu7 1 0>;
> > + mbox-names = "tx", "rx";
> > + };
> > + };
> > +...
> >
> > --
> > 2.34.1
> >
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
2024-06-18 10:58 ` [EXT] " Pankaj Gupta
@ 2024-06-18 11:19 ` Conor Dooley
2024-06-24 13:46 ` Pankaj Gupta
2024-06-24 13:12 ` Pankaj Gupta
1 sibling, 1 reply; 24+ messages in thread
From: Conor Dooley @ 2024-06-18 11:19 UTC (permalink / raw)
To: Pankaj Gupta
Cc: Conor Dooley, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
[-- Attachment #1: Type: text/plain, Size: 2746 bytes --]
On Tue, Jun 18, 2024 at 10:58:47AM +0000, Pankaj Gupta wrote:
> > From: Conor Dooley <conor@kernel.org>
> > On Mon, Jun 17, 2024 at 12:59:40PM +0530, Pankaj Gupta wrote:
> > > The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X etc.,
> > > creates an embedded secure enclave within the SoC boundary to enable
> > > features like:
> > > - HSM
> > > - SHE
> > > - V2X
> > >
> > > Secure-Enclave(s) communication interface are typically via message
> > > unit, i.e., based on mailbox linux kernel driver. This driver enables
> > > communication ensuring well defined message sequence protocol between
> > > Application Core and enclave's firmware.
> > >
> > > Driver configures multiple misc-device on the MU, for multiple
> > > user-space applications, to be able to communicate over single MU.
> > >
> > > It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
> > >
> > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > > ---
> > > .../devicetree/bindings/firmware/fsl,imx-se.yaml | 160
> > +++++++++++++++++++++
> > > 1 file changed, 160 insertions(+)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > new file mode 100644
> > > index 000000000000..60ad1c4a3dfa
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > @@ -0,0 +1,160 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
> > > +
> > > +maintainers:
> > > + - Pankaj Gupta <pankaj.gupta@nxp.com>
> > > +
> > > +description: |
> > > + NXP's SoC may contain one or multiple embedded secure-enclave HW
> > > + IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
> > > + enables features like
> > > + - Hardware Security Module (HSM),
> > > + - Security Hardware Extension (SHE), and
> > > + - Vehicular to Anything (V2X)
> > > +
> > > + Communication interface to the secure-enclaves is based on the
> > > + messaging unit(s).
> > > +
> > > +properties:
> > > + $nodename:
> > > + pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> >
> > Just "firmware@<hex>" please.
> >
>
> Modified as per your suggestion,
> - pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> + pattern: "^[0-9a-z]*-if@<hex>"
Firstly, that's not even what I said verbatim, which I could
understand. <hex> isn't even a valid bit of regex for this.
What I want to see is something like: "^firmware@[0-9a-f]+$"
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 1/5] Documentation/firmware: add imx/se to other_interfaces
2024-06-17 7:29 ` [PATCH v3 1/5] Documentation/firmware: add imx/se to other_interfaces Pankaj Gupta
@ 2024-06-18 21:13 ` Randy Dunlap
2024-06-19 7:30 ` [EXT] " Pankaj Gupta
0 siblings, 1 reply; 24+ messages in thread
From: Randy Dunlap @ 2024-06-18 21:13 UTC (permalink / raw)
To: Pankaj Gupta, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc, linux-kernel, devicetree, imx, linux-arm-kernel
Hi--
IMO there is an overuse of hyphens (dashes) here.
Please consider the changes below.
On 6/17/24 12:29 AM, Pankaj Gupta wrote:
> Documents i.MX SoC's Service layer and C_DEV driver for selected SoC(s)
> that contains the NXP hardware IP(s) for secure-enclaves(se) like:
Is the product referred to as "secure-enclaves"? If not, "secure enclaves"
should be sufficient.
Hm, https://www.nxp.com/products/nxp-product-information/nxp-product-programs/edgelock-secure-enclave:EDGELOCK-SECURE-ENCLAVE
just says "Secure Enclave".
> - NXP EdgeLock Enclave on i.MX93 & i.MX8ULP
>
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> ---
> .../driver-api/firmware/other_interfaces.rst | 119 +++++++++++++++++++++
> 1 file changed, 119 insertions(+)
>
> diff --git a/Documentation/driver-api/firmware/other_interfaces.rst b/Documentation/driver-api/firmware/other_interfaces.rst
> index 06ac89adaafb..65e69396e22a 100644
> --- a/Documentation/driver-api/firmware/other_interfaces.rst
> +++ b/Documentation/driver-api/firmware/other_interfaces.rst
> @@ -49,3 +49,122 @@ of the requests on to a secure monitor (EL3).
>
> .. kernel-doc:: drivers/firmware/stratix10-svc.c
> :export:
> +
> +NXP Secure Enclave Firmware Interface
> +=====================================
> +
> +Introduction
> +------------
> +The NXP's i.MX HW IP like EdgeLock-Enclave, V2X etc., creates an embedded secure
Edgelock Enclave
> +enclave within the SoC boundary to enable features like
> + - Hardware Security Module (HSM)
> + - Security Hardware Extension (SHE)
> + - Vehicular to Anything (V2X)
> +
> +Each of the above feature, is enabled through dedicated NXP H/W IP on the SoC.
features is enabled
> +On a single SoC, multiple hardware IP (or can say more than one secure enclave)
(or more than one secure enclave)
> +can exists.
can exist.
> +
> +NXP SoCs enabled with the such secure enclaves(SEs) IPs are:
with such
> +i.MX93, i.MX8ULP
> +
> +To communicate with one or more co-existing SE(s) on SoC, there is/are dedicated
hm, "co-existing" is a (UK) alternative for "coexisting" and since we accept
British spellings, it is OK.
> +messaging units(MU) per SE. Each co-existing 'se' can have one or multiple exclusive
why not 'SE'
?
> +MU(s), dedicated to itself. None of the MU is shared between two SEs.
MUs
or
MU(s)
> +Communication of the MU is realized using the Linux mailbox driver.
> +
> +NXP Secure Enclave(SE) Interface
> +--------------------------------
> +All those SE interfaces 'se-if' that is/are dedicated to a particular SE, will be
no comma ^
> +enumerated and provisioned under the very single 'SE' node.
> +
> +Each 'se-if', comprise of twp layers:
no comma ^ two
> +- (C_DEV Layer) User-Space software-access interface.
> +- (Service Layer) OS-level software-access interface.
> +
> + +--------------------------------------------+
> + | Character Device(C_DEV) |
> + | |
> + | +---------+ +---------+ +---------+ |
> + | | misc #1 | | misc #2 | ... | misc #n | |
> + | | dev | | dev | | dev | |
> + | +---------+ +---------+ +---------+ |
> + | +-------------------------+ |
> + | | Misc. Dev Synchr. Logic | |
> + | +-------------------------+ |
> + | |
> + +--------------------------------------------+
> +
> + +--------------------------------------------+
> + | Service Layer |
> + | |
> + | +-----------------------------+ |
> + | | Message Serialization Logic | |
> + | +-----------------------------+ |
> + | +---------------+ |
> + | | imx-mailbox | |
> + | | mailbox.c | |
> + | +---------------+ |
> + | |
> + +--------------------------------------------+
> +
> +- service layer:
> + This layer is responsible for ensuring the communication protocol, that is defined
no comma ^
> + for communication with firmware.
> +
> + FW Communication protocol ensures two things:
> + - Serializing the messages to be sent over an MU.
> +
> + - FW can handle one command-message at a time.
command message
> +
> +- c_dev:
> + This layer offers character device contexts, created as '/dev/<se>_mux_chx'.
> + Using these multiple device contexts, that are getting multiplexed over a single MU,
no comma ^ that are multiplexed over
> + user-space application(s) can call fops like write/read to send the command-message,
command message,
I prefer 'userspace' or 'user space' over 'user-space'. 'user-space' is the 3rd most used
of the 3 spellings in the kernel source tree.
> + and read back the command-response-message to/from Firmware.
command response message
> + fops like read & write uses the above defined service layer API(s) to communicate with
use
> + Firmware.
> +
> + Misc-device(/dev/<se>_mux_chn) synchronization protocol:
> +
> + Non-Secure + Secure
> + |
> + |
> + +---------+ +-------------+ |
> + | se_fw.c +<---->+imx-mailbox.c| |
> + | | | mailbox.c +<-->+------+ +------+
> + +---+-----+ +-------------+ | MU X +<-->+ ELE |
> + | +------+ +------+
> + +----------------+ |
> + | | |
> + v v |
> + logical logical |
> + receiver waiter |
> + + + |
> + | | |
> + | | |
> + | +----+------+ |
> + | | | |
> + | | | |
> + device_ctx device_ctx device_ctx |
> + |
> + User 0 User 1 User Y |
> + +------+ +------+ +------+ |
> + |misc.c| |misc.c| |misc.c| |
> + kernel space +------+ +------+ +------+ |
> + |
> + +------------------------------------------------------ |
> + | | | |
> + userspace /dev/ele_muXch0 | | |
> + /dev/ele_muXch1 | |
> + /dev/ele_muXchY |
> + |
> +
> +When a user sends a command to the firmware, it registers its device_ctx
> +as waiter of a response from firmware.
> +
> +Enclave's Firmware owns the storage management, over linux filesystem.
Linux
> +For this c_dev provisions a dedicated slave device called "receiver".
> +
> +.. kernel-doc:: drivers/firmware/imx/se_fw.c
> + :export:
>
--
~Randy
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] firmware: imx: adds miscdev
2024-06-17 7:29 ` [PATCH v3 5/5] firmware: imx: adds miscdev Pankaj Gupta
@ 2024-06-18 21:28 ` Randy Dunlap
2024-06-18 21:39 ` Randy Dunlap
2024-06-19 8:58 ` Pankaj Gupta
0 siblings, 2 replies; 24+ messages in thread
From: Randy Dunlap @ 2024-06-18 21:28 UTC (permalink / raw)
To: Pankaj Gupta, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc, linux-kernel, devicetree, imx, linux-arm-kernel
Hi--
On 6/17/24 12:29 AM, Pankaj Gupta wrote:
> Adds the driver for communication interface to secure-enclave,
> for exchanging messages with NXP secure enclave HW IP(s) like
> EdgeLock Enclave from:
> - User-Space Applications via character driver.
>
> ABI documentation for the NXP secure-enclave driver.
>
> User-space library using this driver:
> - i.MX Secure Enclave library:
> -- URL: https://github.com/nxp-imx/imx-secure-enclave.git,
> - i.MX Secure Middle-Ware:
> -- URL: https://github.com/nxp-imx/imx-smw.git
>
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> ---
> Documentation/ABI/testing/se-cdev | 42 +++
> drivers/firmware/imx/ele_common.c | 153 ++++++++-
> drivers/firmware/imx/ele_common.h | 4 +
> drivers/firmware/imx/se_ctrl.c | 694 ++++++++++++++++++++++++++++++++++++++
> drivers/firmware/imx/se_ctrl.h | 49 +++
> include/uapi/linux/se_ioctl.h | 94 ++++++
> 6 files changed, 1034 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/ABI/testing/se-cdev b/Documentation/ABI/testing/se-cdev
> new file mode 100644
> index 000000000000..699525af6b86
> --- /dev/null
> +++ b/Documentation/ABI/testing/se-cdev
> @@ -0,0 +1,42 @@
> +What: /dev/<se>_mu[0-9]+_ch[0-9]+
> +Date: May 2024
> +KernelVersion: 6.8
> +Contact: linux-imx@nxp.com, pankaj.gupta@nxp.com
> +Description:
> + NXP offers multiple hardware IP(s) for secure-enclaves like EdgeLock-
for secure enclaves
> + Enclave(ELE), SECO. The character device file-descriptors
file descriptors
and what is SECO?
> + /dev/<se>_mu*_ch* are the interface between user-space NXP's secure-
userspace secure
> + enclave shared-library and the kernel driver.
shared library
> +
> + The ioctl(2)-based ABI is defined and documented in
> + [include]<linux/firmware/imx/ele_mu_ioctl.h>
> + ioctl(s) are used primarily for:
> + - shared memory management
> + - allocation of I/O buffers
> + - get mu info
- getting mu info
> + - setting a dev-ctx as receiver that is slave to fw
> + - get SoC info
- getting SoC info
> +
> + The following file operations are supported:
> +
> + open(2)
> + Currently the only useful flags are O_RDWR.
> +
> + read(2)
> + Every read() from the opened character device context is waiting on
> + wakeup_intruptible, that gets set by the registered mailbox callback
typo in that name?
or is it something that this patch series introduces?
> + function; indicating a message received from the firmware on message-
function,
> + unit.
> +
> + write(2)
> + Every write() to the opened character device context needs to acquire
> + mailbox_lock, before sending message on to the message unit.
mailbox_lock before
> +
> + close(2)
> + Stops and free up the I/O contexts that was associated
frees up that were associated
> + with the file descriptor.
> +
> +Users: https://github.com/nxp-imx/imx-secure-enclave.git,
> + https://github.com/nxp-imx/imx-smw.git
> + crypto/skcipher,
> + drivers/nvmem/imx-ocotp-ele.c
--
~Randy
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/5] firmware: imx: adds miscdev
2024-06-18 21:28 ` Randy Dunlap
@ 2024-06-18 21:39 ` Randy Dunlap
2024-06-19 9:02 ` [EXT] " Pankaj Gupta
2024-06-19 8:58 ` Pankaj Gupta
1 sibling, 1 reply; 24+ messages in thread
From: Randy Dunlap @ 2024-06-18 21:39 UTC (permalink / raw)
To: Pankaj Gupta, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc, linux-kernel, devicetree, imx, linux-arm-kernel
Sorry, I missed one comment here:
On 6/18/24 2:28 PM, Randy Dunlap wrote:
> Hi--
>
> On 6/17/24 12:29 AM, Pankaj Gupta wrote:
>> Adds the driver for communication interface to secure-enclave,
>> for exchanging messages with NXP secure enclave HW IP(s) like
>> EdgeLock Enclave from:
>> - User-Space Applications via character driver.
>>
>> ABI documentation for the NXP secure-enclave driver.
>>
>> User-space library using this driver:
>> - i.MX Secure Enclave library:
>> -- URL: https://github.com/nxp-imx/imx-secure-enclave.git,
>> - i.MX Secure Middle-Ware:
>> -- URL: https://github.com/nxp-imx/imx-smw.git
>>
>> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
>> ---
>> Documentation/ABI/testing/se-cdev | 42 +++
>> drivers/firmware/imx/ele_common.c | 153 ++++++++-
>> drivers/firmware/imx/ele_common.h | 4 +
>> drivers/firmware/imx/se_ctrl.c | 694 ++++++++++++++++++++++++++++++++++++++
>> drivers/firmware/imx/se_ctrl.h | 49 +++
>> include/uapi/linux/se_ioctl.h | 94 ++++++
>> 6 files changed, 1034 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/ABI/testing/se-cdev b/Documentation/ABI/testing/se-cdev
>> new file mode 100644
>> index 000000000000..699525af6b86
>> --- /dev/null
>> +++ b/Documentation/ABI/testing/se-cdev
>> @@ -0,0 +1,42 @@
>> +What: /dev/<se>_mu[0-9]+_ch[0-9]+
>> +Date: May 2024
>> +KernelVersion: 6.8
>> +Contact: linux-imx@nxp.com, pankaj.gupta@nxp.com
>> +Description:
>> + NXP offers multiple hardware IP(s) for secure-enclaves like EdgeLock-
>
> for secure enclaves
>
>> + Enclave(ELE), SECO. The character device file-descriptors
>
> file descriptors
>
> and what is SECO?
>
>> + /dev/<se>_mu*_ch* are the interface between user-space NXP's secure-
>
> userspace secure
>
>> + enclave shared-library and the kernel driver.
>
> shared library
>
>> +
>> + The ioctl(2)-based ABI is defined and documented in
>> + [include]<linux/firmware/imx/ele_mu_ioctl.h>
>> + ioctl(s) are used primarily for:
>> + - shared memory management
>> + - allocation of I/O buffers
>> + - get mu info
>
> - getting mu info
>
>> + - setting a dev-ctx as receiver that is slave to fw
Documentation/process/coding-style.rst says not to introduce new uses of the
word "slave":
For symbol names and documentation, avoid introducing new usage of
'master / slave' (or 'slave' independent of 'master') and 'blacklist /
whitelist'.
Recommended replacements for 'master / slave' are:
'{primary,main} / {secondary,replica,subordinate}'
'{initiator,requester} / {target,responder}'
'{controller,host} / {device,worker,proxy}'
'leader / follower'
'director / performer'
>> + - get SoC info
>
> - getting SoC info
>
>> +
>> + The following file operations are supported:
>> +
>> + open(2)
>> + Currently the only useful flags are O_RDWR.
>> +
>> + read(2)
>> + Every read() from the opened character device context is waiting on
>> + wakeup_intruptible, that gets set by the registered mailbox callback
>
> typo in that name?
> or is it something that this patch series introduces?
>
>> + function; indicating a message received from the firmware on message-
>
> function,
>
>> + unit.
>> +
>> + write(2)
>> + Every write() to the opened character device context needs to acquire
>> + mailbox_lock, before sending message on to the message unit.
>
> mailbox_lock before
>
>> +
>> + close(2)
>> + Stops and free up the I/O contexts that was associated
>
> frees up that were associated
>
>> + with the file descriptor.
>> +
>> +Users: https://github.com/nxp-imx/imx-secure-enclave.git,
>> + https://github.com/nxp-imx/imx-smw.git
>> + crypto/skcipher,
>> + drivers/nvmem/imx-ocotp-ele.c
>
>
--
~Randy
^ permalink raw reply [flat|nested] 24+ messages in thread
* RE: [EXT] Re: [PATCH v3 1/5] Documentation/firmware: add imx/se to other_interfaces
2024-06-18 21:13 ` Randy Dunlap
@ 2024-06-19 7:30 ` Pankaj Gupta
0 siblings, 0 replies; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-19 7:30 UTC (permalink / raw)
To: Randy Dunlap, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
> -----Original Message-----
> From: Randy Dunlap <rdunlap@infradead.org>
> Sent: Wednesday, June 19, 2024 2:43 AM
> To: Pankaj Gupta <pankaj.gupta@nxp.com>; Jonathan Corbet
> <corbet@lwn.net>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Shawn Guo
> <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
> Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
> Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: linux-doc@vger.kernel.org; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org; imx@lists.linux.dev; linux-arm-
> kernel@lists.infradead.org
> Subject: [EXT] Re: [PATCH v3 1/5] Documentation/firmware: add imx/se to
> other_interfaces
>
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
>
>
> Hi--
>
> IMO there is an overuse of hyphens (dashes) here.
> Please consider the changes below.
>
>
> On 6/17/24 12:29 AM, Pankaj Gupta wrote:
> > Documents i.MX SoC's Service layer and C_DEV driver for selected
> > SoC(s) that contains the NXP hardware IP(s) for secure-enclaves(se) like:
>
> Is the product referred to as "secure-enclaves"? If not, "secure enclaves"
> should be sufficient.
Accepted. Will change the commit message to secure enclaves.
>
> Hm,
> https://www.nx/
> p.com%2Fproducts%2Fnxp-product-information%2Fnxp-product-
> programs%2Fedgelock-secure-enclave%3AEDGELOCK-SECURE-
> ENCLAVE&data=05%7C02%7Cpankaj.gupta%40nxp.com%7Cd2c1bbc9dac94194
> 038208dc8fdb78f1%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63
> 8543420025533954%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=
> KvsDrZLWefqpJ2%2FjMvOydr6T0xnZWhv0QhFz1cHa4kc%3D&reserved=0
> just says "Secure Enclave".
>
>
>
> > - NXP EdgeLock Enclave on i.MX93 & i.MX8ULP
> >
> > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > ---
> > .../driver-api/firmware/other_interfaces.rst | 119
> +++++++++++++++++++++
> > 1 file changed, 119 insertions(+)
> >
> > diff --git a/Documentation/driver-api/firmware/other_interfaces.rst
> > b/Documentation/driver-api/firmware/other_interfaces.rst
> > index 06ac89adaafb..65e69396e22a 100644
> > --- a/Documentation/driver-api/firmware/other_interfaces.rst
> > +++ b/Documentation/driver-api/firmware/other_interfaces.rst
> > @@ -49,3 +49,122 @@ of the requests on to a secure monitor (EL3).
> >
> > .. kernel-doc:: drivers/firmware/stratix10-svc.c
> > :export:
> > +
> > +NXP Secure Enclave Firmware Interface
> > +=====================================
> > +
> > +Introduction
> > +------------
> > +The NXP's i.MX HW IP like EdgeLock-Enclave, V2X etc., creates an
> > +embedded secure
>
> Edgelock Enclave
Accepted.
>
> > +enclave within the SoC boundary to enable features like
> > + - Hardware Security Module (HSM)
> > + - Security Hardware Extension (SHE)
> > + - Vehicular to Anything (V2X)
> > +
> > +Each of the above feature, is enabled through dedicated NXP H/W IP on the
> SoC.
>
> features is enabled
Accepted.
>
> > +On a single SoC, multiple hardware IP (or can say more than one
> > +secure enclave)
>
> (or more than one secure enclave)
>
> > +can exists.
>
> can exist.
>
Accepted.
> > +
> > +NXP SoCs enabled with the such secure enclaves(SEs) IPs are:
>
> with such
>
> > +i.MX93, i.MX8ULP
> > +
> > +To communicate with one or more co-existing SE(s) on SoC, there
> > +is/are dedicated
>
> hm, "co-existing" is a (UK) alternative for "coexisting" and since we accept
> British spellings, it is OK.
>
> > +messaging units(MU) per SE. Each co-existing 'se' can have one or
> > +multiple exclusive
>
> why not 'SE'
> ?
Accepted.
>
> > +MU(s), dedicated to itself. None of the MU is shared between two SEs.
>
> MUs or
> MU(s)
>
MUs, dedicated to itself.
> > +Communication of the MU is realized using the Linux mailbox driver.
> > +
> > +NXP Secure Enclave(SE) Interface
> > +--------------------------------
> > +All those SE interfaces 'se-if' that is/are dedicated to a particular
> > +SE, will be
>
> no comma ^
>
Accepted.
> > +enumerated and provisioned under the very single 'SE' node.
> > +
> > +Each 'se-if', comprise of twp layers:
>
> no comma ^ two
Accepted.
>
> > +- (C_DEV Layer) User-Space software-access interface.
> > +- (Service Layer) OS-level software-access interface.
> > +
> > + +--------------------------------------------+
> > + | Character Device(C_DEV) |
> > + | |
> > + | +---------+ +---------+ +---------+ |
> > + | | misc #1 | | misc #2 | ... | misc #n | |
> > + | | dev | | dev | | dev | |
> > + | +---------+ +---------+ +---------+ |
> > + | +-------------------------+ |
> > + | | Misc. Dev Synchr. Logic | |
> > + | +-------------------------+ |
> > + | |
> > + +--------------------------------------------+
> > +
> > + +--------------------------------------------+
> > + | Service Layer |
> > + | |
> > + | +-----------------------------+ |
> > + | | Message Serialization Logic | |
> > + | +-----------------------------+ |
> > + | +---------------+ |
> > + | | imx-mailbox | |
> > + | | mailbox.c | |
> > + | +---------------+ |
> > + | |
> > + +--------------------------------------------+
> > +
> > +- service layer:
> > + This layer is responsible for ensuring the communication protocol,
> > +that is defined
>
> no comma ^
>
Accepted.
> > + for communication with firmware.
> > +
> > + FW Communication protocol ensures two things:
> > + - Serializing the messages to be sent over an MU.
> > +
> > + - FW can handle one command-message at a time.
>
> command message
>
Accepted.
> > +
> > +- c_dev:
> > + This layer offers character device contexts, created as '/dev/<se>_mux_chx'.
> > + Using these multiple device contexts, that are getting multiplexed
> > +over a single MU,
>
> no comma ^ that are multiplexed over
>
Accepted.
>
> > + user-space application(s) can call fops like write/read to send the
> > + command-message,
>
> command message,
Accepted.
>
> I prefer 'userspace' or 'user space' over 'user-space'. 'user-space' is the 3rd
> most used of the 3 spellings in the kernel source tree.
>
Accepted. Used userspace
> > + and read back the command-response-message to/from Firmware.
>
> command response message
>
Accepted.
> > + fops like read & write uses the above defined service layer API(s)
> > + to communicate with
>
> use
>
> > + Firmware.
> > +
> > + Misc-device(/dev/<se>_mux_chn) synchronization protocol:
> > +
> > + Non-Secure + Secure
> > + |
> > + |
> > + +---------+ +-------------+ |
> > + | se_fw.c +<---->+imx-mailbox.c| |
> > + | | | mailbox.c +<-->+------+ +------+
> > + +---+-----+ +-------------+ | MU X +<-->+ ELE |
> > + | +------+ +------+
> > + +----------------+ |
> > + | | |
> > + v v |
> > + logical logical |
> > + receiver waiter |
> > + + + |
> > + | | |
> > + | | |
> > + | +----+------+ |
> > + | | | |
> > + | | | |
> > + device_ctx device_ctx device_ctx |
> > + |
> > + User 0 User 1 User Y |
> > + +------+ +------+ +------+ |
> > + |misc.c| |misc.c| |misc.c| |
> > + kernel space +------+ +------+ +------+ |
> > + |
> > + +------------------------------------------------------ |
> > + | | | |
> > + userspace /dev/ele_muXch0 | | |
> > + /dev/ele_muXch1 | |
> > + /dev/ele_muXchY |
> > + |
> > +
> > +When a user sends a command to the firmware, it registers its
> > +device_ctx as waiter of a response from firmware.
> > +
> > +Enclave's Firmware owns the storage management, over linux filesystem.
>
> Linux
Accepted.
>
> > +For this c_dev provisions a dedicated slave device called "receiver".
> > +
> > +.. kernel-doc:: drivers/firmware/imx/se_fw.c
> > + :export:
> >
>
> --
> ~Randy
^ permalink raw reply [flat|nested] 24+ messages in thread
* RE: [EXT] Re: [PATCH v3 5/5] firmware: imx: adds miscdev
2024-06-18 21:28 ` Randy Dunlap
2024-06-18 21:39 ` Randy Dunlap
@ 2024-06-19 8:58 ` Pankaj Gupta
1 sibling, 0 replies; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-19 8:58 UTC (permalink / raw)
To: Randy Dunlap, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
> -----Original Message-----
> From: Randy Dunlap <rdunlap@infradead.org>
> Sent: Wednesday, June 19, 2024 2:59 AM
> To: Pankaj Gupta <pankaj.gupta@nxp.com>; Jonathan Corbet
> <corbet@lwn.net>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Shawn Guo
> <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
> Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
> Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: linux-doc@vger.kernel.org; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org; imx@lists.linux.dev; linux-arm-
> kernel@lists.infradead.org
> Subject: [EXT] Re: [PATCH v3 5/5] firmware: imx: adds miscdev
>
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
>
>
> Hi--
>
> On 6/17/24 12:29 AM, Pankaj Gupta wrote:
> > Adds the driver for communication interface to secure-enclave, for
> > exchanging messages with NXP secure enclave HW IP(s) like EdgeLock
> > Enclave from:
> > - User-Space Applications via character driver.
> >
> > ABI documentation for the NXP secure-enclave driver.
> >
> > User-space library using this driver:
> > - i.MX Secure Enclave library:
> > -- URL:
> > https://gith/
> > ub.com%2Fnxp-imx%2Fimx-secure-
> enclave.git&data=05%7C02%7Cpankaj.gupta%
> >
> 40nxp.com%7Cd87070a111b24f3791e208dc8fdda85c%7C686ea1d3bc2b4c6fa9
> 2cd99
> >
> c5c301635%7C0%7C0%7C638543429374404433%7CUnknown%7CTWFpbGZsb
> 3d8eyJWIjo
> >
> iMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7
> C%7C%
> >
> 7C&sdata=IYktUuoqdZgqHC%2FR1DbjAjQfhKDSjb%2Butki3j8LKBIk%3D&reserve
> d=0
> > ,
> > - i.MX Secure Middle-Ware:
> > -- URL:
> > https://gith/
> > ub.com%2Fnxp-imx%2Fimx-
> smw.git&data=05%7C02%7Cpankaj.gupta%40nxp.com%7
> >
> Cd87070a111b24f3791e208dc8fdda85c%7C686ea1d3bc2b4c6fa92cd99c5c3016
> 35%7
> >
> C0%7C0%7C638543429374411486%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiM
> C4wLjAwMD
> >
> AiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdat
> a=GM
> > BlK9xKKdk6dAOMAMhaPoCRGFr%2FJTeuL9omwMvV49I%3D&reserved=0
> >
> > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > ---
> > Documentation/ABI/testing/se-cdev | 42 +++
> > drivers/firmware/imx/ele_common.c | 153 ++++++++-
> > drivers/firmware/imx/ele_common.h | 4 +
> > drivers/firmware/imx/se_ctrl.c | 694
> ++++++++++++++++++++++++++++++++++++++
> > drivers/firmware/imx/se_ctrl.h | 49 +++
> > include/uapi/linux/se_ioctl.h | 94 ++++++
> > 6 files changed, 1034 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/ABI/testing/se-cdev
> > b/Documentation/ABI/testing/se-cdev
> > new file mode 100644
> > index 000000000000..699525af6b86
> > --- /dev/null
> > +++ b/Documentation/ABI/testing/se-cdev
> > @@ -0,0 +1,42 @@
> > +What: /dev/<se>_mu[0-9]+_ch[0-9]+
> > +Date: May 2024
> > +KernelVersion: 6.8
> > +Contact: linux-imx@nxp.com, pankaj.gupta@nxp.com
> > +Description:
> > + NXP offers multiple hardware IP(s) for secure-enclaves
> > +like EdgeLock-
>
> for secure enclaves
Accepted.
>
> > + Enclave(ELE), SECO. The character device
> > + file-descriptors
>
> file descriptors
>
Accepted.
> and what is SECO?
There are multiple NXP IP(s) for secure enclaves.
Like: 1. EdgeLock Enclave(i.MX8ULP, i.MX9x),
2. SECO(i.MX8DXL),
3. V2X-HSM(i.MX8DXL/QXP/ULP, i.MX9x),
4. V2X-SHE(i.MX8DXL/QXP/ULP, i.MX9x),
>
> > + /dev/<se>_mu*_ch* are the interface between user-space
> > + NXP's secure-
>
> userspace secure
>
> > + enclave shared-library and the kernel driver.
>
> shared library
>
Accepted.
> > +
> > + The ioctl(2)-based ABI is defined and documented in
> > + [include]<linux/firmware/imx/ele_mu_ioctl.h>
> > + ioctl(s) are used primarily for:
> > + - shared memory management
> > + - allocation of I/O buffers
> > + - get mu info
>
> - getting mu info
>
Accepted.
> > + - setting a dev-ctx as receiver that is slave to fw
> > + - get SoC info
>
> - getting SoC info
Accepted.
>
> > +
> > + The following file operations are supported:
> > +
> > + open(2)
> > + Currently the only useful flags are O_RDWR.
> > +
> > + read(2)
> > + Every read() from the opened character device context is waiting on
> > + wakeup_intruptible, that gets set by the registered
> > + mailbox callback
>
> typo in that name?
> or is it something that this patch series introduces?
>
Replaced "wakeup_intruptible" with "wait_event_interruptible".
> > + function; indicating a message received from the
> > + firmware on message-
>
> function,
>
Accepted.
> > + unit.
> > +
> > + write(2)
> > + Every write() to the opened character device context needs to
> acquire
> > + mailbox_lock, before sending message on to the message unit.
>
> mailbox_lock before
>
Accepted.
> > +
> > + close(2)
> > + Stops and free up the I/O contexts that was associated
>
> frees up that were associated
>
Accepted.
> > + with the file descriptor.
> > +
> > +Users:
> https://github.c/
> om%2Fnxp-imx%2Fimx-secure-
> enclave.git&data=05%7C02%7Cpankaj.gupta%40nxp.com%7Cd87070a111b24f3
> 791e208dc8fdda85c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6
> 38543429374416161%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDA
> iLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata
> =yEk2XgoKnQM6HqBqrI3Pu%2BYMSRld%2FY%2B1GCSyRgeM%2FAw%3D&rese
> rved=0,
> > +
> https://github.c/
> om%2Fnxp-imx%2Fimx-
> smw.git&data=05%7C02%7Cpankaj.gupta%40nxp.com%7Cd87070a111b24f379
> 1e208dc8fdda85c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638
> 543429374419836%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiL
> CJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=u
> ND49ren%2FYcUM3kDOBRBYj6S8vbGbNDmzj2%2BZU5Xy18%3D&reserved=0
> > + crypto/skcipher,
> > + drivers/nvmem/imx-ocotp-ele.c
>
>
> --
> ~Randy
^ permalink raw reply [flat|nested] 24+ messages in thread
* RE: [EXT] Re: [PATCH v3 5/5] firmware: imx: adds miscdev
2024-06-18 21:39 ` Randy Dunlap
@ 2024-06-19 9:02 ` Pankaj Gupta
0 siblings, 0 replies; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-19 9:02 UTC (permalink / raw)
To: Randy Dunlap, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski
Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
> -----Original Message-----
> From: Randy Dunlap <rdunlap@infradead.org>
> Sent: Wednesday, June 19, 2024 3:09 AM
> To: Pankaj Gupta <pankaj.gupta@nxp.com>; Jonathan Corbet
> <corbet@lwn.net>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Shawn Guo
> <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
> Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
> Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: linux-doc@vger.kernel.org; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org; imx@lists.linux.dev; linux-arm-
> kernel@lists.infradead.org
> Subject: [EXT] Re: [PATCH v3 5/5] firmware: imx: adds miscdev
>
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
>
>
> Sorry, I missed one comment here:
>
>
> On 6/18/24 2:28 PM, Randy Dunlap wrote:
> > Hi--
> >
> > On 6/17/24 12:29 AM, Pankaj Gupta wrote:
> >> Adds the driver for communication interface to secure-enclave, for
> >> exchanging messages with NXP secure enclave HW IP(s) like EdgeLock
> >> Enclave from:
> >> - User-Space Applications via character driver.
> >>
> >> ABI documentation for the NXP secure-enclave driver.
> >>
> >> User-space library using this driver:
> >> - i.MX Secure Enclave library:
> >> -- URL:
> >> https://git/
> >> hub.com%2Fnxp-imx%2Fimx-secure-
> enclave.git&data=05%7C02%7Cpankaj.gupt
> >>
> a%40nxp.com%7C5a42a8d6ea17423104e408dc8fdf1a0a%7C686ea1d3bc2b4c6f
> a92c
> >>
> d99c5c301635%7C0%7C0%7C638543435571166030%7CUnknown%7CTWFpbG
> Zsb3d8eyJ
> >>
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
> 0%7
> >>
> C%7C%7C&sdata=vLyxSGFLArjDy5s2ebW%2Fw6EZI22QHWoKqHvrov15JI0%3D&
> reserv
> >> ed=0,
> >> - i.MX Secure Middle-Ware:
> >> -- URL:
> >> https://git/
> >> hub.com%2Fnxp-imx%2Fimx-
> smw.git&data=05%7C02%7Cpankaj.gupta%40nxp.com
> >> %7C5a42a8d6ea17423104e408dc8fdf1a0a%7C686ea1d3bc2b4c6fa92cd99c5
> c30163
> >>
> 5%7C0%7C0%7C638543435571176586%7CUnknown%7CTWFpbGZsb3d8eyJWIj
> oiMC4wLj
> >>
> AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7
> C&sda
> >>
> ta=QFrkeMwm1yT1s2gyjmFHkVGhV%2BegAFKx84b5mmFsTOY%3D&reserved=0
> >>
> >> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> >> ---
> >> Documentation/ABI/testing/se-cdev | 42 +++
> >> drivers/firmware/imx/ele_common.c | 153 ++++++++-
> >> drivers/firmware/imx/ele_common.h | 4 +
> >> drivers/firmware/imx/se_ctrl.c | 694
> ++++++++++++++++++++++++++++++++++++++
> >> drivers/firmware/imx/se_ctrl.h | 49 +++
> >> include/uapi/linux/se_ioctl.h | 94 ++++++
> >> 6 files changed, 1034 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/Documentation/ABI/testing/se-cdev
> >> b/Documentation/ABI/testing/se-cdev
> >> new file mode 100644
> >> index 000000000000..699525af6b86
> >> --- /dev/null
> >> +++ b/Documentation/ABI/testing/se-cdev
> >> @@ -0,0 +1,42 @@
> >> +What: /dev/<se>_mu[0-9]+_ch[0-9]+
> >> +Date: May 2024
> >> +KernelVersion: 6.8
> >> +Contact: linux-imx@nxp.com, pankaj.gupta@nxp.com
> >> +Description:
> >> + NXP offers multiple hardware IP(s) for secure-enclaves
> >> +like EdgeLock-
> >
> > for secure enclaves
> >
> >> + Enclave(ELE), SECO. The character device
> >> + file-descriptors
> >
> > file
> > descriptors
> >
> > and what is SECO?
> >
> >> + /dev/<se>_mu*_ch* are the interface between user-space
> >> + NXP's secure-
> >
> > userspace secure
> >
> >> + enclave shared-library and the kernel driver.
> >
> > shared library
> >
> >> +
> >> + The ioctl(2)-based ABI is defined and documented in
> >> + [include]<linux/firmware/imx/ele_mu_ioctl.h>
> >> + ioctl(s) are used primarily for:
> >> + - shared memory management
> >> + - allocation of I/O buffers
> >> + - get mu info
> >
> > - getting mu info
> >
> >> + - setting a dev-ctx as receiver that is slave to
> >> + fw
>
> Documentation/process/coding-style.rst says not to introduce new uses of the
> word "slave":
>
> For symbol names and documentation, avoid introducing new usage of 'master
> / slave' (or 'slave' independent of 'master') and 'blacklist / whitelist'.
>
Accepted.
- - setting a dev-ctx as receiver that is slave to fw
+ - setting a dev-ctx as receiver to receive all the commands from FW
> Recommended replacements for 'master / slave' are:
> '{primary,main} / {secondary,replica,subordinate}'
> '{initiator,requester} / {target,responder}'
> '{controller,host} / {device,worker,proxy}'
> 'leader / follower'
> 'director / performer'
>
>
> >> + - get SoC info
> >
> > - getting SoC info
> >
> >> +
> >> + The following file operations are supported:
> >> +
> >> + open(2)
> >> + Currently the only useful flags are O_RDWR.
> >> +
> >> + read(2)
> >> + Every read() from the opened character device context is waiting on
> >> + wakeup_intruptible, that gets set by the registered
> >> + mailbox callback
> >
> > typo in that name?
> > or is it something that this patch series introduces?
> >
> >> + function; indicating a message received from the
> >> + firmware on message-
> >
> > function,
> >
> >> + unit.
> >> +
> >> + write(2)
> >> + Every write() to the opened character device context needs to
> acquire
> >> + mailbox_lock, before sending message on to the message unit.
> >
> > mailbox_lock before
> >
> >> +
> >> + close(2)
> >> + Stops and free up the I/O contexts that was associated
> >
> > frees up that were associated
> >
> >> + with the file descriptor.
> >> +
> >> +Users:
> https://github.c/
> om%2Fnxp-imx%2Fimx-secure-
> enclave.git&data=05%7C02%7Cpankaj.gupta%40nxp.com%7C5a42a8d6ea17423
> 104e408dc8fdf1a0a%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63
> 8543435571183041%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAi
> LCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=
> VNnIyu2RKFHaWh6aRo9aHEtjSSdI1gvzP%2BMy1%2BGggt4%3D&reserved=0,
> >> +
> https://github.c/
> om%2Fnxp-imx%2Fimx-
> smw.git&data=05%7C02%7Cpankaj.gupta%40nxp.com%7C5a42a8d6ea1742310
> 4e408dc8fdf1a0a%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6385
> 43435571187283%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJ
> QIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=23
> Y%2FOKyv2%2BSGuPbGyekpBlCDHYlwiAA8sriLXydEgFw%3D&reserved=0
> >> + crypto/skcipher,
> >> + drivers/nvmem/imx-ocotp-ele.c
> >
> >
>
> --
> ~Randy
^ permalink raw reply [flat|nested] 24+ messages in thread
* RE: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
2024-06-18 10:58 ` [EXT] " Pankaj Gupta
2024-06-18 11:19 ` Conor Dooley
@ 2024-06-24 13:12 ` Pankaj Gupta
2024-06-24 13:27 ` Conor Dooley
1 sibling, 1 reply; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-24 13:12 UTC (permalink / raw)
To: Conor Dooley
Cc: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Rob Herring, Krzysztof Kozlowski, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Hi Conor,
> > > +properties:
> > > + $nodename:
> > > + pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> >
> > Just "firmware@<hex>" please.
> >
Modified as per your suggestion,
- pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
+ pattern: "^[0-9a-z]*-if@<hex>"
encountering the following error:
/home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: ele-if@0: $nodename:0: 'ele-if@0' does not match '^[0-9a-z]*-if@<hex>'
from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
/home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: v2x-if@3: $nodename:0: 'v2x-if@3' does not match '^[0-9a-z]*-if@<hex>'
from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
/home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: v2x-if@4: $nodename:0: 'v2x-if@4' does not match '^[0-9a-z]*-if@<hex>'
from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
/home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: v2x-if@5: $nodename:0: 'v2x-if@5' does not match '^[0-9a-z]*-if@<hex>'
from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
Please help and guide to resolve this comment, correctly.
Highly appreciated. Thanks.
Regards
Pankaj
> -----Original Message-----
> From: Pankaj Gupta
> Sent: Tuesday, June 18, 2024 4:29 PM
> To: Conor Dooley <conor@kernel.org>
> Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring <robh@kernel.org>;
> Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Sascha Hauer
> <s.hauer@pengutronix.de>; Pengutronix Kernel Team
> <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>; Rob
> Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; linux-doc@vger.kernel.org; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev;
> linux-arm-kernel@lists.infradead.org
> Subject: RE: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw
> binding doc
>
>
>
> > -----Original Message-----
> > From: Conor Dooley <conor@kernel.org>
> > Sent: Monday, June 17, 2024 10:07 PM
> > To: Pankaj Gupta <pankaj.gupta@nxp.com>
> > Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring <robh@kernel.org>;
> > Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> > <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Sascha Hauer
> > <s.hauer@pengutronix.de>; Pengutronix Kernel Team
> > <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>; Rob
> > Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > <krzysztof.kozlowski+dt@linaro.org>; linux-doc@vger.kernel.org; linux-
> > kernel@vger.kernel.org; devicetree@vger.kernel.org;
> > imx@lists.linux.dev; linux-arm-kernel@lists.infradead.org
> > Subject: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw
> > binding doc
> >
> > On Mon, Jun 17, 2024 at 12:59:40PM +0530, Pankaj Gupta wrote:
> > > The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X
> > > etc., creates an embedded secure enclave within the SoC boundary to
> > > enable features like:
> > > - HSM
> > > - SHE
> > > - V2X
> > >
> > > Secure-Enclave(s) communication interface are typically via message
> > > unit, i.e., based on mailbox linux kernel driver. This driver
> > > enables communication ensuring well defined message sequence
> > > protocol between Application Core and enclave's firmware.
> > >
> > > Driver configures multiple misc-device on the MU, for multiple
> > > user-space applications, to be able to communicate over single MU.
> > >
> > > It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
> > >
> > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > > ---
> > > .../devicetree/bindings/firmware/fsl,imx-se.yaml | 160
> > +++++++++++++++++++++
> > > 1 file changed, 160 insertions(+)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > new file mode 100644
> > > index 000000000000..60ad1c4a3dfa
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > @@ -0,0 +1,160 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
> > > +
> > > +maintainers:
> > > + - Pankaj Gupta <pankaj.gupta@nxp.com>
> > > +
> > > +description: |
> > > + NXP's SoC may contain one or multiple embedded secure-enclave HW
> > > + IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
> > > + enables features like
> > > + - Hardware Security Module (HSM),
> > > + - Security Hardware Extension (SHE), and
> > > + - Vehicular to Anything (V2X)
> > > +
> > > + Communication interface to the secure-enclaves is based on the
> > > + messaging unit(s).
> > > +
> > > +properties:
> > > + $nodename:
> > > + pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> >
> > Just "firmware@<hex>" please.
> >
>
> Modified as per your suggestion,
> - pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> + pattern: "^[0-9a-z]*-if@<hex>"
>
> encountering the following error:
> /home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,i
> mx-se.example.dtb: ele-if@0: $nodename:0: 'ele-if@0' does not match '^[0-
> 9a-z]*-if@<hex>'
> from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-
> se.yaml#
> /home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,i
> mx-se.example.dtb: v2x-if@3: $nodename:0: 'v2x-if@3' does not match '^[0-
> 9a-z]*-if@<hex>'
> from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-
> se.yaml#
> /home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,i
> mx-se.example.dtb: v2x-if@4: $nodename:0: 'v2x-if@4' does not match '^[0-
> 9a-z]*-if@<hex>'
> from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-
> se.yaml#
> /home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,i
> mx-se.example.dtb: v2x-if@5: $nodename:0: 'v2x-if@5' does not match '^[0-
> 9a-z]*-if@<hex>'
> from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-
> se.yaml#
>
> Please help and guide to resolve this comment, correctly.
> Highly appreciated. Thanks.
>
> > > +
> > > + compatible:
> > > + enum:
> > > + - fsl,imx8ulp-se
> > > + - fsl,imx93-se
> > > + - fsl,imx95-se
> > > +
> > > + reg:
> > > + maxItems: 1
> > > + description: Identifier of the communication interface to secure-
> enclave.
> > > +
> > > + mboxes:
> > > + description: contain a list of phandles to mailboxes.
> > > + items:
> > > + - description: Specify the mailbox used to send message to se
> firmware
> > > + - description: Specify the mailbox used to receive message
> > > + from se firmware
> > > +
> > > + mbox-names:
> > > + items:
> > > + - const: tx
> > > + - const: rx
> > > + - const: txdb
> > > + - const: rxdb
> > > + minItems: 2
> > > +
> > > + memory-region:
> > > + description: contains a list of phandles to reserved external memory.
> > > + items:
> > > + - description: It is used by secure-enclave firmware. It is an optional
> > > + property based on compatible and identifier to
> > > + communication
> > interface.
> > > + (see bindings/reserved-memory/reserved-memory.txt)
> > > +
> > > + sram:
> > > + description: contains a list of phandles to sram.
> >
> > There's only 1 phandle allowed, don't describe it as a list.
> > Same for memory-region.
>
> Accepted. Will do the following changes.
> memory-region:
> - description: contains a list of phandles to reserved external memory.
> + description: contains the phandle to reserved external memory.
>
> sram:
> - description: contains a list of phandles to sram.
> - $ref: /schemas/types.yaml#/definitions/phandle-array
> + description: contains the phandle to sram.
> items:
> >
> > > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > > + items:
> > > + - description: Phandle to the device SRAM. It is an optional property
> > > + based on compatible and identifier to communication interface.
> > > +
> > > +allOf:
> > > + # memory-region
> > > + - if:
> > > + properties:
> > > + compatible:
> > > + contains:
> > > + enum:
> > > + - fsl,imx8ulp-se
> > > + - fsl,imx93-se
> > > + then:
> > > + required:
> > > + - memory-region
> >
> > > + else:
> > > + not:
> > > + required:
> > > + - memory-region
> >
> > Use
> >
> > else: properties: memory-region: false
> >
> > Same for sram.
> Accepted will be corrected in V4.
> # memory-region
> - not:
> - required:
> - - memory-region
> + properties:
> + memory-region: false
>
> # sram
> else:
> - not:
> - required:
> - - sram
> + properties:
> + sram: false
>
>
> > Sort the allOf after required.
> Accepted. Will move allOf after "additionalProperties:"
>
> >
> > > +
> > > + # sram
> > > + - if:
> > > + properties:
> > > + compatible:
> > > + contains:
> > > + enum:
> > > + - fsl,imx8ulp-se
> > > + then:
> > > + required:
> > > + - sram
> > > + else:
> > > + not:
> > > + required:
> > > + - sram
> > > +
> > > +required:
> > > + - compatible
> > > + - reg
> > > + - mboxes
> > > + - mbox-names
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > + - |
> > > + firmware {
> >
> > You've made up these firmware "buses" here, what purpose do they
> > serve, other than allowing you to have a reg property?
> True.
> Additionally, these are firmware nodes, these nodes are semantically put in
> firmware "buses".
>
> >
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + ele-if@0 {
> > > + compatible = "fsl,imx8ulp-se";
> > > + reg = <0x0>;
> >
> > What does the reg property even do? Is it ever more than 0?
> > Can this information be provided as a mbox cell?
> Yes, there are more than 0 nodes for i.MX95 platforms, i.e., total of around 7
> such nodes.
> Reg property will help to identify the node id, by other kernel management
> layer like NVMEM (patches to follow).
>
> >
> > > + mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> > > + mbox-names = "tx", "rx";
> > > + sram = <&sram0>;
> > > + memory-region = <&ele_reserved>;
> > > + };
> > > + };
> > > + - |
> > > + firmware {
> >
> > These examples are all basically the same, drop all but one.
> Ok, will keep the example of i.MX95.
>
> >
> > Thanks,
> > Conor.
> >
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + ele-if@0 {
> > > + compatible = "fsl,imx93-se";
> > > + reg = <0x0>;
> > > + mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> > > + mbox-names = "tx", "rx";
> > > + memory-region = <&ele_reserved>;
> > > + };
> > > + };
> > > + - |
> > > + firmware {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + ele-if@0 {
> > > + compatible = "fsl,imx95-se";
> > > + reg = <0x0>;
> > > + mboxes = <&ele_mu0 0 0>, <&ele_mu0 1 0>;
> > > + mbox-names = "tx", "rx";
> > > + };
> > > + v2x-if@3 {
> > > + compatible = "fsl,imx95-se";
> > > + reg = <0x3>;
> > > + mboxes = <&v2x_mu 0 0>, <&v2x_mu 1 0>;
> > > + mbox-names = "tx", "rx";
> > > + };
> > > + v2x-if@4 {
> > > + compatible = "fsl,imx95-se";
> > > + reg = <0x4>;
> > > + mboxes = <&v2x_mu6 0 0>, <&v2x_mu6 1 0>;
> > > + mbox-names = "tx", "rx";
> > > + };
> > > + v2x-if@5 {
> > > + compatible = "fsl,imx95-se";
> > > + reg = <0x5>;
> > > + mboxes = <&v2x_mu7 0 0>, <&v2x_mu7 1 0>;
> > > + mbox-names = "tx", "rx";
> > > + };
> > > + };
> > > +...
> > >
> > > --
> > > 2.34.1
> > >
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
2024-06-24 13:12 ` Pankaj Gupta
@ 2024-06-24 13:27 ` Conor Dooley
0 siblings, 0 replies; 24+ messages in thread
From: Conor Dooley @ 2024-06-24 13:27 UTC (permalink / raw)
To: Pankaj Gupta
Cc: Conor Dooley, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
[-- Attachment #1: Type: text/plain, Size: 1585 bytes --]
On Mon, Jun 24, 2024 at 01:12:22PM +0000, Pankaj Gupta wrote:
> Hi Conor,
>
> > > > +properties:
> > > > + $nodename:
> > > > + pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> > >
> > > Just "firmware@<hex>" please.
> > >
>
> Modified as per your suggestion,
> - pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> + pattern: "^[0-9a-z]*-if@<hex>"
>
> encountering the following error:
> /home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: ele-if@0: $nodename:0: 'ele-if@0' does not match '^[0-9a-z]*-if@<hex>'
> from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> /home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: v2x-if@3: $nodename:0: 'v2x-if@3' does not match '^[0-9a-z]*-if@<hex>'
> from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> /home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: v2x-if@4: $nodename:0: 'v2x-if@4' does not match '^[0-9a-z]*-if@<hex>'
> from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> /home/yuktilab/linux_bkp/Documentation/devicetree/bindings/firmware/fsl,imx-se.example.dtb: v2x-if@5: $nodename:0: 'v2x-if@5' does not match '^[0-9a-z]*-if@<hex>'
> from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
>
> Please help and guide to resolve this comment, correctly.
> Highly appreciated. Thanks.
I replied to you on the 18th:
https://lore.kernel.org/all/20240618-antonym-tabloid-8f721ee752a5@wendy/
Thanks,
Conor.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 24+ messages in thread
* RE: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
2024-06-18 11:19 ` Conor Dooley
@ 2024-06-24 13:46 ` Pankaj Gupta
2024-06-24 16:48 ` Conor Dooley
0 siblings, 1 reply; 24+ messages in thread
From: Pankaj Gupta @ 2024-06-24 13:46 UTC (permalink / raw)
To: Conor Dooley
Cc: Conor Dooley, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
Thanks Conor, for the help.
Sorry to miss out this mail reply.
> -----Original Message-----
> From: Conor Dooley <conor.dooley@microchip.com>
> Sent: Tuesday, June 18, 2024 4:50 PM
> To: Pankaj Gupta <pankaj.gupta@nxp.com>
> Cc: Conor Dooley <conor@kernel.org>; Jonathan Corbet <corbet@lwn.net>;
> Rob Herring <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>;
> Conor Dooley <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>;
> Sascha Hauer <s.hauer@pengutronix.de>; Pengutronix Kernel Team
> <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>; Rob Herring
> <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; linux-doc@vger.kernel.org; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev; linux-
> arm-kernel@lists.infradead.org
> Subject: Re: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw
> binding doc
>
> On Tue, Jun 18, 2024 at 10:58:47AM +0000, Pankaj Gupta wrote:
> > > From: Conor Dooley <conor@kernel.org> On Mon, Jun 17, 2024 at
> > > 12:59:40PM +0530, Pankaj Gupta wrote:
> > > > The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X
> > > > etc., creates an embedded secure enclave within the SoC boundary
> > > > to enable features like:
> > > > - HSM
> > > > - SHE
> > > > - V2X
> > > >
> > > > Secure-Enclave(s) communication interface are typically via
> > > > message unit, i.e., based on mailbox linux kernel driver. This
> > > > driver enables communication ensuring well defined message
> > > > sequence protocol between Application Core and enclave's firmware.
> > > >
> > > > Driver configures multiple misc-device on the MU, for multiple
> > > > user-space applications, to be able to communicate over single MU.
> > > >
> > > > It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
> > > >
> > > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > > > ---
> > > > .../devicetree/bindings/firmware/fsl,imx-se.yaml | 160
> > > +++++++++++++++++++++
> > > > 1 file changed, 160 insertions(+)
> > > >
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > > b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > > new file mode 100644
> > > > index 000000000000..60ad1c4a3dfa
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > > @@ -0,0 +1,160 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML
> > > > +1.2
> > > > +---
> > > > +$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > +
> > > > +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
> > > > +
> > > > +maintainers:
> > > > + - Pankaj Gupta <pankaj.gupta@nxp.com>
> > > > +
> > > > +description: |
> > > > + NXP's SoC may contain one or multiple embedded secure-enclave
> > > > +HW
> > > > + IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
> > > > + enables features like
> > > > + - Hardware Security Module (HSM),
> > > > + - Security Hardware Extension (SHE), and
> > > > + - Vehicular to Anything (V2X)
> > > > +
> > > > + Communication interface to the secure-enclaves is based on the
> > > > + messaging unit(s).
> > > > +
> > > > +properties:
> > > > + $nodename:
> > > > + pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> > >
> > > Just "firmware@<hex>" please.
> > >
> >
> > Modified as per your suggestion,
> > - pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> > + pattern: "^[0-9a-z]*-if@<hex>"
>
> Firstly, that's not even what I said verbatim, which I could understand. <hex>
> isn't even a valid bit of regex for this.
> What I want to see is something like: "^firmware@[0-9a-f]+$"
These nodes define the interfaces(-if) to the "secure enclave" FW(-fw).
Will replace "-if", with "-fw".
There are multiple NXP IP(s) for secure enclave(s):
- EdgeLock Enclave (ele)
- Vehicular to anything (v2x)
- SECO (seco)
Having "ele-fw" helps identify the FW IP name.
Will it be fine to use:
- pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
+ pattern: "^[0-9a-z]*-fw@[0-9a-f]+$"
or
- pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
+ pattern: "^[0-9a-z]*-firmware@[0-9a-f]+$"
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
2024-06-24 13:46 ` Pankaj Gupta
@ 2024-06-24 16:48 ` Conor Dooley
0 siblings, 0 replies; 24+ messages in thread
From: Conor Dooley @ 2024-06-24 16:48 UTC (permalink / raw)
To: Pankaj Gupta
Cc: Conor Dooley, Jonathan Corbet, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Rob Herring, Krzysztof Kozlowski,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
[-- Attachment #1: Type: text/plain, Size: 4758 bytes --]
On Mon, Jun 24, 2024 at 01:46:19PM +0000, Pankaj Gupta wrote:
> Thanks Conor, for the help.
>
> Sorry to miss out this mail reply.
>
> > -----Original Message-----
> > From: Conor Dooley <conor.dooley@microchip.com>
> > Sent: Tuesday, June 18, 2024 4:50 PM
> > To: Pankaj Gupta <pankaj.gupta@nxp.com>
> > Cc: Conor Dooley <conor@kernel.org>; Jonathan Corbet <corbet@lwn.net>;
> > Rob Herring <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>;
> > Conor Dooley <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>;
> > Sascha Hauer <s.hauer@pengutronix.de>; Pengutronix Kernel Team
> > <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>; Rob Herring
> > <robh+dt@kernel.org>; Krzysztof Kozlowski
> > <krzysztof.kozlowski+dt@linaro.org>; linux-doc@vger.kernel.org; linux-
> > kernel@vger.kernel.org; devicetree@vger.kernel.org; imx@lists.linux.dev; linux-
> > arm-kernel@lists.infradead.org
> > Subject: Re: [EXT] Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw
> > binding doc
> >
> > On Tue, Jun 18, 2024 at 10:58:47AM +0000, Pankaj Gupta wrote:
> > > > From: Conor Dooley <conor@kernel.org> On Mon, Jun 17, 2024 at
> > > > 12:59:40PM +0530, Pankaj Gupta wrote:
> > > > > The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X
> > > > > etc., creates an embedded secure enclave within the SoC boundary
> > > > > to enable features like:
> > > > > - HSM
> > > > > - SHE
> > > > > - V2X
> > > > >
> > > > > Secure-Enclave(s) communication interface are typically via
> > > > > message unit, i.e., based on mailbox linux kernel driver. This
> > > > > driver enables communication ensuring well defined message
> > > > > sequence protocol between Application Core and enclave's firmware.
> > > > >
> > > > > Driver configures multiple misc-device on the MU, for multiple
> > > > > user-space applications, to be able to communicate over single MU.
> > > > >
> > > > > It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
> > > > >
> > > > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > > > > ---
> > > > > .../devicetree/bindings/firmware/fsl,imx-se.yaml | 160
> > > > +++++++++++++++++++++
> > > > > 1 file changed, 160 insertions(+)
> > > > >
> > > > > diff --git
> > > > > a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > > > b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > > > new file mode 100644
> > > > > index 000000000000..60ad1c4a3dfa
> > > > > --- /dev/null
> > > > > +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > > > > @@ -0,0 +1,160 @@
> > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML
> > > > > +1.2
> > > > > +---
> > > > > +$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > > +
> > > > > +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
> > > > > +
> > > > > +maintainers:
> > > > > + - Pankaj Gupta <pankaj.gupta@nxp.com>
> > > > > +
> > > > > +description: |
> > > > > + NXP's SoC may contain one or multiple embedded secure-enclave
> > > > > +HW
> > > > > + IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
> > > > > + enables features like
> > > > > + - Hardware Security Module (HSM),
> > > > > + - Security Hardware Extension (SHE), and
> > > > > + - Vehicular to Anything (V2X)
> > > > > +
> > > > > + Communication interface to the secure-enclaves is based on the
> > > > > + messaging unit(s).
> > > > > +
> > > > > +properties:
> > > > > + $nodename:
> > > > > + pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> > > >
> > > > Just "firmware@<hex>" please.
> > > >
> > >
> > > Modified as per your suggestion,
> > > - pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> > > + pattern: "^[0-9a-z]*-if@<hex>"
> >
> > Firstly, that's not even what I said verbatim, which I could understand. <hex>
> > isn't even a valid bit of regex for this.
> > What I want to see is something like: "^firmware@[0-9a-f]+$"
>
> These nodes define the interfaces(-if) to the "secure enclave" FW(-fw).
> Will replace "-if", with "-fw".
>
> There are multiple NXP IP(s) for secure enclave(s):
> - EdgeLock Enclave (ele)
> - Vehicular to anything (v2x)
> - SECO (seco)
>
> Having "ele-fw" helps identify the FW IP name.
If you need to indentify it, just use a label. "ele-if" or "ele-fw" is
not a generic node name.
>
> Will it be fine to use:
> - pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> + pattern: "^[0-9a-z]*-fw@[0-9a-f]+$"
>
> or
>
> - pattern: "^[0-9a-z]*-if@[0-9a-f]+$"
> + pattern: "^[0-9a-z]*-firmware@[0-9a-f]+$"
No, just use firmware please.
Thanks,
Conor.
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^ permalink raw reply [flat|nested] 24+ messages in thread
* RE: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave
2024-06-18 8:31 ` Sascha Hauer
@ 2024-07-01 7:45 ` Pankaj Gupta
2024-07-01 8:47 ` Sascha Hauer
0 siblings, 1 reply; 24+ messages in thread
From: Pankaj Gupta @ 2024-07-01 7:45 UTC (permalink / raw)
To: Sascha Hauer
Cc: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org
> -----Original Message-----
> From: Sascha Hauer <s.hauer@pengutronix.de>
> Sent: Tuesday, June 18, 2024 2:02 PM
> To: Pankaj Gupta <pankaj.gupta@nxp.com>
> Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring <robh@kernel.org>;
> Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Pengutronix
> Kernel Team <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>;
> Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; devicetree@vger.kernel.org;
> imx@lists.linux.dev; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-doc@vger.kernel.org
> Subject: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock
> Enclave
>
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
>
>
> Hi Pankaj,
>
> Here's some review feedback. I think it'll take some more rounds to get this
> into shape.
>
> On Mon, Jun 17, 2024 at 12:59:42PM +0530, Pankaj Gupta wrote:
> > NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE), are
> > embedded in the SoC to support the features like HSM, SHE & V2X, using
> > message based communication interface.
> >
> > The secure enclave FW communicates on a dedicated messaging unit(MU)
> > based interface(s) with application core, where kernel is running.
> > It exists on specific i.MX processors. e.g. i.MX8ULP, i.MX93.
> >
> > This patch adds the driver for communication interface to
> > secure-enclave, for exchanging messages with NXP secure enclave HW
> > IP(s) like EdgeLock Enclave (ELE) from Kernel-space, used by kernel
> > management layers like
> > - DM-Crypt.
> >
> > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > ---
> > drivers/firmware/imx/Kconfig | 12 +
> > drivers/firmware/imx/Makefile | 2 +
> > drivers/firmware/imx/ele_base_msg.c | 284 +++++++++++++++++++
> > drivers/firmware/imx/ele_base_msg.h | 90 ++++++
> > drivers/firmware/imx/ele_common.c | 233 ++++++++++++++++
> > drivers/firmware/imx/ele_common.h | 45 +++
> > drivers/firmware/imx/se_ctrl.c | 536
> ++++++++++++++++++++++++++++++++++++
> > drivers/firmware/imx/se_ctrl.h | 99 +++++++
> > include/linux/firmware/imx/se_api.h | 14 +
> > 9 files changed, 1315 insertions(+)
> >
> > diff --git a/drivers/firmware/imx/Kconfig
> > b/drivers/firmware/imx/Kconfig index 183613f82a11..56bdca9bd917 100644
> > --- a/drivers/firmware/imx/Kconfig
> > +++ b/drivers/firmware/imx/Kconfig
> > @@ -22,3 +22,15 @@ config IMX_SCU
> >
> > This driver manages the IPC interface between host CPU and the
> > SCU firmware running on M4.
> > +
> > +config IMX_SEC_ENCLAVE
> > + tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave Firmware
> driver."
> > + depends on IMX_MBOX && ARCH_MXC && ARM64
> > + default m if ARCH_MXC
> > +
> > + help
> > + It is possible to use APIs exposed by the iMX Secure Enclave HW IP
> called:
> > + - EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93),
> > + like base, HSM, V2X & SHE using the SAB protocol via the shared
> Messaging
> > + Unit. This driver exposes these interfaces via a set of file descriptors
> > + allowing to configure shared memory, send and receive messages.
> > diff --git a/drivers/firmware/imx/Makefile
> > b/drivers/firmware/imx/Makefile index 8f9f04a513a8..aa9033e0e9e3
> > 100644
> > --- a/drivers/firmware/imx/Makefile
> > +++ b/drivers/firmware/imx/Makefile
> > @@ -1,3 +1,5 @@
> > # SPDX-License-Identifier: GPL-2.0
> > obj-$(CONFIG_IMX_DSP) += imx-dsp.o
> > obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o
> imx-scu-soc.o
> > +sec_enclave-objs = se_ctrl.o ele_common.o ele_base_msg.o
> > +obj-${CONFIG_IMX_SEC_ENCLAVE} += sec_enclave.o
> > diff --git a/drivers/firmware/imx/ele_base_msg.c
> > b/drivers/firmware/imx/ele_base_msg.c
> > new file mode 100644
> > index 000000000000..5bfd9c7e3f7e
> > --- /dev/null
> > +++ b/drivers/firmware/imx/ele_base_msg.c
> > @@ -0,0 +1,284 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2024 NXP
> > + */
> > +
> > +#include <linux/types.h>
> > +#include <linux/completion.h>
> > +#include <linux/dma-mapping.h>
> > +
> > +#include "ele_base_msg.h"
> > +#include "ele_common.h"
> > +
> > +int ele_get_info(struct device *dev, struct ele_dev_info *s_info) {
>
> I think all currently exported functions should take a struct se_if_priv
> * as context pointer.
> I can't find any place in which any of these functions is called differently than
> with priv->dev.
All the API(s) that construct a message to be exchanged over the device-interface to FW,
- will be the exported symbols in the next patch-set, to be used by other Linux kernel modules like: NVMEM driver, linux crypto framework, security/keys etc.
- These other Linux layers have to choose from multiple similar devices per secure-enclave.
Kindly Consider these API(s), to be the EXPORT SYMBOLS, in later patches, when used outside of this driver.
>
> > + struct se_if_priv *priv = dev_get_drvdata(dev);
> > + struct se_api_msg *tx_msg __free(kfree) = NULL;
> > + struct se_api_msg *rx_msg __free(kfree) = NULL;
> > + phys_addr_t get_info_addr = 0;
> > + u32 *get_info_data = NULL;
> > + u32 status;
> > + int ret = 0;
> > +
> > + memset(s_info, 0x0, sizeof(*s_info));
> > +
> > + if (priv->mem_pool_name)
> > + get_info_data = get_phy_buf_mem_pool(dev,
> > + priv->mem_pool_name,
> > + &get_info_addr,
> > + ELE_GET_INFO_BUFF_SZ);
> > + else
> > + get_info_data = dma_alloc_coherent(dev,
> > + ELE_GET_INFO_BUFF_SZ,
> > + &get_info_addr,
> > + GFP_KERNEL);
> > + if (!get_info_data) {
> > + ret = -ENOMEM;
> > + dev_dbg(dev,
> > + "%s: Failed to allocate get_info_addr.\n",
> > + __func__);
> > + goto exit;
>
> Just return here and you can drop the if(get_info_data) in the exit path.
I think it is good to have single exit path.
Accepted.
>
> > + }
> > +
> > + tx_msg = kzalloc(ELE_GET_INFO_REQ_MSG_SZ, GFP_KERNEL);
> > + if (!tx_msg) {
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > +
> > + rx_msg = kzalloc(ELE_GET_INFO_RSP_MSG_SZ, GFP_KERNEL);
> > + if (!rx_msg) {
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > +
> > + ret = imx_se_fill_cmd_msg_hdr(priv,
> > + (struct se_msg_hdr *)&tx_msg->header,
> > + ELE_GET_INFO_REQ,
> > + ELE_GET_INFO_REQ_MSG_SZ,
> > + true);
> > + if (ret)
> > + goto exit;
> > +
> > + tx_msg->data[0] = upper_32_bits(get_info_addr);
> > + tx_msg->data[1] = lower_32_bits(get_info_addr);
> > + tx_msg->data[2] = sizeof(struct ele_dev_info);
>
> Use sizeof(*s_info). It will increase the chance of doing the right thing here on
> struct renames and such.
Accepted.
>
> > + ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
> > + if (ret < 0)
> > + goto exit;
> > +
> > + ret = validate_rsp_hdr(priv,
> > + &priv->rx_msg->header,
> > + ELE_GET_INFO_REQ,
> > + ELE_GET_INFO_RSP_MSG_SZ,
> > + true);
> > + if (ret)
> > + goto exit;
> > +
> > + status = RES_STATUS(priv->rx_msg->data[0]);
> > + if (status != priv->success_tag) {
> > + dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
> > + ELE_GET_INFO_REQ, status);
> > + ret = -EPERM;
> > + }
> > +
> > + memcpy(s_info, get_info_data, sizeof(struct ele_dev_info));
> > +
> > +exit:
> > + if (get_info_addr) {
> > + if (priv->mem_pool_name)
> > + free_phybuf_mem_pool(dev, priv->mem_pool_name,
> > + get_info_data, ELE_GET_INFO_BUFF_SZ);
> > + else
> > + dma_free_coherent(dev,
> > + ELE_GET_INFO_BUFF_SZ,
> > + get_info_data,
> > + get_info_addr);
> > + }
> > +
> > + return ret;
> > +}
> > +
> > +int ele_fetch_soc_info(struct device *dev, u16 *soc_rev, u64
> > +*serial_num) {
> > + struct ele_dev_info s_info = {0};
> > + int err = 0;
> > +
> > + err = ele_get_info(dev, &s_info);
> > + if (err < 0) {
> > + dev_err(dev, "Error");
> > + return err;
> > + }
> > +
> > + *soc_rev = s_info.d_info.soc_rev;
> > + *serial_num = GET_SERIAL_NUM_FROM_UID(s_info.d_info.uid,
> > + MAX_UID_SIZE >> 2);
> > +
> > + return err;
> > +}
> > +
> > +int ele_ping(struct device *dev)
> > +{
> > + struct se_if_priv *priv = dev_get_drvdata(dev);
> > + struct se_api_msg *tx_msg __free(kfree) = NULL;
> > + struct se_api_msg *rx_msg __free(kfree) = NULL;
> > + u32 status;
> > + int ret = 0;
> > +
> > + tx_msg = kzalloc(ELE_PING_REQ_SZ, GFP_KERNEL);
> > + if (!tx_msg) {
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > +
> > + rx_msg = kzalloc(ELE_PING_RSP_SZ, GFP_KERNEL);
> > + if (!rx_msg) {
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > +
> > + ret = imx_se_fill_cmd_msg_hdr(priv,
> > + (struct se_msg_hdr *)&tx_msg->header,
> > + ELE_PING_REQ, ELE_PING_REQ_SZ, true);
> > + if (ret) {
> > + dev_err(dev, "Error: imx_se_fill_cmd_msg_hdr failed.\n");
> > + goto exit;
> > + }
> > +
> > + ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
> > + if (ret)
> > + goto exit;
> > +
> > + ret = validate_rsp_hdr(priv,
> > + &priv->rx_msg->header,
> > + ELE_PING_REQ,
> > + ELE_PING_RSP_SZ,
> > + true);
> > + if (ret)
> > + goto exit;
> > +
> > + status = RES_STATUS(priv->rx_msg->data[0]);
> > + if (status != priv->success_tag) {
> > + dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
> > + ELE_PING_REQ, status);
> > + ret = -EPERM;
> > + }
> > +exit:
> > + return ret;
> > +}
> > +
> > +int ele_service_swap(struct device *dev,
> > + phys_addr_t addr,
> > + u32 addr_size, u16 flag) {
> > + struct se_if_priv *priv = dev_get_drvdata(dev);
> > + struct se_api_msg *tx_msg __free(kfree) = NULL;
> > + struct se_api_msg *rx_msg __free(kfree) = NULL;
> > + u32 status;
> > + int ret = 0;
> > +
> > + tx_msg = kzalloc(ELE_SERVICE_SWAP_REQ_MSG_SZ, GFP_KERNEL);
> > + if (!tx_msg) {
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > +
> > + rx_msg = kzalloc(ELE_SERVICE_SWAP_RSP_MSG_SZ, GFP_KERNEL);
> > + if (!rx_msg) {
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > +
> > + ret = imx_se_fill_cmd_msg_hdr(priv,
> > + (struct se_msg_hdr *)&tx_msg->header,
> > + ELE_SERVICE_SWAP_REQ,
> > + ELE_SERVICE_SWAP_REQ_MSG_SZ, true);
> > + if (ret)
> > + goto exit;
> > +
> > + tx_msg->data[0] = flag;
> > + tx_msg->data[1] = addr_size;
> > + tx_msg->data[2] = ELE_NONE_VAL;
> > + tx_msg->data[3] = lower_32_bits(addr);
> > + tx_msg->data[4] = imx_se_add_msg_crc((uint32_t *)&tx_msg[0],
> > + ELE_SERVICE_SWAP_REQ_MSG_SZ);
> > + ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
> > + if (ret < 0)
> > + goto exit;
> > +
> > + ret = validate_rsp_hdr(priv,
> > + &priv->rx_msg->header,
> > + ELE_SERVICE_SWAP_REQ,
> > + ELE_SERVICE_SWAP_RSP_MSG_SZ,
> > + true);
> > + if (ret)
> > + goto exit;
> > +
> > + status = RES_STATUS(priv->rx_msg->data[0]);
> > + if (status != priv->success_tag) {
> > + dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
> > + ELE_SERVICE_SWAP_REQ, status);
> > + ret = -EPERM;
> > + } else {
> > + if (flag == ELE_IMEM_EXPORT)
> > + ret = priv->rx_msg->data[1];
> > + else
> > + ret = 0;
> > + }
> > +exit:
> > +
> > + return ret;
> > +}
> > +
> > +int ele_fw_authenticate(struct device *dev, phys_addr_t addr) {
> > + struct se_if_priv *priv = dev_get_drvdata(dev);
> > + struct se_api_msg *tx_msg __free(kfree) = NULL;
> > + struct se_api_msg *rx_msg __free(kfree) = NULL;
> > + u32 status;
> > + int ret = 0;
> > +
> > + tx_msg = kzalloc(ELE_FW_AUTH_REQ_SZ, GFP_KERNEL);
> > + if (!tx_msg) {
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > +
> > + rx_msg = kzalloc(ELE_FW_AUTH_RSP_MSG_SZ, GFP_KERNEL);
> > + if (!rx_msg) {
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > + ret = imx_se_fill_cmd_msg_hdr(priv,
> > + (struct se_msg_hdr *)&tx_msg->header,
> > + ELE_FW_AUTH_REQ,
> > + ELE_FW_AUTH_REQ_SZ,
> > + true);
> > + if (ret)
> > + goto exit;
> > +
> > + tx_msg->data[0] = addr;
> > + tx_msg->data[1] = addr >> 32;
> > + tx_msg->data[2] = addr;
>
> Use upper_32_bits() and lower_32_bits() as done elsewhere.
Accepted.
>
> > +
> > + ret = imx_ele_msg_send_rcv(priv, tx_msg, rx_msg);
> > + if (ret < 0)
> > + goto exit;
> > +
> > + ret = validate_rsp_hdr(priv,
> > + &priv->rx_msg->header,
> > + ELE_FW_AUTH_REQ,
> > + ELE_FW_AUTH_RSP_MSG_SZ,
> > + true);
>
> You should use rx_msg here instead of priv->rx_msg. First of all it makes the
> code clearer and also you take the mutex protecting
> priv->rx_msg only inside of imx_ele_msg_send_rcv() which means rx_msg
> priv->could have been set differently by a concurrent call
> already.
>
> Same applies to other places in this file.
Accepted.
>
> > + if (ret)
> > + goto exit;
> > +
> > + status = RES_STATUS(priv->rx_msg->data[0]);
> > + if (status != priv->success_tag) {
>
> Apart from priv->rx_msg (which you shouldn't use here) priv->success_tag is
> the only member of struct se_if_priv that you actually use in this file.
>
> You could add a imx_ele_message_status() function to ele_common.c and
> make struct se_if_priv opaque to this file.
Accepted.
Moved the status check to validate_rsp_hdr. Rename the function to "se_val_rsp_hdr_n_status"
>
>
> > + dev_err(dev, "Command Id[%d], Response Failure = 0x%x",
> > + ELE_FW_AUTH_REQ, status);
> > + ret = -EPERM;
> > + }
> > +exit:
> > +
> > + return ret;
> > +}
> > diff --git a/drivers/firmware/imx/ele_base_msg.h
> > b/drivers/firmware/imx/ele_base_msg.h
> > new file mode 100644
> > index 000000000000..7838fe883810
> > --- /dev/null
> > +++ b/drivers/firmware/imx/ele_base_msg.h
> > @@ -0,0 +1,90 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright 2024 NXP
> > + *
> > + * Header file for the EdgeLock Enclave Base API(s).
> > + */
> > +
> > +#ifndef ELE_BASE_MSG_H
> > +#define ELE_BASE_MSG_H
> > +
> > +#include <linux/device.h>
> > +#include <linux/types.h>
> > +
> > +#define WORD_SZ 4
> > +#define ELE_NONE_VAL 0x0
> > +
> > +#define ELE_GET_INFO_REQ 0xDA
> > +#define ELE_GET_INFO_REQ_MSG_SZ 0x10
> > +#define ELE_GET_INFO_RSP_MSG_SZ 0x08
> > +
> > +#define ELE_GET_INFO_BUFF_SZ 0x100
> > +
> > +#define DEFAULT_IMX_SOC_VER 0xA000
> > +#define SOC_VER_MASK 0xFFFF0000
> > +#define SOC_ID_MASK 0x0000FFFF
> > +
> > +#define MAX_UID_SIZE (16)
> > +#define DEV_GETINFO_ROM_PATCH_SHA_SZ (32)
> > +#define DEV_GETINFO_FW_SHA_SZ (32)
> > +#define DEV_GETINFO_OEM_SRKH_SZ (64)
> > +#define DEV_GETINFO_MIN_VER_MASK 0xFF
> > +#define DEV_GETINFO_MAJ_VER_MASK 0xFF00
> > +
> > +struct dev_info {
> > + uint8_t cmd;
> > + uint8_t ver;
> > + uint16_t length;
> > + uint16_t soc_id;
> > + uint16_t soc_rev;
> > + uint16_t lmda_val;
> > + uint8_t ssm_state;
> > + uint8_t dev_atts_api_ver;
> > + uint8_t uid[MAX_UID_SIZE];
> > + uint8_t sha_rom_patch[DEV_GETINFO_ROM_PATCH_SHA_SZ];
> > + uint8_t sha_fw[DEV_GETINFO_FW_SHA_SZ]; };
> > +
> > +struct dev_addn_info {
> > + uint8_t oem_srkh[DEV_GETINFO_OEM_SRKH_SZ];
> > + uint8_t trng_state;
> > + uint8_t csal_state;
> > + uint8_t imem_state;
> > + uint8_t reserved2;
> > +};
> > +
> > +struct ele_dev_info {
> > + struct dev_info d_info;
> > + struct dev_addn_info d_addn_info; };
> > +
> > +#define GET_SERIAL_NUM_FROM_UID(x, uid_word_sz) \
> > + (((u64)(((u32 *)(x))[(uid_word_sz) - 1]) << 32) | ((u32
> > +*)(x))[0])
> > +
> > +#define ELE_PING_REQ 0x01
> > +#define ELE_PING_REQ_SZ 0x04
> > +#define ELE_PING_RSP_SZ 0x08
> > +
> > +#define ELE_SERVICE_SWAP_REQ 0xDF
> > +#define ELE_SERVICE_SWAP_REQ_MSG_SZ 0x18 #define
> > +ELE_SERVICE_SWAP_RSP_MSG_SZ 0x0C
> > +#define ELE_IMEM_SIZE 0x10000
> > +#define ELE_IMEM_STATE_OK 0xCA
> > +#define ELE_IMEM_STATE_BAD 0xFE
> > +#define ELE_IMEM_STATE_WORD 0x27
> > +#define ELE_IMEM_STATE_MASK 0x00ff0000
> > +#define ELE_IMEM_EXPORT 0x1
> > +#define ELE_IMEM_IMPORT 0x2
> > +
> > +#define ELE_FW_AUTH_REQ 0x02
> > +#define ELE_FW_AUTH_REQ_SZ 0x10
> > +#define ELE_FW_AUTH_RSP_MSG_SZ 0x08
> > +
> > +int ele_get_info(struct device *dev, struct ele_dev_info *s_info);
> > +int ele_fetch_soc_info(struct device *dev, u16 *soc_rev, u64
> > +*serial_num); int ele_ping(struct device *dev); int
> > +ele_service_swap(struct device *dev,
> > + phys_addr_t addr,
> > + u32 addr_size, u16 flag); int
> > +ele_fw_authenticate(struct device *dev, phys_addr_t addr); #endif
> > diff --git a/drivers/firmware/imx/ele_common.c
> > b/drivers/firmware/imx/ele_common.c
> > new file mode 100644
> > index 000000000000..0139748f7150
> > --- /dev/null
> > +++ b/drivers/firmware/imx/ele_common.c
> > @@ -0,0 +1,233 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2024 NXP
> > + */
> > +
> > +#include "ele_base_msg.h"
> > +#include "ele_common.h"
> > +
> > +u32 imx_se_add_msg_crc(u32 *msg, u32 msg_len) {
> > + u32 nb_words = msg_len / (u32)sizeof(u32);
> > + u32 crc = 0;
> > + u32 i;
> > +
> > + for (i = 0; i < nb_words - 1; i++)
> > + crc ^= *(msg + i);
> > +
> > + return crc;
> > +}
> > +
> > +int imx_ele_msg_rcv(struct se_if_priv *priv) {
> > + u32 wait;
> > + int err = 0;
> > +
> > + lockdep_assert_held(&priv->se_if_cmd_lock);
> > +
> > + wait = msecs_to_jiffies(1000);
> > + if (!wait_for_completion_timeout(&priv->done, wait)) {
> > + dev_err(priv->dev,
> > + "Error: wait_for_completion timed out.\n");
> > + err = -ETIMEDOUT;
> > + }
> > +
> > + return err;
> > +}
> > +
> > +int imx_ele_msg_send(struct se_if_priv *priv, void *tx_msg) {
> > + struct se_msg_hdr *header;
> > + int err;
> > +
> > + header = (struct se_msg_hdr *) tx_msg;
>
> Unnecessary cast.
Accepted.
>
> > +
> > + if (header->tag == priv->cmd_tag)
> > + lockdep_assert_held(&priv->se_if_cmd_lock);
> > +
> > + scoped_guard(mutex, &priv->se_if_lock);
> > +
> > + err = mbox_send_message(priv->tx_chan, tx_msg);
> > + if (err < 0) {
> > + dev_err(priv->dev, "Error: mbox_send_message failure.\n");
> > + return err;
> > + }
> > +
> > + return err;
> > +}
> > +
> > +/* API used for send/receive blocking call. */ int
> > +imx_ele_msg_send_rcv(struct se_if_priv *priv, void *tx_msg, void
> > +*rx_msg) {
> > + int err;
> > +
> > + scoped_guard(mutex, &priv->se_if_cmd_lock);
> > + if (priv->waiting_rsp_dev) {
> > + dev_warn(priv->dev,
> > + "There should be no misc dev-ctx, waiting for resp.\n");
> > + priv->waiting_rsp_dev = NULL;
> > + }
> > + priv->rx_msg = rx_msg;
> > + err = imx_ele_msg_send(priv, tx_msg);
> > + if (err < 0)
> > + goto exit;
> > +
> > + err = imx_ele_msg_rcv(priv);
> > +
> > +exit:
> > + return err;
> > +}
> > +
> > +/*
> > + * Callback called by mailbox FW, when data is received.
> > + */
> > +void se_if_rx_callback(struct mbox_client *mbox_cl, void *msg) {
> > + struct device *dev = mbox_cl->dev;
> > + struct se_if_priv *priv;
> > + struct se_msg_hdr *header;
> > +
> > + priv = dev_get_drvdata(dev);
> > +
> > + /* The function can be called with NULL msg */
> > + if (!msg) {
> > + dev_err(dev, "Message is invalid\n");
>
> Is it really worth spamming the log with this? It doesn't seem to contain useful
> information.
Accepted. Will add meaningful message "Empty(NULL) message received from FW."
>
> > + return;
> > + }
> > +
> > + header = (struct se_msg_hdr *) msg;
>
> No need to cast explicitly.
Accepted.
>
> > +
> > + if (header->tag == priv->rsp_tag) {
> > + if (!priv->waiting_rsp_dev) {
> > + /*
> > + * Reading the EdgeLock Enclave response
> > + * to the command, sent by other
> > + * linux kernel services.
> > + */
> > + spin_lock(&priv->lock);
> > + memcpy(priv->rx_msg, msg, header->size << 2);
>
> You should check that header->size << 2 fits into the rx_msg before doing this.
Accepted. Need to add the size of the buffer to priv structure.
>
> > +
> > + complete(&priv->done);
> > + spin_unlock(&priv->lock);
> > + return;
> > + }
> > + } else {
> > + dev_err(dev, "Failed to select a device for message: %.8x\n",
> > + *((u32 *) header));
> > + return;
> > + }
> > +}
> > +
> > +int validate_rsp_hdr(struct se_if_priv *priv,
> > + struct se_msg_hdr *header,
> > + uint8_t msg_id,
> > + uint8_t sz,
> > + bool is_base_api)
> > +{
> > + if (header->tag != priv->rsp_tag) {
> > + dev_err(priv->dev,
> > + "MSG[0x%x] Hdr: Resp tag mismatch. (0x%x != 0x%x)",
> > + msg_id, header->tag, priv->rsp_tag);
> > + return -EINVAL;
> > + }
> > +
> > + if (header->command != msg_id) {
> > + dev_err(priv->dev,
> > + "MSG Header: Cmd id mismatch. (0x%x != 0x%x)",
> > + header->command, msg_id);
> > + return -EINVAL;
> > + }
> > +
> > + if (header->size != (sz >> 2)) {
> > + dev_err(priv->dev,
> > + "MSG[0x%x] Hdr: Cmd size mismatch. (0x%x != 0x%x)",
> > + msg_id, header->size, (sz >> 2));
> > + return -EINVAL;
> > + }
> > +
> > + if (is_base_api && (header->ver != priv->base_api_ver)) {
> > + dev_err(priv->dev,
> > + "MSG[0x%x] Hdr: Base API Vers mismatch. (0x%x != 0x%x)",
> > + msg_id, header->ver, priv->base_api_ver);
> > + return -EINVAL;
> > + } else if (!is_base_api && header->ver != priv->fw_api_ver) {
> > + dev_err(priv->dev,
> > + "MSG[0x%x] Hdr: FW API Vers mismatch. (0x%x != 0x%x)",
> > + msg_id, header->ver, priv->fw_api_ver);
> > + return -EINVAL;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +int se_save_imem_state(struct se_if_priv *priv) {
> > + int ret;
> > +
> > + /* EXPORT command will save encrypted IMEM to given address,
> > + * so later in resume, IMEM can be restored from the given
> > + * address.
> > + *
> > + * Size must be at least 64 kB.
> > + */
> > + ret = ele_service_swap(priv->dev,
> > + priv->imem.phyaddr,
> > + ELE_IMEM_SIZE,
> > + ELE_IMEM_EXPORT);
> > + if (ret < 0)
> > + dev_err(priv->dev, "Failed to export IMEM\n");
> > + else
> > + dev_info(priv->dev,
> > + "Exported %d bytes of encrypted IMEM\n",
> > + ret);
> > +
> > + return ret;
> > +}
> > +
> > +int se_restore_imem_state(struct se_if_priv *priv) {
> > + struct ele_dev_info s_info;
> > + int ret;
> > +
> > + /* get info from ELE */
> > + ret = ele_get_info(priv->dev, &s_info);
> > + if (ret) {
> > + dev_err(priv->dev, "Failed to get info from ELE.\n");
> > + return ret;
> > + }
> > +
> > + /* Get IMEM state, if 0xFE then import IMEM */
> > + if (s_info.d_addn_info.imem_state == ELE_IMEM_STATE_BAD) {
> > + /* IMPORT command will restore IMEM from the given
> > + * address, here size is the actual size returned by ELE
> > + * during the export operation
> > + */
> > + ret = ele_service_swap(priv->dev,
> > + priv->imem.phyaddr,
> > + priv->imem.size,
> > + ELE_IMEM_IMPORT);
> > + if (ret) {
> > + dev_err(priv->dev, "Failed to import IMEM\n");
> > + goto exit;
> > + }
> > + } else
> > + goto exit;
> > +
> > + /* After importing IMEM, check if IMEM state is equal to 0xCA
> > + * to ensure IMEM is fully loaded and
> > + * ELE functionality can be used.
> > + */
> > + ret = ele_get_info(priv->dev, &s_info);
> > + if (ret) {
> > + dev_err(priv->dev, "Failed to get info from ELE.\n");
> > + goto exit;
> > + }
> > +
> > + if (s_info.d_addn_info.imem_state == ELE_IMEM_STATE_OK)
> > + dev_info(priv->dev, "Successfully restored IMEM\n");
> > + else
> > + dev_err(priv->dev, "Failed to restore IMEM\n");
> > +
> > +exit:
> > + return ret;
> > +}
> > diff --git a/drivers/firmware/imx/ele_common.h
> > b/drivers/firmware/imx/ele_common.h
> > new file mode 100644
> > index 000000000000..24569ad29a1f
> > --- /dev/null
> > +++ b/drivers/firmware/imx/ele_common.h
> > @@ -0,0 +1,45 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright 2024 NXP
> > + */
> > +
> > +
> > +#ifndef __ELE_COMMON_H__
> > +#define __ELE_COMMON_H__
> > +
> > +#include "se_ctrl.h"
> > +
> > +#define ELE_SUCCESS_IND 0xD6
> > +
> > +#define IMX_ELE_FW_DIR "imx/ele/"
> > +
> > +uint32_t imx_se_add_msg_crc(uint32_t *msg, uint32_t msg_len); int
> > +imx_ele_msg_rcv(struct se_if_priv *priv); int imx_ele_msg_send(struct
> > +se_if_priv *priv, void *tx_msg); int imx_ele_msg_send_rcv(struct
> > +se_if_priv *priv, void *tx_msg, void *rx_msg); void
> > +se_if_rx_callback(struct mbox_client *mbox_cl, void *msg); int
> > +validate_rsp_hdr(struct se_if_priv *priv,
> > + struct se_msg_hdr *header,
> > + uint8_t msg_id,
> > + uint8_t sz,
> > + bool is_base_api);
> > +
> > +/* Fill a command message header with a given command ID and length
> > +in bytes. */ static inline int imx_se_fill_cmd_msg_hdr(struct se_if_priv *priv,
> > + struct se_msg_hdr *hdr,
> > + u8 cmd,
> > + u32 len,
> > + bool is_base_api) {
> > + hdr->tag = priv->cmd_tag;
> > + hdr->ver = (is_base_api) ? priv->base_api_ver : priv->fw_api_ver;
> > + hdr->command = cmd;
> > + hdr->size = len >> 2;
> > +
> > + return 0;
> > +}
> > +
> > +int se_save_imem_state(struct se_if_priv *priv); int
> > +se_restore_imem_state(struct se_if_priv *priv);
>
> The function prefixes are still not consistent. We have imx_se_*, imx_ele_*,
> ele_* and se_*. Unless these are really different things please decide for one
> prefix.
API(s) Nomenclature guide:
- API specific to secure-enclave interface ( prefix used is se-if).
- agnostic to se-if. For such API(s):
-- se_* are API(s) common for all SE(s) like: V2X, SHE, ELE.
-- ele_* are API(s) common to ELE SE only.
Will convert the API name with prefix imx_ele_* or imx_se_*, to ele_* and se_*, respectively.
>
> > +
> > +#endif /*__ELE_COMMON_H__ */
> > diff --git a/drivers/firmware/imx/se_ctrl.c
> > b/drivers/firmware/imx/se_ctrl.c new file mode 100644 index
> > 000000000000..a7a7cacb4416
> > --- /dev/null
> > +++ b/drivers/firmware/imx/se_ctrl.c
> > @@ -0,0 +1,536 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2024 NXP
> > + */
> > +
> > +#include <linux/completion.h>
> > +#include <linux/delay.h>
> > +#include <linux/dev_printk.h>
> > +#include <linux/dma-mapping.h>
> > +#include <linux/errno.h>
> > +#include <linux/export.h>
> > +#include <linux/firmware.h>
> > +#include <linux/firmware/imx/se_api.h> #include <linux/genalloc.h>
> > +#include <linux/init.h> #include <linux/io.h> #include
> > +<linux/miscdevice.h> #include <linux/mod_devicetable.h> #include
> > +<linux/module.h> #include <linux/of_platform.h> #include
> > +<linux/of_reserved_mem.h> #include <linux/platform_device.h> #include
> > +<linux/slab.h> #include <linux/string.h> #include <linux/sys_soc.h>
> > +
> > +#include "ele_base_msg.h"
> > +#include "ele_common.h"
> > +#include "se_ctrl.h"
> > +
> > +#define RESERVED_DMA_POOL BIT(0)
> > +
> > +struct imx_se_node_info {
> > + u8 se_if_id;
> > + u8 se_if_did;
> > + u8 max_dev_ctx;
> > + u8 cmd_tag;
> > + u8 rsp_tag;
> > + u8 success_tag;
> > + u8 base_api_ver;
> > + u8 fw_api_ver;
> > + u8 *se_name;
> > + u8 *mbox_tx_name;
> > + u8 *mbox_rx_name;
> > + u8 *pool_name;
> > + u8 *fw_name_in_rfs;
> > + bool soc_register;
> > + bool reserved_dma_ranges;
> > + bool imem_mgmt;
> > + int (*se_fetch_soc_info)(struct device *dev, u16 *soc_rev, u64
> > +*serial_num); };
> > +
> > +struct imx_se_node_info_list {
> > + u8 num_mu;
> > + u16 soc_id;
> > + struct imx_se_node_info info[];
> > +};
> > +
> > +static const struct imx_se_node_info_list imx8ulp_info = {
> > + .num_mu = 1,
> > + .soc_id = SOC_ID_OF_IMX8ULP,
> > + .info = {
> > + {
> > + .se_if_id = 2,
> > + .se_if_did = 7,
> > + .max_dev_ctx = 4,
> > + .cmd_tag = 0x17,
> > + .rsp_tag = 0xe1,
> > + .success_tag = ELE_SUCCESS_IND,
> > + .base_api_ver = MESSAGING_VERSION_6,
> > + .fw_api_ver = MESSAGING_VERSION_7,
> > + .se_name = "hsm1",
> > + .mbox_tx_name = "tx",
> > + .mbox_rx_name = "rx",
> > + .pool_name = "sram",
> > + .fw_name_in_rfs = IMX_ELE_FW_DIR
> > + "mx8ulpa2ext-ahab-container.img",
> > + .soc_register = true,
> > + .reserved_dma_ranges = true,
> > + .imem_mgmt = true,
> > + .se_fetch_soc_info = ele_fetch_soc_info,
> > + },
> > + },
> > +};
> > +
> > +static const struct imx_se_node_info_list imx93_info = {
> > + .num_mu = 1,
> > + .soc_id = SOC_ID_OF_IMX93,
> > + .info = {
> > + {
> > + .se_if_id = 2,
> > + .se_if_did = 3,
> > + .max_dev_ctx = 4,
> > + .cmd_tag = 0x17,
> > + .rsp_tag = 0xe1,
> > + .success_tag = ELE_SUCCESS_IND,
> > + .base_api_ver = MESSAGING_VERSION_6,
> > + .fw_api_ver = MESSAGING_VERSION_7,
> > + .se_name = "hsm1",
> > + .mbox_tx_name = "tx",
> > + .mbox_rx_name = "rx",
> > + .reserved_dma_ranges = true,
> > + .soc_register = true,
> > + },
> > + },
> > +};
> > +
> > +static const struct of_device_id se_match[] = {
> > + { .compatible = "fsl,imx8ulp-se", .data = (void *)&imx8ulp_info},
> > + { .compatible = "fsl,imx93-se", .data = (void *)&imx93_info},
> > + {},
> > +};
> > +
> > +static const struct imx_se_node_info
> > + *get_imx_se_node_info(const struct imx_se_node_info_list *info_list,
> > + const u32 idx) {
> > + if (idx > info_list->num_mu)
> > + return NULL;
> > +
> > + return &info_list->info[idx];
> > +}
> > +
> > +void *get_phy_buf_mem_pool(struct device *dev,
> > + u8 *mem_pool_name,
> > + dma_addr_t *buf,
> > + u32 size)
> > +{
> > + struct device_node *of_node = dev->of_node;
> > + struct gen_pool *mem_pool;
> > +
> > + mem_pool = of_gen_pool_get(of_node, mem_pool_name, 0);
> > + if (!mem_pool) {
> > + dev_err(dev,
> > + "Unable to get sram pool = %s\n",
> > + mem_pool_name);
> > + return 0;
> > + }
> > +
> > + return gen_pool_dma_alloc(mem_pool, size, buf); }
> > +
> > +void free_phybuf_mem_pool(struct device *dev,
> > + u8 *mem_pool_name,
> > + u32 *buf,
> > + u32 size)
>
> The function name is not consistent with the get_ function above (phybuf vs.
> phy_buf). Also a function prefix would be nice.
>
Accepted. Removed this function.
> > +{
> > + struct device_node *of_node = dev->of_node;
> > + struct gen_pool *mem_pool;
> > +
> > + mem_pool = of_gen_pool_get(of_node, mem_pool_name, 0);
> > + if (!mem_pool)
> > + dev_err(dev,
> > + "%s: Failed: Unable to get sram pool.\n",
> > + __func__);
> > +
> > + gen_pool_free(mem_pool, (u64)buf, size); }
> > +
> > +static int imx_fetch_se_soc_info(struct se_if_priv *priv,
> > + const struct imx_se_node_info_list
> > +*info_list) {
> > + const struct imx_se_node_info *info;
> > + struct soc_device_attribute *attr;
> > + struct soc_device *sdev;
> > + u64 serial_num;
> > + u16 soc_rev;
> > + int err = 0;
> > +
> > + info = priv->info;
> > +
> > + /* This function should be called once.
> > + * Check if the soc_rev is zero to continue.
> > + */
> > + if (priv->soc_rev)
> > + return err;
>
> Just return 0 here. It takes one step less to understand what this is about.
Replacing "err" with "ret", in better understanding.
>
> > +
> > + if (info->se_fetch_soc_info) {
> > + err = info->se_fetch_soc_info(priv->dev, &soc_rev, &serial_num);
> > + if (err < 0) {
> > + dev_err(priv->dev, "Failed to fetch SoC Info.");
> > + return err;
> > + }
> > + } else {
> > + dev_err(priv->dev, "Failed to fetch SoC revision.");
> > + if (info->soc_register)
> > + dev_err(priv->dev, "Failed to do SoC registration.");
> > + err = -EINVAL;
> > + return err;
> > + }
>
> i.MX93 doesn't have a info->se_fetch_soc_info. Does this mean it doesn't work
> on this SoC?
>
Yes.
> > +
> > + priv->soc_rev = soc_rev;
> > + if (!info->soc_register)
> > + return 0;
> > +
> > + attr = devm_kzalloc(priv->dev, sizeof(*attr), GFP_KERNEL);
> > + if (!attr)
> > + return -ENOMEM;
> > +
> > + if (FIELD_GET(DEV_GETINFO_MIN_VER_MASK, soc_rev))
> > + attr->revision = devm_kasprintf(priv->dev, GFP_KERNEL, "%x.%x",
> > + FIELD_GET(DEV_GETINFO_MIN_VER_MASK,
> > + soc_rev),
> > + FIELD_GET(DEV_GETINFO_MAJ_VER_MASK,
> > + soc_rev));
> > + else
> > + attr->revision = devm_kasprintf(priv->dev, GFP_KERNEL, "%x",
> > + FIELD_GET(DEV_GETINFO_MAJ_VER_MASK,
> > + soc_rev));
> > +
> > + switch (info_list->soc_id) {
> > + case SOC_ID_OF_IMX8ULP:
> > + attr->soc_id = devm_kasprintf(priv->dev, GFP_KERNEL,
> > + "i.MX8ULP");
> > + break;
> > + case SOC_ID_OF_IMX93:
> > + attr->soc_id = devm_kasprintf(priv->dev, GFP_KERNEL,
> > + "i.MX93");
> > + break;
> > + }
> > +
> > + err = of_property_read_string(of_root, "model",
> > + &attr->machine);
> > + if (err)
> > + return -EINVAL;
> > +
> > + attr->family = devm_kasprintf(priv->dev, GFP_KERNEL, "Freescale
> > + i.MX");
> > +
> > + attr->serial_number
> > + = devm_kasprintf(priv->dev, GFP_KERNEL, "%016llX",
> > + serial_num);
> > +
> > + sdev = soc_device_register(attr);
> > + if (IS_ERR(sdev))
> > + return PTR_ERR(sdev);
> > +
> > + return 0;
> > +}
> > +
> > +/* interface for managed res to free a mailbox channel */ static void
> > +if_mbox_free_channel(void *mbox_chan) {
> > + mbox_free_channel(mbox_chan);
> > +}
> > +
> > +static int se_if_request_channel(struct device *dev,
> > + struct mbox_chan **chan,
> > + struct mbox_client *cl,
> > + const char *name) {
> > + struct mbox_chan *t_chan;
> > + int ret = 0;
> > +
> > + t_chan = mbox_request_channel_byname(cl, name);
> > + if (IS_ERR(t_chan)) {
> > + ret = PTR_ERR(t_chan);
> > + return dev_err_probe(dev, ret,
> > + "Failed to request %s channel.", name);
> > + }
> > +
> > + ret = devm_add_action(dev, if_mbox_free_channel, t_chan);
> > + if (ret) {
> > + dev_err(dev, "failed to add devm removal of mbox %s\n", name);
> > + goto exit;
> > + }
> > +
> > + *chan = t_chan;
> > +
> > +exit:
> > + return ret;
> > +}
> > +
> > +static int se_probe_if_cleanup(struct platform_device *pdev) {
> > + struct device *dev = &pdev->dev;
> > + struct se_if_priv *priv;
> > + int ret = 0;
> > +
> > + priv = dev_get_drvdata(dev);
> > +
> > + if (priv->tx_chan)
> > + mbox_free_channel(priv->tx_chan);
> > + if (priv->rx_chan)
> > + mbox_free_channel(priv->rx_chan);
>
> In se_if_request_channel() you use devm_add_action() to free the mbox
> channels. With this you release them twice.
Accepted.
Though the checks will prevent from releasing the channel twice
Will remove this.
>
> > +
> > + /* free the buffer in se remove, previously allocated
> > + * in se probe to store encrypted IMEM
> > + */
> > + if (priv->imem.buf) {
> > + dmam_free_coherent(dev,
> > + ELE_IMEM_SIZE,
> > + priv->imem.buf,
> > + priv->imem.phyaddr);
> > + priv->imem.buf = NULL;
> > + }
> > +
> > + /* No need to check, if reserved memory is allocated
> > + * before calling for its release. Or clearing the
> > + * un-set bit.
> > + */
> > + of_reserved_mem_device_release(dev);
> > + priv->flags &= (~RESERVED_DMA_POOL);
>
> priv->flags is only set but never checked. Remove.
Accepted. Will remove this flag.
>
> > +
> > + return ret;
> > +}
>
> This function can't fail and I think it shouldn't be able to. Let it return void.
Accepted.
>
> > +
> > +static void se_load_firmware(const struct firmware *fw, void
> > +*context) {
> > + struct se_if_priv *priv = (struct se_if_priv *) context;
> > + const struct imx_se_node_info *info = priv->info;
> > + const u8 *se_fw_name = info->fw_name_in_rfs;
> > + phys_addr_t se_fw_phyaddr;
> > + u8 *se_fw_buf;
> > +
> > + if (!fw) {
> > + if (priv->fw_fail > MAX_FW_LOAD_RETRIES)
> > + dev_dbg(priv->dev,
> > + "External FW not found, using ROM FW.\n");
> > + else {
> > + /*add a bit delay to wait for firmware priv released */
> > + msleep(20);
> > +
> > + /* Load firmware one more time if timeout */
> > + request_firmware_nowait(THIS_MODULE,
> > + FW_ACTION_UEVENT, info->fw_name_in_rfs,
> > + priv->dev, GFP_KERNEL, priv,
> > + se_load_firmware);
> > + priv->fw_fail++;
> > + dev_dbg(priv->dev, "Value of retries = 0x%x.\n",
> > + priv->fw_fail);
> > + }
> > +
> > + return;
> > + }
> > +
> > + /* allocate buffer to store the SE FW */
> > + se_fw_buf = dma_alloc_coherent(priv->dev, fw->size,
> > + &se_fw_phyaddr, GFP_KERNEL);
> > + if (!se_fw_buf) {
> > + dev_err(priv->dev, "Failed to alloc SE fw buffer memory\n");
> > + goto exit;
> > + }
> > +
> > + memcpy(se_fw_buf, fw->data, fw->size);
> > +
> > + if (ele_fw_authenticate(priv->dev, se_fw_phyaddr))
> > + dev_err(priv->dev,
> > + "Failed to authenticate & load SE firmware %s.\n",
> > + se_fw_name);
> > +
> > + dma_free_coherent(priv->dev,
> > + fw->size,
> > + se_fw_buf,
> > + se_fw_phyaddr);
> > +
> > +exit:
> > + release_firmware(fw);
> > +}
> > +
> > +static int se_if_probe(struct platform_device *pdev) {
> > + const struct imx_se_node_info_list *info_list;
> > + const struct imx_se_node_info *info;
> > + struct device *dev = &pdev->dev;
> > + struct se_if_priv *priv;
> > + u32 idx;
> > + int ret;
> > +
> > + if (of_property_read_u32(dev->of_node, "reg", &idx)) {
> > + ret = -EINVAL;
> > + goto exit;
> > + }
> > +
> > + info_list = device_get_match_data(dev);
> > + info = get_imx_se_node_info(info_list, idx);
> > + if (!info) {
> > + ret = -EINVAL;
> > + goto exit;
> > + }
> > +
> > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> > + if (!priv) {
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > +
> > + dev_set_drvdata(dev, priv);
> > +
> > + /* Mailbox client configuration */
> > + priv->se_mb_cl.dev = dev;
> > + priv->se_mb_cl.tx_block = false;
> > + priv->se_mb_cl.knows_txdone = true;
> > + priv->se_mb_cl.rx_callback = se_if_rx_callback;
> > +
> > + ret = se_if_request_channel(dev, &priv->tx_chan,
> > + &priv->se_mb_cl, info->mbox_tx_name);
> > + if (ret)
> > + goto exit;
> > +
> > + ret = se_if_request_channel(dev, &priv->rx_chan,
> > + &priv->se_mb_cl, info->mbox_rx_name);
> > + if (ret)
> > + goto exit;
> > +
> > + priv->dev = dev;
> > + priv->info = info;
> > +
> > + mutex_init(&priv->se_if_lock);
> > + mutex_init(&priv->se_if_cmd_lock);
> > +
> > + priv->cmd_receiver_dev = NULL;
> > + priv->waiting_rsp_dev = NULL;
>
> These are NULL already.
For code readability, it is good to know when and with what value it is initialized.
It will help review the 'if' condition based on these structure member variable.
Will covert this information into comments.
>
> > + priv->max_dev_ctx = info->max_dev_ctx;
> > + priv->cmd_tag = info->cmd_tag;
> > + priv->rsp_tag = info->rsp_tag;
> > + priv->mem_pool_name = info->pool_name;
>
> Instead of storing the mem_pool_name in priv you should call
> of_gen_pool_get() directly here and store the returned mem_pool in priv.
> It safes you from device tree parsing during runtime and makes the runtime
> code simpler.
Accepted.
Will make the changes as part v3.
Will remove the functions definition & declaration for: free_phybuf_mem_pool() & get_phybuf_mem_pool()
>
> > + priv->success_tag = info->success_tag;
> > + priv->base_api_ver = info->base_api_ver;
> > + priv->fw_api_ver = info->fw_api_ver;
> > +
> > + init_completion(&priv->done);
> > + spin_lock_init(&priv->lock);
> > +
> > + if (info->reserved_dma_ranges) {
> > + ret = of_reserved_mem_device_init(dev);
> > + if (ret) {
> > + dev_err(dev,
> > + "failed to init reserved memory region %d\n",
> > + ret);
> > + goto exit;
> > + }
> > + priv->flags |= RESERVED_DMA_POOL;
> > + }
> > +
> > + ret = imx_fetch_se_soc_info(priv, info_list);
> > + if (ret) {
> > + dev_err(dev,
> > + "failed[%pe] to fetch SoC Info\n", ERR_PTR(ret));
> > + goto exit;
> > + }
> > +
> > + if (info->imem_mgmt) {
> > + /* allocate buffer where SE store encrypted IMEM */
> > + priv->imem.buf = dmam_alloc_coherent(dev, ELE_IMEM_SIZE,
> > + &priv->imem.phyaddr,
> > + GFP_KERNEL);
> > + if (!priv->imem.buf) {
> > + dev_err(dev,
> > + "dmam-alloc-failed: To store encr-IMEM.\n");
> > + ret = -ENOMEM;
> > + goto exit;
> > + }
> > + }
> > +
> > + if (info->fw_name_in_rfs) {
> > + ret = request_firmware_nowait(THIS_MODULE,
> > + FW_ACTION_UEVENT,
> > + info->fw_name_in_rfs,
> > + dev, GFP_KERNEL, priv,
> > + se_load_firmware);
> > + if (ret)
> > + dev_warn(dev, "Failed to get firmware [%s].\n",
> > + info->fw_name_in_rfs);
> > + ret = 0;
> > + }
> > +
> > + dev_info(dev, "i.MX secure-enclave: %s interface to firmware,
> configured.\n",
> > + info->se_name);
> > + return ret;
> > +
> > +exit:
> > + /* if execution control reaches here, if probe fails.
> > + * hence doing the cleanup
> > + */
> > + if (se_probe_if_cleanup(pdev))
> > + dev_err(dev,
> > + "Failed to clean-up the child node probe.\n");
> > +
> > + return ret;
> > +}
> > +
> > +static int se_remove(struct platform_device *pdev) {
> > + if (se_probe_if_cleanup(pdev))
> > + dev_err(&pdev->dev,
> > + "i.MX Secure Enclave is not cleanly
> > +un-probed.");
> > +
> > + return 0;
> > +}
> > +
> > +static int se_suspend(struct device *dev) {
> > + struct se_if_priv *priv = dev_get_drvdata(dev);
> > + const struct imx_se_node_info *info = priv->info;
> > + int ret = 0;
> > +
> > + if (info && info->imem_mgmt) {
> > + ret = se_save_imem_state(priv);
> > + if (ret < 0)
> > + goto exit;
> > + priv->imem.size = ret;
> > + }
> > +exit:
> > + return ret;
> > +}
> > +
> > +static int se_resume(struct device *dev) {
> > + struct se_if_priv *priv = dev_get_drvdata(dev);
> > + const struct imx_se_node_info *info = priv->info;
> > +
> > + if (info && info->imem_mgmt)
> > + se_restore_imem_state(priv);
> > +
> > + return 0;
> > +}
> > +
> > +static const struct dev_pm_ops se_pm = {
> > + RUNTIME_PM_OPS(se_suspend, se_resume, NULL) };
> > +
> > +static struct platform_driver se_driver = {
> > + .driver = {
> > + .name = "fsl-se-fw",
> > + .of_match_table = se_match,
> > + .pm = &se_pm,
> > + },
> > + .probe = se_if_probe,
> > + .remove = se_remove,
> > +};
> > +MODULE_DEVICE_TABLE(of, se_match);
> > +
> > +module_platform_driver(se_driver);
> > +
> > +MODULE_AUTHOR("Pankaj Gupta <pankaj.gupta@nxp.com>");
> > +MODULE_DESCRIPTION("iMX Secure Enclave Driver.");
> > +MODULE_LICENSE("GPL");
> > diff --git a/drivers/firmware/imx/se_ctrl.h
> > b/drivers/firmware/imx/se_ctrl.h new file mode 100644 index
> > 000000000000..7d4f439a6158
> > --- /dev/null
> > +++ b/drivers/firmware/imx/se_ctrl.h
> > @@ -0,0 +1,99 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright 2024 NXP
> > + */
> > +
> > +#ifndef SE_MU_H
> > +#define SE_MU_H
> > +
> > +#include <linux/miscdevice.h>
> > +#include <linux/semaphore.h>
> > +#include <linux/mailbox_client.h>
> > +
> > +#define MAX_FW_LOAD_RETRIES 50
> > +
> > +#define RES_STATUS(x) FIELD_GET(0x000000ff, x)
> > +#define MESSAGING_VERSION_6 0x6
> > +#define MESSAGING_VERSION_7 0x7
> > +
> > +struct se_imem_buf {
> > + u8 *buf;
> > + phys_addr_t phyaddr;
> > + u32 size;
> > +};
> > +
> > +/* Header of the messages exchange with the EdgeLock Enclave */
> > +struct se_msg_hdr {
> > + u8 ver;
> > + u8 size;
> > + u8 command;
> > + u8 tag;
> > +} __packed;
> > +
> > +#define SE_MU_HDR_SZ 4
> > +
> > +struct se_api_msg {
> > + struct se_msg_hdr header;
> > + u32 data[];
> > +};
> > +
> > +struct se_if_priv {
> > + struct se_if_device_ctx *cmd_receiver_dev;
> > + /* Update to the waiting_rsp_dev, to be protected
> > + * under se_if_lock.
> > + */
> > + struct se_if_device_ctx *waiting_rsp_dev;
> > + /*
> > + * prevent parallel access to the se interface registers
> > + * e.g. a user trying to send a command while the other one is
> > + * sending a response.
> > + */
> > + struct mutex se_if_lock;
> > + /*
> > + * prevent a command to be sent on the se interface while another one is
> > + * still processing. (response to a command is allowed)
> > + */
> > + struct mutex se_if_cmd_lock;
> > + struct device *dev;
> > + u8 *mem_pool_name;
> > + u8 cmd_tag;
> > + u8 rsp_tag;
> > + u8 success_tag;
> > + u8 base_api_ver;
> > + u8 fw_api_ver;
> > + u32 fw_fail;
> > + u16 soc_rev;
> > + const void *info;
> > +
> > + struct mbox_client se_mb_cl;
> > + struct mbox_chan *tx_chan, *rx_chan;
> > +
> > + /* Assignment of the rx_msg buffer to held till the
> > + * received content as part callback function, is copied.
> > + */
> > + struct se_api_msg *rx_msg;
> > + struct completion done;
> > + spinlock_t lock;
> > + /*
> > + * Flag to retain the state of initialization done at
> > + * the time of se-if probe.
> > + */
> > + uint32_t flags;
> > + u8 max_dev_ctx;
> > + struct se_if_device_ctx **ctxs;
> > + struct se_imem_buf imem;
> > +};
> > +
> > +void *get_phy_buf_mem_pool(struct device *dev,
> > + u8 *mem_pool_name,
> > + dma_addr_t *buf,
> > + u32 size);
> > +phys_addr_t get_phy_buf_mem_pool1(struct device *dev,
> > + u8 *mem_pool_name,
> > + u32 **buf,
> > + u32 size);
>
> This function prototype is unused.
Will remove it in v4.
>
> Sascha
>
> --
> Pengutronix e.K. | |
> Steuerwalder Str. 21 |
> http://www.pen/
> gutronix.de%2F&data=05%7C02%7Cpankaj.gupta%40nxp.com%7C0ec8f4daf39
> 5405b46d108dc8f712278%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0
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> erved=0 |
> 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave
2024-07-01 7:45 ` [EXT] " Pankaj Gupta
@ 2024-07-01 8:47 ` Sascha Hauer
2024-07-15 9:19 ` Pankaj Gupta
0 siblings, 1 reply; 24+ messages in thread
From: Sascha Hauer @ 2024-07-01 8:47 UTC (permalink / raw)
To: Pankaj Gupta
Cc: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org
On Mon, Jul 01, 2024 at 07:45:20AM +0000, Pankaj Gupta wrote:
>
>
> > -----Original Message-----
> > From: Sascha Hauer <s.hauer@pengutronix.de>
> > Sent: Tuesday, June 18, 2024 2:02 PM
> > To: Pankaj Gupta <pankaj.gupta@nxp.com>
> > Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring <robh@kernel.org>;
> > Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> > <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Pengutronix
> > Kernel Team <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>;
> > Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> > <krzysztof.kozlowski+dt@linaro.org>; devicetree@vger.kernel.org;
> > imx@lists.linux.dev; linux-kernel@vger.kernel.org; linux-arm-
> > kernel@lists.infradead.org; linux-doc@vger.kernel.org
> > Subject: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock
> > Enclave
> >
> > Caution: This is an external email. Please take care when clicking links or
> > opening attachments. When in doubt, report the message using the 'Report
> > this email' button
> >
> >
> > Hi Pankaj,
> >
> > Here's some review feedback. I think it'll take some more rounds to get this
> > into shape.
> >
> > On Mon, Jun 17, 2024 at 12:59:42PM +0530, Pankaj Gupta wrote:
> > > NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE), are
> > > embedded in the SoC to support the features like HSM, SHE & V2X, using
> > > message based communication interface.
> > >
> > > The secure enclave FW communicates on a dedicated messaging unit(MU)
> > > based interface(s) with application core, where kernel is running.
> > > It exists on specific i.MX processors. e.g. i.MX8ULP, i.MX93.
> > >
> > > This patch adds the driver for communication interface to
> > > secure-enclave, for exchanging messages with NXP secure enclave HW
> > > IP(s) like EdgeLock Enclave (ELE) from Kernel-space, used by kernel
> > > management layers like
> > > - DM-Crypt.
> > >
> > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > > ---
> > > drivers/firmware/imx/Kconfig | 12 +
> > > drivers/firmware/imx/Makefile | 2 +
> > > drivers/firmware/imx/ele_base_msg.c | 284 +++++++++++++++++++
> > > drivers/firmware/imx/ele_base_msg.h | 90 ++++++
> > > drivers/firmware/imx/ele_common.c | 233 ++++++++++++++++
> > > drivers/firmware/imx/ele_common.h | 45 +++
> > > drivers/firmware/imx/se_ctrl.c | 536
> > ++++++++++++++++++++++++++++++++++++
> > > drivers/firmware/imx/se_ctrl.h | 99 +++++++
> > > include/linux/firmware/imx/se_api.h | 14 +
> > > 9 files changed, 1315 insertions(+)
> > >
> > > diff --git a/drivers/firmware/imx/Kconfig
> > > b/drivers/firmware/imx/Kconfig index 183613f82a11..56bdca9bd917 100644
> > > --- a/drivers/firmware/imx/Kconfig
> > > +++ b/drivers/firmware/imx/Kconfig
> > > @@ -22,3 +22,15 @@ config IMX_SCU
> > >
> > > This driver manages the IPC interface between host CPU and the
> > > SCU firmware running on M4.
> > > +
> > > +config IMX_SEC_ENCLAVE
> > > + tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave Firmware
> > driver."
> > > + depends on IMX_MBOX && ARCH_MXC && ARM64
> > > + default m if ARCH_MXC
> > > +
> > > + help
> > > + It is possible to use APIs exposed by the iMX Secure Enclave HW IP
> > called:
> > > + - EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93),
> > > + like base, HSM, V2X & SHE using the SAB protocol via the shared
> > Messaging
> > > + Unit. This driver exposes these interfaces via a set of file descriptors
> > > + allowing to configure shared memory, send and receive messages.
> > > diff --git a/drivers/firmware/imx/Makefile
> > > b/drivers/firmware/imx/Makefile index 8f9f04a513a8..aa9033e0e9e3
> > > 100644
> > > --- a/drivers/firmware/imx/Makefile
> > > +++ b/drivers/firmware/imx/Makefile
> > > @@ -1,3 +1,5 @@
> > > # SPDX-License-Identifier: GPL-2.0
> > > obj-$(CONFIG_IMX_DSP) += imx-dsp.o
> > > obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o
> > imx-scu-soc.o
> > > +sec_enclave-objs = se_ctrl.o ele_common.o ele_base_msg.o
> > > +obj-${CONFIG_IMX_SEC_ENCLAVE} += sec_enclave.o
> > > diff --git a/drivers/firmware/imx/ele_base_msg.c
> > > b/drivers/firmware/imx/ele_base_msg.c
> > > new file mode 100644
> > > index 000000000000..5bfd9c7e3f7e
> > > --- /dev/null
> > > +++ b/drivers/firmware/imx/ele_base_msg.c
> > > @@ -0,0 +1,284 @@
> > > +// SPDX-License-Identifier: GPL-2.0+
> > > +/*
> > > + * Copyright 2024 NXP
> > > + */
> > > +
> > > +#include <linux/types.h>
> > > +#include <linux/completion.h>
> > > +#include <linux/dma-mapping.h>
> > > +
> > > +#include "ele_base_msg.h"
> > > +#include "ele_common.h"
> > > +
> > > +int ele_get_info(struct device *dev, struct ele_dev_info *s_info) {
> >
> > I think all currently exported functions should take a struct se_if_priv
> > * as context pointer.
> > I can't find any place in which any of these functions is called differently than
> > with priv->dev.
>
> All the API(s) that construct a message to be exchanged over the device-interface to FW,
> - will be the exported symbols in the next patch-set, to be used by other Linux kernel modules like: NVMEM driver, linux crypto framework, security/keys etc.
> - These other Linux layers have to choose from multiple similar devices per secure-enclave.
>
> Kindly Consider these API(s), to be the EXPORT SYMBOLS, in later patches, when used outside of this driver.
In that case you could still add a function which translates a struct
device * into a struct se_if_priv *.
> >
> > > + struct se_if_priv *priv = dev_get_drvdata(dev);
This function should also include some sanity checks. It's not good that
an exported function takes some struct device *, blindly assumes that
it is of type se_if_priv, and if not just crashes the Kernel.
> > > +static int imx_fetch_se_soc_info(struct se_if_priv *priv,
> > > + const struct imx_se_node_info_list
> > > +*info_list) {
> > > + const struct imx_se_node_info *info;
> > > + struct soc_device_attribute *attr;
> > > + struct soc_device *sdev;
> > > + u64 serial_num;
> > > + u16 soc_rev;
> > > + int err = 0;
> > > +
> > > + info = priv->info;
> > > +
> > > + /* This function should be called once.
> > > + * Check if the soc_rev is zero to continue.
> > > + */
> > > + if (priv->soc_rev)
> > > + return err;
> >
> > Just return 0 here. It takes one step less to understand what this is about.
> Replacing "err" with "ret", in better understanding.
What I meant that you should return the constant '0' here instead of the
content of a variable. It safes a reader from looking up the value of
the variable which means it's one step less for the brain to understand
the code.
> > > +
> > > + if (info->se_fetch_soc_info) {
> > > + err = info->se_fetch_soc_info(priv->dev, &soc_rev, &serial_num);
> > > + if (err < 0) {
> > > + dev_err(priv->dev, "Failed to fetch SoC Info.");
> > > + return err;
> > > + }
> > > + } else {
> > > + dev_err(priv->dev, "Failed to fetch SoC revision.");
> > > + if (info->soc_register)
> > > + dev_err(priv->dev, "Failed to do SoC registration.");
> > > + err = -EINVAL;
> > > + return err;
> > > + }
> >
> > i.MX93 doesn't have a info->se_fetch_soc_info. Does this mean it doesn't work
> > on this SoC?
> >
> Yes.
Will you fix this?
> > > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> > > + if (!priv) {
> > > + ret = -ENOMEM;
> > > + goto exit;
> > > + }
> > > +
> > > + dev_set_drvdata(dev, priv);
> > > +
> > > + /* Mailbox client configuration */
> > > + priv->se_mb_cl.dev = dev;
> > > + priv->se_mb_cl.tx_block = false;
> > > + priv->se_mb_cl.knows_txdone = true;
> > > + priv->se_mb_cl.rx_callback = se_if_rx_callback;
> > > +
> > > + ret = se_if_request_channel(dev, &priv->tx_chan,
> > > + &priv->se_mb_cl, info->mbox_tx_name);
> > > + if (ret)
> > > + goto exit;
> > > +
> > > + ret = se_if_request_channel(dev, &priv->rx_chan,
> > > + &priv->se_mb_cl, info->mbox_rx_name);
> > > + if (ret)
> > > + goto exit;
> > > +
> > > + priv->dev = dev;
> > > + priv->info = info;
> > > +
> > > + mutex_init(&priv->se_if_lock);
> > > + mutex_init(&priv->se_if_cmd_lock);
> > > +
> > > + priv->cmd_receiver_dev = NULL;
> > > + priv->waiting_rsp_dev = NULL;
> >
> > These are NULL already.
> For code readability, it is good to know when and with what value it is initialized.
> It will help review the 'if' condition based on these structure member variable.
> Will covert this information into comments.
We already know they are NULL because you used kzalloc to allocate the
struct. No need to comment that.
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 24+ messages in thread
* RE: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave
2024-07-01 8:47 ` Sascha Hauer
@ 2024-07-15 9:19 ` Pankaj Gupta
2024-07-19 4:49 ` Pankaj Gupta
0 siblings, 1 reply; 24+ messages in thread
From: Pankaj Gupta @ 2024-07-15 9:19 UTC (permalink / raw)
To: Sascha Hauer
Cc: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org
> -----Original Message-----
> From: Sascha Hauer <s.hauer@pengutronix.de>
> Sent: Monday, July 1, 2024 2:17 PM
> To: Pankaj Gupta <pankaj.gupta@nxp.com>
> Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring <robh@kernel.org>;
> Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Pengutronix
> Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
> Kozlowski <krzysztof.kozlowski+dt@linaro.org>; devicetree@vger.kernel.org;
> imx@lists.linux.dev; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-doc@vger.kernel.org
> Subject: Re: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for NXP
> EdgeLock Enclave
>
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
>
>
> On Mon, Jul 01, 2024 at 07:45:20AM +0000, Pankaj Gupta wrote:
> >
> >
> > > -----Original Message-----
> > > From: Sascha Hauer <s.hauer@pengutronix.de>
> > > Sent: Tuesday, June 18, 2024 2:02 PM
> > > To: Pankaj Gupta <pankaj.gupta@nxp.com>
> > > Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring <robh@kernel.org>;
> > > Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> > > <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Pengutronix
> > > Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> > > <festevam@gmail.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
> > > Kozlowski <krzysztof.kozlowski+dt@linaro.org>;
> > > devicetree@vger.kernel.org; imx@lists.linux.dev;
> > > linux-kernel@vger.kernel.org; linux-arm- kernel@lists.infradead.org;
> > > linux-doc@vger.kernel.org
> > > Subject: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for NXP
> > > EdgeLock Enclave
> > >
> > > Caution: This is an external email. Please take care when clicking
> > > links or opening attachments. When in doubt, report the message
> > > using the 'Report this email' button
> > >
> > >
> > > Hi Pankaj,
> > >
> > > Here's some review feedback. I think it'll take some more rounds to
> > > get this into shape.
> > >
> > > On Mon, Jun 17, 2024 at 12:59:42PM +0530, Pankaj Gupta wrote:
> > > > NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE),
> > > > are embedded in the SoC to support the features like HSM, SHE &
> > > > V2X, using message based communication interface.
> > > >
> > > > The secure enclave FW communicates on a dedicated messaging
> > > > unit(MU) based interface(s) with application core, where kernel is
> running.
> > > > It exists on specific i.MX processors. e.g. i.MX8ULP, i.MX93.
> > > >
> > > > This patch adds the driver for communication interface to
> > > > secure-enclave, for exchanging messages with NXP secure enclave HW
> > > > IP(s) like EdgeLock Enclave (ELE) from Kernel-space, used by
> > > > kernel management layers like
> > > > - DM-Crypt.
> > > >
> > > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > > > ---
> > > > drivers/firmware/imx/Kconfig | 12 +
> > > > drivers/firmware/imx/Makefile | 2 +
> > > > drivers/firmware/imx/ele_base_msg.c | 284 +++++++++++++++++++
> > > > drivers/firmware/imx/ele_base_msg.h | 90 ++++++
> > > > drivers/firmware/imx/ele_common.c | 233 ++++++++++++++++
> > > > drivers/firmware/imx/ele_common.h | 45 +++
> > > > drivers/firmware/imx/se_ctrl.c | 536
> > > ++++++++++++++++++++++++++++++++++++
> > > > drivers/firmware/imx/se_ctrl.h | 99 +++++++
> > > > include/linux/firmware/imx/se_api.h | 14 +
> > > > 9 files changed, 1315 insertions(+)
> > > >
> > > > diff --git a/drivers/firmware/imx/Kconfig
> > > > b/drivers/firmware/imx/Kconfig index 183613f82a11..56bdca9bd917
> > > > 100644
> > > > --- a/drivers/firmware/imx/Kconfig
> > > > +++ b/drivers/firmware/imx/Kconfig
> > > > @@ -22,3 +22,15 @@ config IMX_SCU
> > > >
> > > > This driver manages the IPC interface between host CPU and the
> > > > SCU firmware running on M4.
> > > > +
> > > > +config IMX_SEC_ENCLAVE
> > > > + tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave
> > > > +Firmware
> > > driver."
> > > > + depends on IMX_MBOX && ARCH_MXC && ARM64
> > > > + default m if ARCH_MXC
> > > > +
> > > > + help
> > > > + It is possible to use APIs exposed by the iMX Secure
> > > > + Enclave HW IP
> > > called:
> > > > + - EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93),
> > > > + like base, HSM, V2X & SHE using the SAB protocol via
> > > > + the shared
> > > Messaging
> > > > + Unit. This driver exposes these interfaces via a set of file descriptors
> > > > + allowing to configure shared memory, send and receive messages.
> > > > diff --git a/drivers/firmware/imx/Makefile
> > > > b/drivers/firmware/imx/Makefile index 8f9f04a513a8..aa9033e0e9e3
> > > > 100644
> > > > --- a/drivers/firmware/imx/Makefile
> > > > +++ b/drivers/firmware/imx/Makefile
> > > > @@ -1,3 +1,5 @@
> > > > # SPDX-License-Identifier: GPL-2.0
> > > > obj-$(CONFIG_IMX_DSP) += imx-dsp.o
> > > > obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o
> > > imx-scu-soc.o
> > > > +sec_enclave-objs = se_ctrl.o ele_common.o ele_base_msg.o
> > > > +obj-${CONFIG_IMX_SEC_ENCLAVE} += sec_enclave.o
> > > > diff --git a/drivers/firmware/imx/ele_base_msg.c
> > > > b/drivers/firmware/imx/ele_base_msg.c
> > > > new file mode 100644
> > > > index 000000000000..5bfd9c7e3f7e
> > > > --- /dev/null
> > > > +++ b/drivers/firmware/imx/ele_base_msg.c
> > > > @@ -0,0 +1,284 @@
> > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > +/*
> > > > + * Copyright 2024 NXP
> > > > + */
> > > > +
> > > > +#include <linux/types.h>
> > > > +#include <linux/completion.h>
> > > > +#include <linux/dma-mapping.h>
> > > > +
> > > > +#include "ele_base_msg.h"
> > > > +#include "ele_common.h"
> > > > +
> > > > +int ele_get_info(struct device *dev, struct ele_dev_info *s_info)
> > > > +{
> > >
> > > I think all currently exported functions should take a struct
> > > se_if_priv
> > > * as context pointer.
> > > I can't find any place in which any of these functions is called
> > > differently than with priv->dev.
> >
> > All the API(s) that construct a message to be exchanged over the
> > device-interface to FW,
> > - will be the exported symbols in the next patch-set, to be used by other
> Linux kernel modules like: NVMEM driver, linux crypto framework,
> security/keys etc.
> > - These other Linux layers have to choose from multiple similar devices per
> secure-enclave.
> >
> > Kindly Consider these API(s), to be the EXPORT SYMBOLS, in later patches,
> when used outside of this driver.
>
> In that case you could still add a function which translates a struct device *
> into a struct se_if_priv *.
>
> > >
> > > > + struct se_if_priv *priv = dev_get_drvdata(dev);
>
> This function should also include some sanity checks. It's not good that an
> exported function takes some struct device *, blindly assumes that it is of type
> se_if_priv, and if not just crashes the Kernel.
Will add a wrapper function over "struct se_if_priv *priv = dev_get_drvdata(dev);", to add some safety checks.
Will fix this in V6.
>
> > > > +static int imx_fetch_se_soc_info(struct se_if_priv *priv,
> > > > + const struct imx_se_node_info_list
> > > > +*info_list) {
> > > > + const struct imx_se_node_info *info;
> > > > + struct soc_device_attribute *attr;
> > > > + struct soc_device *sdev;
> > > > + u64 serial_num;
> > > > + u16 soc_rev;
> > > > + int err = 0;
> > > > +
> > > > + info = priv->info;
> > > > +
> > > > + /* This function should be called once.
> > > > + * Check if the soc_rev is zero to continue.
> > > > + */
> > > > + if (priv->soc_rev)
> > > > + return err;
> > >
> > > Just return 0 here. It takes one step less to understand what this is about.
> > Replacing "err" with "ret", in better understanding.
>
> What I meant that you should return the constant '0' here instead of the
> content of a variable. It safes a reader from looking up the value of the variable
> which means it's one step less for the brain to understand the code.
>
> > > > +
> > > > + if (info->se_fetch_soc_info) {
> > > > + err = info->se_fetch_soc_info(priv->dev, &soc_rev, &serial_num);
> > > > + if (err < 0) {
> > > > + dev_err(priv->dev, "Failed to fetch SoC Info.");
> > > > + return err;
> > > > + }
> > > > + } else {
> > > > + dev_err(priv->dev, "Failed to fetch SoC revision.");
> > > > + if (info->soc_register)
> > > > + dev_err(priv->dev, "Failed to do SoC registration.");
> > > > + err = -EINVAL;
> > > > + return err;
> > > > + }
> > >
> > > i.MX93 doesn't have a info->se_fetch_soc_info. Does this mean it
> > > doesn't work on this SoC?
> > >
> > Yes.
>
> Will you fix this?
For i.MX93, SoC registration is not done through this driver.
This is implemented as this only. Nothing to be fixed.
>
> > > > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> > > > + if (!priv) {
> > > > + ret = -ENOMEM;
> > > > + goto exit;
> > > > + }
> > > > +
> > > > + dev_set_drvdata(dev, priv);
> > > > +
> > > > + /* Mailbox client configuration */
> > > > + priv->se_mb_cl.dev = dev;
> > > > + priv->se_mb_cl.tx_block = false;
> > > > + priv->se_mb_cl.knows_txdone = true;
> > > > + priv->se_mb_cl.rx_callback = se_if_rx_callback;
> > > > +
> > > > + ret = se_if_request_channel(dev, &priv->tx_chan,
> > > > + &priv->se_mb_cl, info->mbox_tx_name);
> > > > + if (ret)
> > > > + goto exit;
> > > > +
> > > > + ret = se_if_request_channel(dev, &priv->rx_chan,
> > > > + &priv->se_mb_cl, info->mbox_rx_name);
> > > > + if (ret)
> > > > + goto exit;
> > > > +
> > > > + priv->dev = dev;
> > > > + priv->info = info;
> > > > +
> > > > + mutex_init(&priv->se_if_lock);
> > > > + mutex_init(&priv->se_if_cmd_lock);
> > > > +
> > > > + priv->cmd_receiver_dev = NULL;
> > > > + priv->waiting_rsp_dev = NULL;
> > >
> > > These are NULL already.
> > For code readability, it is good to know when and with what value it is
> initialized.
> > It will help review the 'if' condition based on these structure member
> variable.
> > Will covert this information into comments.
>
> We already know they are NULL because you used kzalloc to allocate the
> struct. No need to comment that.
>
> Sascha
>
> --
> Pengutronix e.K. | |
> Steuerwalder Str. 21 |
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.
> pengutronix.de%2F&data=05%7C02%7Cpankaj.gupta%40nxp.com%7Cc8b7
> b605e99744ccf94e08dc99aa66f0%7C686ea1d3bc2b4c6fa92cd99c5c30163
> 5%7C0%7C0%7C638554204358183687%7CUnknown%7CTWFpbGZsb3d8e
> yJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> D%7C0%7C%7C%7C&sdata=Nl8R%2FcwuT69VVUxe00AichgoSEEJexZ0TfhjfuI
> BqoY%3D&reserved=0 |
> 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 24+ messages in thread
* RE: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave
2024-07-15 9:19 ` Pankaj Gupta
@ 2024-07-19 4:49 ` Pankaj Gupta
0 siblings, 0 replies; 24+ messages in thread
From: Pankaj Gupta @ 2024-07-19 4:49 UTC (permalink / raw)
To: Sascha Hauer
Cc: Jonathan Corbet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org
> -----Original Message-----
> From: Pankaj Gupta
> Sent: Monday, July 15, 2024 2:49 PM
> To: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring <robh@kernel.org>;
> Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Pengutronix
> Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
> Kozlowski <krzysztof.kozlowski+dt@linaro.org>; devicetree@vger.kernel.org;
> imx@lists.linux.dev; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-doc@vger.kernel.org
> Subject: RE: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for NXP
> EdgeLock Enclave
>
>
>
> > -----Original Message-----
> > From: Sascha Hauer <s.hauer@pengutronix.de>
> > Sent: Monday, July 1, 2024 2:17 PM
> > To: Pankaj Gupta <pankaj.gupta@nxp.com>
> > Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring <robh@kernel.org>;
> > Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> > <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Pengutronix
> > Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> > <festevam@gmail.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
> > Kozlowski <krzysztof.kozlowski+dt@linaro.org>;
> > devicetree@vger.kernel.org; imx@lists.linux.dev;
> > linux-kernel@vger.kernel.org; linux-arm- kernel@lists.infradead.org;
> > linux-doc@vger.kernel.org
> > Subject: Re: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for
> > NXP EdgeLock Enclave
> >
> > Caution: This is an external email. Please take care when clicking
> > links or opening attachments. When in doubt, report the message using
> > the 'Report this email' button
> >
> >
> > On Mon, Jul 01, 2024 at 07:45:20AM +0000, Pankaj Gupta wrote:
> > >
> > >
> > > > -----Original Message-----
> > > > From: Sascha Hauer <s.hauer@pengutronix.de>
> > > > Sent: Tuesday, June 18, 2024 2:02 PM
> > > > To: Pankaj Gupta <pankaj.gupta@nxp.com>
> > > > Cc: Jonathan Corbet <corbet@lwn.net>; Rob Herring
> > > > <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
> > > > Dooley <conor+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>;
> > > > Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> > > > <festevam@gmail.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
> > > > Kozlowski <krzysztof.kozlowski+dt@linaro.org>;
> > > > devicetree@vger.kernel.org; imx@lists.linux.dev;
> > > > linux-kernel@vger.kernel.org; linux-arm-
> > > > kernel@lists.infradead.org; linux-doc@vger.kernel.org
> > > > Subject: [EXT] Re: [PATCH v3 4/5] firmware: imx: add driver for
> > > > NXP EdgeLock Enclave
> > > >
> > > > Caution: This is an external email. Please take care when clicking
> > > > links or opening attachments. When in doubt, report the message
> > > > using the 'Report this email' button
> > > >
> > > >
> > > > Hi Pankaj,
> > > >
> > > > Here's some review feedback. I think it'll take some more rounds
> > > > to get this into shape.
> > > >
> > > > On Mon, Jun 17, 2024 at 12:59:42PM +0530, Pankaj Gupta wrote:
> > > > > NXP hardware IP(s) for secure-enclaves like Edgelock
> > > > > Enclave(ELE), are embedded in the SoC to support the features
> > > > > like HSM, SHE & V2X, using message based communication interface.
> > > > >
> > > > > The secure enclave FW communicates on a dedicated messaging
> > > > > unit(MU) based interface(s) with application core, where kernel
> > > > > is
> > running.
> > > > > It exists on specific i.MX processors. e.g. i.MX8ULP, i.MX93.
> > > > >
> > > > > This patch adds the driver for communication interface to
> > > > > secure-enclave, for exchanging messages with NXP secure enclave
> > > > > HW
> > > > > IP(s) like EdgeLock Enclave (ELE) from Kernel-space, used by
> > > > > kernel management layers like
> > > > > - DM-Crypt.
> > > > >
> > > > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> > > > > ---
> > > > > drivers/firmware/imx/Kconfig | 12 +
> > > > > drivers/firmware/imx/Makefile | 2 +
> > > > > drivers/firmware/imx/ele_base_msg.c | 284 +++++++++++++++++++
> > > > > drivers/firmware/imx/ele_base_msg.h | 90 ++++++
> > > > > drivers/firmware/imx/ele_common.c | 233 ++++++++++++++++
> > > > > drivers/firmware/imx/ele_common.h | 45 +++
> > > > > drivers/firmware/imx/se_ctrl.c | 536
> > > > ++++++++++++++++++++++++++++++++++++
> > > > > drivers/firmware/imx/se_ctrl.h | 99 +++++++
> > > > > include/linux/firmware/imx/se_api.h | 14 +
> > > > > 9 files changed, 1315 insertions(+)
> > > > >
> > > > > diff --git a/drivers/firmware/imx/Kconfig
> > > > > b/drivers/firmware/imx/Kconfig index 183613f82a11..56bdca9bd917
> > > > > 100644
> > > > > --- a/drivers/firmware/imx/Kconfig
> > > > > +++ b/drivers/firmware/imx/Kconfig
> > > > > @@ -22,3 +22,15 @@ config IMX_SCU
> > > > >
> > > > > This driver manages the IPC interface between host CPU and the
> > > > > SCU firmware running on M4.
> > > > > +
> > > > > +config IMX_SEC_ENCLAVE
> > > > > + tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave
> > > > > +Firmware
> > > > driver."
> > > > > + depends on IMX_MBOX && ARCH_MXC && ARM64
> > > > > + default m if ARCH_MXC
> > > > > +
> > > > > + help
> > > > > + It is possible to use APIs exposed by the iMX Secure
> > > > > + Enclave HW IP
> > > > called:
> > > > > + - EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93),
> > > > > + like base, HSM, V2X & SHE using the SAB protocol via
> > > > > + the shared
> > > > Messaging
> > > > > + Unit. This driver exposes these interfaces via a set of file
> descriptors
> > > > > + allowing to configure shared memory, send and receive
> messages.
> > > > > diff --git a/drivers/firmware/imx/Makefile
> > > > > b/drivers/firmware/imx/Makefile index 8f9f04a513a8..aa9033e0e9e3
> > > > > 100644
> > > > > --- a/drivers/firmware/imx/Makefile
> > > > > +++ b/drivers/firmware/imx/Makefile
> > > > > @@ -1,3 +1,5 @@
> > > > > # SPDX-License-Identifier: GPL-2.0
> > > > > obj-$(CONFIG_IMX_DSP) += imx-dsp.o
> > > > > obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o
> rm.o
> > > > imx-scu-soc.o
> > > > > +sec_enclave-objs = se_ctrl.o ele_common.o ele_base_msg.o
> > > > > +obj-${CONFIG_IMX_SEC_ENCLAVE} += sec_enclave.o
> > > > > diff --git a/drivers/firmware/imx/ele_base_msg.c
> > > > > b/drivers/firmware/imx/ele_base_msg.c
> > > > > new file mode 100644
> > > > > index 000000000000..5bfd9c7e3f7e
> > > > > --- /dev/null
> > > > > +++ b/drivers/firmware/imx/ele_base_msg.c
> > > > > @@ -0,0 +1,284 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > > +/*
> > > > > + * Copyright 2024 NXP
> > > > > + */
> > > > > +
> > > > > +#include <linux/types.h>
> > > > > +#include <linux/completion.h>
> > > > > +#include <linux/dma-mapping.h>
> > > > > +
> > > > > +#include "ele_base_msg.h"
> > > > > +#include "ele_common.h"
> > > > > +
> > > > > +int ele_get_info(struct device *dev, struct ele_dev_info
> > > > > +*s_info) {
> > > >
> > > > I think all currently exported functions should take a struct
> > > > se_if_priv
> > > > * as context pointer.
> > > > I can't find any place in which any of these functions is called
> > > > differently than with priv->dev.
> > >
> > > All the API(s) that construct a message to be exchanged over the
> > > device-interface to FW,
> > > - will be the exported symbols in the next patch-set, to be used by
> > > other
> > Linux kernel modules like: NVMEM driver, linux crypto framework,
> > security/keys etc.
> > > - These other Linux layers have to choose from multiple similar
> > > devices per
> > secure-enclave.
> > >
> > > Kindly Consider these API(s), to be the EXPORT SYMBOLS, in later
> > > patches,
> > when used outside of this driver.
> >
> > In that case you could still add a function which translates a struct
> > device * into a struct se_if_priv *.
> >
> > > >
> > > > > + struct se_if_priv *priv = dev_get_drvdata(dev);
> >
> > This function should also include some sanity checks. It's not good
> > that an exported function takes some struct device *, blindly assumes
> > that it is of type se_if_priv, and if not just crashes the Kernel.
>
> Will add a wrapper function over "struct se_if_priv *priv =
> dev_get_drvdata(dev);", to add some safety checks.
> Will fix this in V6.
>
Will add for NULL check for priv data, as a sanity check.
> >
> > > > > +static int imx_fetch_se_soc_info(struct se_if_priv *priv,
> > > > > + const struct
> > > > > +imx_se_node_info_list
> > > > > +*info_list) {
> > > > > + const struct imx_se_node_info *info;
> > > > > + struct soc_device_attribute *attr;
> > > > > + struct soc_device *sdev;
> > > > > + u64 serial_num;
> > > > > + u16 soc_rev;
> > > > > + int err = 0;
> > > > > +
> > > > > + info = priv->info;
> > > > > +
> > > > > + /* This function should be called once.
> > > > > + * Check if the soc_rev is zero to continue.
> > > > > + */
> > > > > + if (priv->soc_rev)
> > > > > + return err;
> > > >
> > > > Just return 0 here. It takes one step less to understand what this is about.
> > > Replacing "err" with "ret", in better understanding.
> >
> > What I meant that you should return the constant '0' here instead of
> > the content of a variable. It safes a reader from looking up the value
> > of the variable which means it's one step less for the brain to understand the
> code.
> >
> > > > > +
> > > > > + if (info->se_fetch_soc_info) {
> > > > > + err = info->se_fetch_soc_info(priv->dev, &soc_rev,
> &serial_num);
> > > > > + if (err < 0) {
> > > > > + dev_err(priv->dev, "Failed to fetch SoC Info.");
> > > > > + return err;
> > > > > + }
> > > > > + } else {
> > > > > + dev_err(priv->dev, "Failed to fetch SoC revision.");
> > > > > + if (info->soc_register)
> > > > > + dev_err(priv->dev, "Failed to do SoC registration.");
> > > > > + err = -EINVAL;
> > > > > + return err;
> > > > > + }
> > > >
> > > > i.MX93 doesn't have a info->se_fetch_soc_info. Does this mean it
> > > > doesn't work on this SoC?
> > > >
> > > Yes.
> >
> > Will you fix this?
> For i.MX93, SoC registration is not done through this driver.
> This is implemented as this only. Nothing to be fixed.
>
> >
> > > > > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> > > > > + if (!priv) {
> > > > > + ret = -ENOMEM;
> > > > > + goto exit;
> > > > > + }
> > > > > +
> > > > > + dev_set_drvdata(dev, priv);
> > > > > +
> > > > > + /* Mailbox client configuration */
> > > > > + priv->se_mb_cl.dev = dev;
> > > > > + priv->se_mb_cl.tx_block = false;
> > > > > + priv->se_mb_cl.knows_txdone = true;
> > > > > + priv->se_mb_cl.rx_callback = se_if_rx_callback;
> > > > > +
> > > > > + ret = se_if_request_channel(dev, &priv->tx_chan,
> > > > > + &priv->se_mb_cl, info->mbox_tx_name);
> > > > > + if (ret)
> > > > > + goto exit;
> > > > > +
> > > > > + ret = se_if_request_channel(dev, &priv->rx_chan,
> > > > > + &priv->se_mb_cl, info->mbox_rx_name);
> > > > > + if (ret)
> > > > > + goto exit;
> > > > > +
> > > > > + priv->dev = dev;
> > > > > + priv->info = info;
> > > > > +
> > > > > + mutex_init(&priv->se_if_lock);
> > > > > + mutex_init(&priv->se_if_cmd_lock);
> > > > > +
> > > > > + priv->cmd_receiver_dev = NULL;
> > > > > + priv->waiting_rsp_dev = NULL;
> > > >
> > > > These are NULL already.
> > > For code readability, it is good to know when and with what value it
> > > is
> > initialized.
> > > It will help review the 'if' condition based on these structure
> > > member
> > variable.
> > > Will covert this information into comments.
> >
> > We already know they are NULL because you used kzalloc to allocate the
> > struct. No need to comment that.
> >
> > Sascha
> >
> > --
> > Pengutronix e.K. | |
> > Steuerwalder Str. 21 |
> >
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^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2024-07-19 4:49 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-06-17 7:29 [PATCH v3 0/5] Communication Interface to NXP secure-enclave HW IP like Edgelock Enclave Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 1/5] Documentation/firmware: add imx/se to other_interfaces Pankaj Gupta
2024-06-18 21:13 ` Randy Dunlap
2024-06-19 7:30 ` [EXT] " Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc Pankaj Gupta
2024-06-17 16:37 ` Conor Dooley
2024-06-18 10:58 ` [EXT] " Pankaj Gupta
2024-06-18 11:19 ` Conor Dooley
2024-06-24 13:46 ` Pankaj Gupta
2024-06-24 16:48 ` Conor Dooley
2024-06-24 13:12 ` Pankaj Gupta
2024-06-24 13:27 ` Conor Dooley
2024-06-17 7:29 ` [PATCH v3 3/5] arm64: dts: imx8ulp-evk: add nxp secure enclave firmware Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 4/5] firmware: imx: add driver for NXP EdgeLock Enclave Pankaj Gupta
2024-06-18 8:31 ` Sascha Hauer
2024-07-01 7:45 ` [EXT] " Pankaj Gupta
2024-07-01 8:47 ` Sascha Hauer
2024-07-15 9:19 ` Pankaj Gupta
2024-07-19 4:49 ` Pankaj Gupta
2024-06-17 7:29 ` [PATCH v3 5/5] firmware: imx: adds miscdev Pankaj Gupta
2024-06-18 21:28 ` Randy Dunlap
2024-06-18 21:39 ` Randy Dunlap
2024-06-19 9:02 ` [EXT] " Pankaj Gupta
2024-06-19 8:58 ` Pankaj Gupta
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