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* [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port.
@ 2023-04-17 10:32 Thippeswamy Havalige
  0 siblings, 0 replies; 6+ messages in thread
From: Thippeswamy Havalige @ 2023-04-17 10:32 UTC (permalink / raw)
  To: linux-pci, linux-kernel, devicetree, krzysztof.kozlowski
  Cc: bhelgaas, michals, robh+dt, nagaradhesh.yeleswarapu,
	bharat.kumar.gogada, lorenzo.pieralisi, Thippeswamy Havalige

This series of patch add support for Xilinx XDMA Soft IP as Root Port.

The Xilinx XDMA Soft IP support's 32 bit and 64bit BAR's.
As Root Port it supports MSI and legacy interrupts.

Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com>
---
Thippeswamy Havalige (2):
  dt-bindings: PCI: xilinx-xdma: Add YAML schemas for Xilinx XDMA PCIe
    Root Port Bridge
  PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver

 .../bindings/pci/xlnx,xdma-host.yaml          | 117 +++
 drivers/pci/controller/Kconfig                |  10 +
 drivers/pci/controller/Makefile               |   1 +
 drivers/pci/controller/pcie-xdma-pl.c         | 877 ++++++++++++++++++
 4 files changed, 1005 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
 create mode 100644 drivers/pci/controller/pcie-xdma-pl.c

-- 
2.25.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port
@ 2024-06-24 10:42 Thippeswamy Havalige
  0 siblings, 0 replies; 6+ messages in thread
From: Thippeswamy Havalige @ 2024-06-24 10:42 UTC (permalink / raw)
  To: bhelgaas, kw, robh, krzk+dt, conor+dt, lpieralisi
  Cc: linux-pci, devicetree, linux-kernel, michal.simek,
	linux-arm-kernel, bharat.kumar.gogada, Thippeswamy Havalige

This series of patch add support for Xilinx QDMA Soft IP as Root Port.

The Xilinx QDMA Soft IP support's 32 bit and 64bit BAR's.
As Root Port it supports MSI and legacy interrupts.

Thippeswamy Havalige (2):
  dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root
    Port Bridge
  PCI: xilinx-xdma: Add Xilinx QDMA Root Port driver

 .../devicetree/bindings/pci/xlnx,xdma-host.yaml    | 41 +++++++++++++++-
 drivers/pci/controller/pcie-xilinx-dma-pl.c        | 56 ++++++++++++++++++++--
 2 files changed, 92 insertions(+), 5 deletions(-)

-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port
@ 2024-06-24 11:07 Thippeswamy Havalige
  2024-06-24 11:07 ` [PATCH 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge Thippeswamy Havalige
  2024-06-24 11:11 ` [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port Havalige, Thippeswamy
  0 siblings, 2 replies; 6+ messages in thread
From: Thippeswamy Havalige @ 2024-06-24 11:07 UTC (permalink / raw)
  To: bhelgaas, kw, robh, krzk+dt, conor+dt, lpieralisi
  Cc: linux-pci, devicetree, linux-kernel, bharat.kumar.gogada,
	Thippeswamy Havalige

This series of patch add support for Xilinx QDMA Soft IP as Root Port.

The Xilinx QDMA Soft IP support's 32 bit and 64bit BAR's.
As Root Port it supports MSI and legacy interrupts.

Thippeswamy Havalige (2):
  dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root
    Port Bridge
  PCI: xilinx-xdma: Add Xilinx QDMA Root Port driver

 .../devicetree/bindings/pci/xlnx,xdma-host.yaml    | 41 +++++++++++++++-
 drivers/pci/controller/pcie-xilinx-dma-pl.c        | 56 ++++++++++++++++++++--
 2 files changed, 92 insertions(+), 5 deletions(-)

-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge
  2024-06-24 11:07 [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port Thippeswamy Havalige
@ 2024-06-24 11:07 ` Thippeswamy Havalige
  2024-06-24 12:24   ` Rob Herring (Arm)
  2024-06-24 11:11 ` [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port Havalige, Thippeswamy
  1 sibling, 1 reply; 6+ messages in thread
From: Thippeswamy Havalige @ 2024-06-24 11:07 UTC (permalink / raw)
  To: bhelgaas, kw, robh, krzk+dt, conor+dt, lpieralisi
  Cc: linux-pci, devicetree, linux-kernel, bharat.kumar.gogada,
	Thippeswamy Havalige

Add YAML devicetree schemas for Xilinx QDMA Soft IP PCIe Root Port Bridge.

Signed-off-by: Thippeswamy Havalige <thippesw@amd.com>
---
 .../devicetree/bindings/pci/xlnx,xdma-host.yaml    | 41 ++++++++++++++++++++--
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
index 2f59b3a..b705e47 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
@@ -14,10 +14,21 @@ allOf:
 
 properties:
   compatible:
-    const: xlnx,xdma-host-3.00
+    enum:
+      - xlnx,xdma-host-3.00
+      - xlnx,qdma-host-3.00
 
   reg:
-    maxItems: 1
+    items:
+      - description: configuration region and XDMA bridge register.
+      - description: QDMA bridge register.
+    minItems: 1
+
+  reg-names:
+    items:
+      - const: cfg
+      - const: breg
+    minItems: 1
 
   ranges:
     maxItems: 2
@@ -111,4 +122,30 @@ examples:
                 interrupt-controller;
             };
         };
+
+        axi-pcie@80000000 {
+            compatible = "xlnx,qdma-host-3.00";
+            reg = <0x0 0x80000000 0x0 0x10000000>, <0x0 0x90000000 0x0 0x10000000>;
+            reg-names = "cfg", "breg";
+            ranges = <0x2000000 0x0 0xa8000000 0x0 0xa8000000 0x0 0x8000000>,
+                     <0x43000000 0x4 0x80000000 0x4 0x80000000 0x0 0x40000000>;
+            #address-cells = <3>;
+            #interrupt-cells = <1>;
+            #size-cells = <2>;
+            device_type = "pci";
+            interrupt-parent = <&gic>;
+            interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+            interrupt-names = "misc", "msi0", "msi1";
+            interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+            interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
+                            <0 0 0 2 &pcie_intc_0 1>,
+                            <0 0 0 3 &pcie_intc_0 2>,
+                            <0 0 0 4 &pcie_intc_0 3>;
+            pcie_intc_1: interrupt-controller {
+                #address-cells = <0>;
+                #interrupt-cells = <1>;
+                interrupt-controller;
+            };
+        };
     };
-- 
1.8.3.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* RE: [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port
  2024-06-24 11:07 [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port Thippeswamy Havalige
  2024-06-24 11:07 ` [PATCH 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge Thippeswamy Havalige
@ 2024-06-24 11:11 ` Havalige, Thippeswamy
  1 sibling, 0 replies; 6+ messages in thread
From: Havalige, Thippeswamy @ 2024-06-24 11:11 UTC (permalink / raw)
  To: Havalige, Thippeswamy, bhelgaas@google.com, kw@linux.com,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	lpieralisi@kernel.org
  Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Gogada, Bharat Kumar

Ignore this patch series

> -----Original Message-----
> From: Thippeswamy Havalige <thippesw@amd.com>
> Sent: Monday, June 24, 2024 4:38 PM
> To: bhelgaas@google.com; kw@linux.com; robh@kernel.org;
> krzk+dt@kernel.org; conor+dt@kernel.org; lpieralisi@kernel.org
> Cc: linux-pci@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; Gogada, Bharat Kumar
> <bharat.kumar.gogada@amd.com>; Havalige, Thippeswamy
> <thippeswamy.havalige@amd.com>
> Subject: [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port
> 
> This series of patch add support for Xilinx QDMA Soft IP as Root Port.
> 
> The Xilinx QDMA Soft IP support's 32 bit and 64bit BAR's.
> As Root Port it supports MSI and legacy interrupts.
> 
> Thippeswamy Havalige (2):
>   dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root
>     Port Bridge
>   PCI: xilinx-xdma: Add Xilinx QDMA Root Port driver
> 
>  .../devicetree/bindings/pci/xlnx,xdma-host.yaml    | 41 +++++++++++++++-
>  drivers/pci/controller/pcie-xilinx-dma-pl.c        | 56 ++++++++++++++++++++-
> -
>  2 files changed, 92 insertions(+), 5 deletions(-)
> 
> --
> 1.8.3.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge
  2024-06-24 11:07 ` [PATCH 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge Thippeswamy Havalige
@ 2024-06-24 12:24   ` Rob Herring (Arm)
  0 siblings, 0 replies; 6+ messages in thread
From: Rob Herring (Arm) @ 2024-06-24 12:24 UTC (permalink / raw)
  To: Thippeswamy Havalige
  Cc: linux-kernel, linux-pci, devicetree, bharat.kumar.gogada,
	conor+dt, lpieralisi, bhelgaas, kw, krzk+dt


On Mon, 24 Jun 2024 16:37:54 +0530, Thippeswamy Havalige wrote:
> Add YAML devicetree schemas for Xilinx QDMA Soft IP PCIe Root Port Bridge.
> 
> Signed-off-by: Thippeswamy Havalige <thippesw@amd.com>
> ---
>  .../devicetree/bindings/pci/xlnx,xdma-host.yaml    | 41 ++++++++++++++++++++--
>  1 file changed, 39 insertions(+), 2 deletions(-)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dts:55.31-79.15: Warning (pci_bridge): /example-0/soc/axi-pcie@80000000: node name is not "pci" or "pcie"
Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: Warning (unit_address_format): Failed prerequisite 'pci_bridge'
Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: Warning (pci_device_reg): Failed prerequisite 'pci_bridge'
Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge'
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: axi-pcie@80000000: $nodename:0: 'axi-pcie@80000000' does not match '^pcie?@'
	from schema $id: http://devicetree.org/schemas/pci/xlnx,xdma-host.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/xlnx,xdma-host.example.dtb: axi-pcie@80000000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'device_type' were unexpected)
	from schema $id: http://devicetree.org/schemas/pci/xlnx,xdma-host.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240624110755.133625-2-thippesw@amd.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2024-06-24 12:24 UTC | newest]

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2024-06-24 11:07 [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port Thippeswamy Havalige
2024-06-24 11:07 ` [PATCH 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge Thippeswamy Havalige
2024-06-24 12:24   ` Rob Herring (Arm)
2024-06-24 11:11 ` [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port Havalige, Thippeswamy
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