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* [PATCH] riscv: dts: starfive: add pcie1 on the star64
@ 2024-06-26 20:00 Conor Dooley
  2024-07-01 10:45 ` Minda Chen
  0 siblings, 1 reply; 3+ messages in thread
From: Conor Dooley @ 2024-06-26 20:00 UTC (permalink / raw)
  To: linux-riscv
  Cc: conor, Conor Dooley, Minda Chen, Rob Herring, devicetree,
	linux-kernel

From: Conor Dooley <conor.dooley@microchip.com>

It was reported to me that the star64 actually /does/ have an exposed
PCIe port, despite the commit message there. In my original conversation
with Minda, they said that pcie1 was available there and pcie0 was not,
but the v2 patch didn't actually add pcie1 on the star64.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
I think I'll just squash this in and fixup the commit message, since the
patch is still at the top of my branch.

CC: Minda Chen <minda.chen@starfivetech.com>
CC: Conor Dooley <conor@kernel.org>
CC: Rob Herring <robh+dt@kernel.org>,
CC: Emil Renner Berthing <emil.renner.berthing@canonical.com
CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-riscv@lists.infradead.org
---
 arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
index 2d41f18e0359..b720cdd15ed6 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
@@ -39,6 +39,10 @@ phy1: ethernet-phy@1 {
 	};
 };
 
+&pcie1 {
+	status = "okay";
+};
+
 &phy0 {
 	rx-internal-delay-ps = <1900>;
 	tx-internal-delay-ps = <1500>;
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] riscv: dts: starfive: add pcie1 on the star64
  2024-06-26 20:00 [PATCH] riscv: dts: starfive: add pcie1 on the star64 Conor Dooley
@ 2024-07-01 10:45 ` Minda Chen
  2024-07-01 12:18   ` Conor Dooley
  0 siblings, 1 reply; 3+ messages in thread
From: Minda Chen @ 2024-07-01 10:45 UTC (permalink / raw)
  To: Conor Dooley, linux-riscv@lists.infradead.org
  Cc: Conor Dooley, Rob Herring, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org



> 
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> It was reported to me that the star64 actually /does/ have an exposed PCIe port,
> despite the commit message there. In my original conversation with Minda,
> they said that pcie1 was available there and pcie0 was not, but the v2 patch
> didn't actually add pcie1 on the star64.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> I think I'll just squash this in and fixup the commit message, since the patch is still
> at the top of my branch.
> 
> CC: Minda Chen <minda.chen@starfivetech.com>
> CC: Conor Dooley <conor@kernel.org>
> CC: Rob Herring <robh+dt@kernel.org>,
> CC: Emil Renner Berthing <emil.renner.berthing@canonical.com
> CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org
> CC: devicetree@vger.kernel.org
> CC: linux-kernel@vger.kernel.org
> CC: linux-riscv@lists.infradead.org
> ---
>  arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> index 2d41f18e0359..b720cdd15ed6 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> @@ -39,6 +39,10 @@ phy1: ethernet-phy@1 {
>  	};
>  };
> 
> +&pcie1 {
> +	status = "okay";
> +};
> +
>  &phy0 {
>  	rx-internal-delay-ps = <1900>;
>  	tx-internal-delay-ps = <1500>;
> --
> 2.43.0

Hi Conor

The jh7110-pine64-star64.dts is in linux-next tree. I have not noticed it before.
Should I squash this to my patch? Can my dts patch be accepted in kernel 6.11? Thanks
(The same with Starfive PCIe patch set in linux-next, which will be merge in 6.11, right?)


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] riscv: dts: starfive: add pcie1 on the star64
  2024-07-01 10:45 ` Minda Chen
@ 2024-07-01 12:18   ` Conor Dooley
  0 siblings, 0 replies; 3+ messages in thread
From: Conor Dooley @ 2024-07-01 12:18 UTC (permalink / raw)
  To: Minda Chen
  Cc: linux-riscv@lists.infradead.org, Conor Dooley, Rob Herring,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org

[-- Attachment #1: Type: text/plain, Size: 2084 bytes --]

On Mon, Jul 01, 2024 at 10:45:15AM +0000, Minda Chen wrote:
> 
> 
> > 
> > From: Conor Dooley <conor.dooley@microchip.com>
> > 
> > It was reported to me that the star64 actually /does/ have an exposed PCIe port,
> > despite the commit message there. In my original conversation with Minda,
> > they said that pcie1 was available there and pcie0 was not, but the v2 patch
> > didn't actually add pcie1 on the star64.
> > 
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> > I think I'll just squash this in and fixup the commit message, since the patch is still
> > at the top of my branch.
> > 
> > CC: Minda Chen <minda.chen@starfivetech.com>
> > CC: Conor Dooley <conor@kernel.org>
> > CC: Rob Herring <robh+dt@kernel.org>,
> > CC: Emil Renner Berthing <emil.renner.berthing@canonical.com
> > CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org
> > CC: devicetree@vger.kernel.org
> > CC: linux-kernel@vger.kernel.org
> > CC: linux-riscv@lists.infradead.org
> > ---
> >  arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> > b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> > index 2d41f18e0359..b720cdd15ed6 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> > +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
> > @@ -39,6 +39,10 @@ phy1: ethernet-phy@1 {
> >  	};
> >  };
> > 
> > +&pcie1 {
> > +	status = "okay";
> > +};
> > +
> >  &phy0 {
> >  	rx-internal-delay-ps = <1900>;
> >  	tx-internal-delay-ps = <1500>;
> > --
> > 2.43.0
> 
> Hi Conor
> 
> The jh7110-pine64-star64.dts is in linux-next tree. I have not noticed it before.
> Should I squash this to my patch? Can my dts patch be accepted in kernel 6.11? Thanks
> (The same with Starfive PCIe patch set in linux-next, which will be merge in 6.11, right?)

I already applied your patch, I'll squash this into your patch and queue
the result for 6.11.

Thanks,
Conor.

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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2024-07-01 12:18 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2024-06-26 20:00 [PATCH] riscv: dts: starfive: add pcie1 on the star64 Conor Dooley
2024-07-01 10:45 ` Minda Chen
2024-07-01 12:18   ` Conor Dooley

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