From: Rob Herring <robh@kernel.org>
To: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Cc: "Bartosz Golaszewski" <brgl@bgdev.pl>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
quic_vbadigan@quicinc.com, quic_skananth@quicinc.com,
quic_nitegupt@quicinc.com, linux-arm-msm@vger.kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC 1/7] dt: bindings: add qcom,qps615.yaml
Date: Thu, 27 Jun 2024 09:31:25 -0600 [thread overview]
Message-ID: <20240627153125.GA3469266-robh@kernel.org> (raw)
In-Reply-To: <20240626-qps615-v1-1-2ade7bd91e02@quicinc.com>
On Wed, Jun 26, 2024 at 06:07:49PM +0530, Krishna chaitanya chundru wrote:
> qps615 is a driver for Qualcomm PCIe switch driver which controls
> power & configuration of the hardware.
> Add a bindings document for the driver.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
> .../devicetree/bindings/pci/qcom,qps615.yaml | 73 ++++++++++++++++++++++
> 1 file changed, 73 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,qps615.yaml b/Documentation/devicetree/bindings/pci/qcom,qps615.yaml
> new file mode 100644
> index 000000000000..f090683f9e2f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/qcom,qps615.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/qcom,pcie-qps615.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm QPS615 PCIe switch
> +
> +maintainers:
> + - Krishna chaitanya chundru <quic_krichai@quicinc.com>
> +
> +description: |
> + Qualcomm QPS615 PCIe switch has one upstream and three downstream
> + ports. One of the downstream ports is used as endpoint device of
> + Ethernet MAC. Other two downstream ports are supposed to connect
> + to external device.
> +
> + The power controlled by the GPIO's, if we enable the GPIO's the
> + power to the switch will be on.
> +
> + The QPS615 PCIe switch is configured through I2C interface before
> + PCIe link is established.
> +
As a PCI device and implementing a PCI bus, you need to reference
pci-pci-bridge.yaml. And you'll need to fix your example when you add
that.
> +properties:
> + compatible:
> + enum:
> + - pci1179,0623
> +
> + reg:
> + maxItems: 1
> +
> + vdd-supply:
> + description: |
> + Phandle to the vdd input voltage which are fixed regulators which
> + in are mapped to the GPIO's.
> +
> + switch-i2c-cntrl:
> + description: |
> + phandle to i2c controller which is used to configure the PCIe
> + switch.
There's a somewhat standard property for this purpose: i2c-bus
> +
> +required:
> + - compatible
> + - reg
> + - vdd-supply
> + - switch-i2c-cntrl
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + pcie {
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + pcie@0 {
> + device_type = "pci";
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> +
> + bus-range = <0x01 0xff>;
Unless there's a h/w limitation, you don't need this.
> +
> + qps615@0 {
> + compatible = "pci1179,0623";
> + reg = <0x10000 0x0 0x0 0x0 0x0>;
> +
> + vdd-supply = <&vdd>;
> + switch-i2c-cntrl = <&foo>;
> + };
> + };
> + };
>
> --
> 2.42.0
>
next prev parent reply other threads:[~2024-06-27 15:31 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-26 12:37 [PATCH RFC 0/7] PCI: enable Power and configure the QPS615 PCIe switch Krishna chaitanya chundru
2024-06-26 12:37 ` [PATCH RFC 1/7] dt: bindings: add qcom,qps615.yaml Krishna chaitanya chundru
2024-06-26 13:34 ` Rob Herring (Arm)
2024-06-26 15:01 ` Bjorn Andersson
2024-06-27 15:31 ` Rob Herring [this message]
2024-07-01 13:26 ` Krzysztof Kozlowski
2024-06-26 12:37 ` [PATCH RFC 2/7] arm64: dts: qcom: qcs6490-rb3gen2: Add qps615 node Krishna chaitanya chundru
2024-06-26 17:11 ` Bjorn Andersson
2024-06-26 17:51 ` Dmitry Baryshkov
2024-06-26 12:37 ` [PATCH RFC 3/7] pci: Change the parent of the platform devices for child OF nodes Krishna chaitanya chundru
2024-06-26 15:12 ` Bartosz Golaszewski
2024-07-01 17:54 ` Bjorn Helgaas
2024-06-26 12:37 ` [PATCH RFC 4/7] pci: Add new start_link() & stop_link function ops Krishna chaitanya chundru
2024-06-26 15:07 ` Bartosz Golaszewski
2024-06-26 12:37 ` [PATCH RFC 5/7] pci: dwc: Add support for new pci function op Krishna chaitanya chundru
2024-06-26 12:37 ` [PATCH RFC 6/7] pci: qcom: Add support for start_link() & stop_link() Krishna chaitanya chundru
2024-06-26 14:31 ` Bjorn Andersson
2024-07-01 20:14 ` Bjorn Helgaas
2024-06-26 12:37 ` [PATCH RFC 7/7] pci: pwrctl: Add power control driver for qps615 Krishna chaitanya chundru
2024-06-26 15:25 ` Bartosz Golaszewski
2024-06-26 15:37 ` Konrad Dybcio
2024-08-03 3:18 ` Krishna Chaitanya Chundru
2024-06-26 17:00 ` Bjorn Andersson
2024-06-26 18:09 ` Dmitry Baryshkov
2024-07-01 19:54 ` Bjorn Helgaas
2024-06-26 13:31 ` [PATCH RFC 0/7] PCI: enable Power and configure the QPS615 PCIe switch Rob Herring (Arm)
2024-06-26 15:29 ` Bjorn Helgaas
2024-07-01 17:51 ` Bjorn Helgaas
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