From: <daire.mcnamara@microchip.com>
To: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>
Cc: <conor.dooley@microchip.com>, <lpieralisi@kernel.org>,
<kw@linux.com>, <robh@kernel.org>, <bhelgaas@google.com>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<daire.mcnamara@microchip.com>, <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH v6 3/3] dt-bindings: PCI: microchip,pcie-host: allow dma-noncoherent
Date: Fri, 28 Jun 2024 12:59:23 +0100 [thread overview]
Message-ID: <20240628115923.4133286-4-daire.mcnamara@microchip.com> (raw)
In-Reply-To: <20240628115923.4133286-1-daire.mcnamara@microchip.com>
From: Conor Dooley <conor.dooley@microchip.com>
PolarFire SoC may be configured in a way that requires non-coherent DMA
handling. On RISC-V, buses are coherent by default & the dma-noncoherent
property is required to denote buses or devices that are non-coherent.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
index f7a3c2636355..c84e1ae20532 100644
--- a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
@@ -52,6 +52,8 @@ properties:
items:
pattern: '^fic[0-3]$'
+ dma-noncoherent: true
+
interrupts:
minItems: 1
items:
--
2.34.1
prev parent reply other threads:[~2024-06-28 12:00 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-28 11:59 [PATCH v6 0/3] Fix address translations on MPFS PCIe controller daire.mcnamara
2024-06-28 11:59 ` [PATCH v6 1/3] PCI: microchip: Fix outbound address translation tables daire.mcnamara
2024-07-08 9:04 ` Ilpo Järvinen
2024-06-28 11:59 ` [PATCH v6 2/3] PCI: microchip: Fix inbound " daire.mcnamara
2024-07-08 9:12 ` Ilpo Järvinen
2024-06-28 11:59 ` daire.mcnamara [this message]
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