[PATCH v1 0/8] PCI: brcnstb: Enable STB 7712 SOC

[PATCH v1 0/8] PCI: brcnstb: Enable STB 7712 SOC

[Jim Quinlan]

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This submission is for the Broadcom STB 7712, sibling SOC of the RPi5 chip.
Stanimir has already submitted a patch "Add PCIe support for bcm2712" for
the RPi version of the SOC.  It is hoped that Stanimir will allow us to
submit this series first and subsequently rebase his patch(es).

The largest commit, "Refactor for chips with many regular inbound BARs"
affects both the STB and RPi SOCs.  It allows for multiple inbound ranges
where previously only one was effectively used.  This feature will also
be present in future STB chips, as well as Broadcom's Cable Modem group.


Jim Quinlan (8):
  dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainter
  PCI: brcmstb: Use "clk_out" error path label
  PCI: brcmstb: Use bridge reset if available
  PCI: brcmstb: Use swinit reset if available
  PCI: brcmstb: Two more register offsets vary by SOC
  PCI: brcmstb: Don't conflate the reset rescal with phy ctrl
  PCI: brcmstb: Refactor for chips with many regular inbound BARs
  PCI: brcmstb: Enable 7712 SOCs

 .../bindings/pci/brcm,stb-pcie.yaml           |  24 +-
 drivers/pci/controller/pcie-brcmstb.c         | 330 ++++++++++++++----
 2 files changed, 276 insertions(+), 78 deletions(-)


base-commit: 55027e689933ba2e64f3d245fb1ff185b3e7fc81
-- 
2.17.1


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[PATCH v1 1/8] dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainter

[Jim Quinlan]

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- Update maintainer.
- Adds a driver compatible string for the new STB SOC 7712
- Adds two new resets for the 7712: "bridge", for the
  the bridge between the PCIe core and the memory bus;
  and "swinit", the PCIe core reset.

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
---
 .../bindings/pci/brcm,stb-pcie.yaml           | 24 ++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
index 11f8ea33240c..f594fef343a1 100644
--- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -7,12 +7,13 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Brcmstb PCIe Host Controller
 
 maintainers:
-  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+  - Jim Quinlan <james.quinlan@broadcom.com>
 
 properties:
   compatible:
     items:
       - enum:
+          - brcm,bcm7712-pcie # STB sibling SOC of Raspberry Pi 5
           - brcm,bcm2711-pcie # The Raspberry Pi 4
           - brcm,bcm4908-pcie
           - brcm,bcm7211-pcie # Broadcom STB version of RPi4
@@ -146,6 +147,27 @@ allOf:
       required:
         - resets
         - reset-names
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: brcm,bcm7712-pcie
+    then:
+      properties:
+        resets:
+          items:
+            - description: phandle pointing to the RESCAL reset controller
+            - description: phandle pointing to the BRIDGE reset controller
+            - description: phandle pointing to the core SWINIT reset controller
+
+        reset-names:
+          items:
+            - const: rescal
+            - const: bridge
+
+      required:
+        - resets
+        - reset-names
 
 unevaluatedProperties: false
 
-- 
2.17.1


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Re: [PATCH v1 1/8] dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainter

[Krzysztof Kozlowski]

On 28/06/2024 22:54, Jim Quinlan wrote:
> - Update maintainer.

Why?

> - Adds a driver compatible string for the new STB SOC 7712
> - Adds two new resets for the 7712: "bridge", for the
>   the bridge between the PCIe core and the memory bus;
>   and "swinit", the PCIe core reset.
> 
> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> ---
>  .../bindings/pci/brcm,stb-pcie.yaml           | 24 ++++++++++++++++++-
>  1 file changed, 23 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> index 11f8ea33240c..f594fef343a1 100644
> --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> @@ -7,12 +7,13 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
>  title: Brcmstb PCIe Host Controller
>  
>  maintainers:
> -  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> +  - Jim Quinlan <james.quinlan@broadcom.com>
>  
>  properties:
>    compatible:
>      items:
>        - enum:
> +          - brcm,bcm7712-pcie # STB sibling SOC of Raspberry Pi 5

Why did you place it here? Isn't the list ordered?

>            - brcm,bcm2711-pcie # The Raspberry Pi 4
>            - brcm,bcm4908-pcie
>            - brcm,bcm7211-pcie # Broadcom STB version of RPi4
> @@ -146,6 +147,27 @@ allOf:
>        required:
>          - resets
>          - reset-names
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: brcm,bcm7712-pcie
> +    then:
> +      properties:
> +        resets:

Fix the binding first - properties should be defined in top level
"properties:" and then customized. Where are "resets"?

> +          items:
> +            - description: phandle pointing to the RESCAL reset controller

Drop redundant text. There is no point in saying that phandle is a
phandle. It's obvious. Say something which is not obvious.


Best regards,
Krzysztof

Re: [PATCH v1 1/8] dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainter

[Bjorn Helgaas]

s/maintainter/maintainer/ in subject

On Fri, Jun 28, 2024 at 04:54:20PM -0400, Jim Quinlan wrote:
> - Update maintainer.
> - Adds a driver compatible string for the new STB SOC 7712
> - Adds two new resets for the 7712: "bridge", for the
>   the bridge between the PCIe core and the memory bus;
>   and "swinit", the PCIe core reset.

s/Adds/Add/ to be imperative and match "Update".

Re: [PATCH v1 1/8] dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainter

[Jim Quinlan]

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On Mon, Jul 1, 2024 at 5:12 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 28/06/2024 22:54, Jim Quinlan wrote:
> > - Update maintainer.
>
> Why?

I haven't observed any action or feedback from Nicolas in years.
Nicolas, please
state your case for being a maintainer because it is not making sense from
my perspective.
>
> > - Adds a driver compatible string for the new STB SOC 7712
> > - Adds two new resets for the 7712: "bridge", for the
> >   the bridge between the PCIe core and the memory bus;
> >   and "swinit", the PCIe core reset.
> >
> > Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> > ---
> >  .../bindings/pci/brcm,stb-pcie.yaml           | 24 ++++++++++++++++++-
> >  1 file changed, 23 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> > index 11f8ea33240c..f594fef343a1 100644
> > --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> > @@ -7,12 +7,13 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
> >  title: Brcmstb PCIe Host Controller
> >
> >  maintainers:
> > -  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> > +  - Jim Quinlan <james.quinlan@broadcom.com>
> >
> >  properties:
> >    compatible:
> >      items:
> >        - enum:
> > +          - brcm,bcm7712-pcie # STB sibling SOC of Raspberry Pi 5
>
> Why did you place it here? Isn't the list ordered?

It is ordered from newest at top to oldest at bottom -- is the
convention to put the "new" at the bottom?
>
> >            - brcm,bcm2711-pcie # The Raspberry Pi 4
> >            - brcm,bcm4908-pcie
> >            - brcm,bcm7211-pcie # Broadcom STB version of RPi4
> > @@ -146,6 +147,27 @@ allOf:
> >        required:
> >          - resets
> >          - reset-names
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: brcm,bcm7712-pcie
> > +    then:
> > +      properties:
> > +        resets:
>
> Fix the binding first - properties should be defined in top level
> "properties:" and then customized. Where are "resets"?
>
> > +          items:
> > +            - description: phandle pointing to the RESCAL reset controller
>
> Drop redundant text. There is no point in saying that phandle is a
> phandle. It's obvious. Say something which is not obvious.

My kernel Yaml-fu is weak.  I will redo.

Regards,
Jim Quinlan
Broadcom STB/CM
>
>
> Best regards,
> Krzysztof
>

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Re: [PATCH v1 1/8] dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainter

[Krzysztof Kozlowski]

On 02/07/2024 23:57, Jim Quinlan wrote:
> On Mon, Jul 1, 2024 at 5:12 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>
>> On 28/06/2024 22:54, Jim Quinlan wrote:
>>> - Update maintainer.
>>
>> Why?
> 
> I haven't observed any action or feedback from Nicolas in years.
> Nicolas, please
> state your case for being a maintainer because it is not making sense from
> my perspective.

Commit msg should explain why.

>>
>>> - Adds a driver compatible string for the new STB SOC 7712
>>> - Adds two new resets for the 7712: "bridge", for the
>>>   the bridge between the PCIe core and the memory bus;
>>>   and "swinit", the PCIe core reset.
>>>
>>> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
>>> ---
>>>  .../bindings/pci/brcm,stb-pcie.yaml           | 24 ++++++++++++++++++-
>>>  1 file changed, 23 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
>>> index 11f8ea33240c..f594fef343a1 100644
>>> --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
>>> +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
>>> @@ -7,12 +7,13 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
>>>  title: Brcmstb PCIe Host Controller
>>>
>>>  maintainers:
>>> -  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
>>> +  - Jim Quinlan <james.quinlan@broadcom.com>
>>>
>>>  properties:
>>>    compatible:
>>>      items:
>>>        - enum:
>>> +          - brcm,bcm7712-pcie # STB sibling SOC of Raspberry Pi 5
>>
>> Why did you place it here? Isn't the list ordered?
> 
> It is ordered from newest at top to oldest at bottom -- is the
> convention to put the "new" at the bottom?

Both your proposals lead to conflicts, so of course no. The lists are
ordered alphabetically, in most cases.



Best regards,
Krzysztof