[PATCH v4 0/3] Read MAC address through NVMEM for sama7g5ek

[PATCH v4 0/3] Read MAC address through NVMEM for sama7g5ek

[Andrei Simion]

Our main boot sequence :
(1) ROM BOOT -> AT91Bootstrap -> U-Boot -> Linux Kernel.
U-Boot is the stage where we set up the MAC address.
Also we can skip U-Boot and use the following boot sequence :
(2) ROM BOOT -> AT91Boostrap -> Linux Kernel.
Add EEPROMs and nvmem-layout to describe eui48 MAC address region
to be used for case (2).

This series proposes to add EEPROM support and reading MAC addresses
through NVMEM (via Devicetree) for sama7g5ek:
- Add in DT bindings document the EEPROM compatibles :
"microchip,24aa025e48" and "microchip,24aa025e64"
- Update to the driver to support "microchip,24aa025e48" and
"microchip,24aa025e64".
- Added the nodes in devicetree for eeproms where are stored EUI-48 MAC,
and update gmac nodes to read the MAC via devicetree through NVMEM.

-----------------------------------------------------------------------
v3 -> v4:
* dt-bindings: eeprom: at24: Add Microchip 24AA025E48/24AA025E64
  - update the rule to select compatible

* eeprom: at24: Add support for Microchip 24AA025E48/24AA025E64 EEPROMs
  - Use AT24_CHIP_DATA with AT24_FLAG_READONLY
  - drop AT24_CHIP_DATA_CB_AO
  - drop AT24_CHIP_DATA_AO
  - drop u8 adjoff
  - change commit message

* ARM: dts: microchip: at91-sama7g5ek: add EEPROMs
  - reword commit message

v2 -> v3:
* dt-bindings: eeprom: at24: Add Microchip 24AA025E48/24AA025E64
  - commit subject changed to reference Microchip 24AA025E48/24AA025E64
  - drop the pattern: mac02e4$ and mac02e6$ and a-z from regex
  - add these two devices down at the bottom
  - added Reviewed-by

* eeprom: at24: avoid adjusting offset for 24AA025E{48, 64}
  - add specific compatible names according with
https://ww1.microchip.com/downloads/en/DeviceDoc/24AA02E48-24AA025E48-24AA02E64-24AA025E64-Data-Sheet-20002124H.pdf
  - add extended macros to initialize the structure with explicit value for adjoff
  - drop co-developed-by to maintain the commit history
  (chronological order of modifications)

* ARM: dts: at91: at91-sama7g5ek: add EEPROMs
  - change from atmel,24mac02e4 to microchip,24aa025e48 to align with the datasheet
  - drop co-developed-by to maintain the chronological order of the changes

v1 -> v2:
* dt-bindings: eeprom: at24: Add at24,mac02e4 and at24,mac02e6
  - change pattern into "^atmel,(24(c|cs|mac)[a-z0-9]+|spd)$" to keep simpler

* eeprom: at24: avoid adjusting offset for 24AA025E{48, 64}
  - no change

* ARM: dts: at91: at91-sama7g5ek: add EEPROMs
  - remove unnecessary #address-cells #size-cells
-----------------------------------------------------------------------
Andrei Simion (1):
  dt-bindings: eeprom: at24: Add Microchip 24AA025E48/24AA025E64

Claudiu Beznea (2):
  eeprom: at24: Add support for Microchip 24AA025E48/24AA025E64 EEPROMs
  ARM: dts: microchip: at91-sama7g5ek: add EEPROMs

 .../devicetree/bindings/eeprom/at24.yaml      |  8 +++-
 .../arm/boot/dts/microchip/at91-sama7g5ek.dts | 40 +++++++++++++++++++
 drivers/misc/eeprom/at24.c                    |  8 ++++
 3 files changed, 55 insertions(+), 1 deletion(-)


base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233
-- 
2.34.1

[PATCH v4 1/3] eeprom: at24: Add support for Microchip 24AA025E48/24AA025E64 EEPROMs

[Andrei Simion]

From: Claudiu Beznea <claudiu.beznea@microchip.com>

Add "microchip,24aa025e48", "microchip,24aa025e64" compatible for the
usage w/ 24AA025E{48, 64} type of EEPROMs where "24aa025e48" stands
for EUI-48 address and "24aa025e64" stands for EUI-64 address.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[andrei.simion@microchip.com: Use AT24_DATA_CHIP with AT24_FLAG_READONLY for
24AA025E{48, 64} type of EEPROMs. Reword commit message.]
Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
---
v3 -> v4:
- Use AT24_CHIP_DATA with AT24_FLAG_READONLY
- drop AT24_CHIP_DATA_CB_AO
- drop AT24_CHIP_DATA_AO
- drop u8 adjoff
- change the commit title

v2 -> v3:
- add specific compatible name according with
https://ww1.microchip.com/downloads/en/DeviceDoc/24AA02E48-24AA025E48-24AA02E64-24AA025E64-Data-Sheet-20002124H.pdf
- add extended macros to init structure with explicit value for adjoff
- drop co-developed-by to maintain the commit history
 (chronological order of modifications)

v1 -> v2:
- no change
---
 drivers/misc/eeprom/at24.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 4bd4f32bcdab..ca872e3465ed 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -174,6 +174,10 @@ AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
 	AT24_FLAG_MAC | AT24_FLAG_READONLY);
 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
 	AT24_FLAG_MAC | AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24aa025e48, 48 / 8,
+	AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24aa025e64, 64 / 8,
+	AT24_FLAG_READONLY);
 /* spd is a 24c02 in memory DIMMs */
 AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
 	AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
@@ -218,6 +222,8 @@ static const struct i2c_device_id at24_ids[] = {
 	{ "24cs02",	(kernel_ulong_t)&at24_data_24cs02 },
 	{ "24mac402",	(kernel_ulong_t)&at24_data_24mac402 },
 	{ "24mac602",	(kernel_ulong_t)&at24_data_24mac602 },
+	{ "24aa025e48",	(kernel_ulong_t)&at24_data_24aa025e48 },
+	{ "24aa025e64",	(kernel_ulong_t)&at24_data_24aa025e64 },
 	{ "spd",	(kernel_ulong_t)&at24_data_spd },
 	{ "24c02-vaio",	(kernel_ulong_t)&at24_data_24c02_vaio },
 	{ "24c04",	(kernel_ulong_t)&at24_data_24c04 },
@@ -270,6 +276,8 @@ static const struct of_device_id __maybe_unused at24_of_match[] = {
 	{ .compatible = "atmel,24c1024",	.data = &at24_data_24c1024 },
 	{ .compatible = "atmel,24c1025",	.data = &at24_data_24c1025 },
 	{ .compatible = "atmel,24c2048",	.data = &at24_data_24c2048 },
+	{ .compatible = "microchip,24aa025e48",	.data = &at24_data_24aa025e48 },
+	{ .compatible = "microchip,24aa025e64",	.data = &at24_data_24aa025e64 },
 	{ /* END OF LIST */ },
 };
 MODULE_DEVICE_TABLE(of, at24_of_match);
-- 
2.34.1

[PATCH v4 2/3] ARM: dts: microchip: at91-sama7g5ek: add EEPROMs

[Andrei Simion]

From: Claudiu Beznea <claudiu.beznea@microchip.com>

Our main boot sequence is
(1) ROM BOOT -> AT91Bootstrap -> U-Boot -> Linux Kernel.
U-Boot is the stage where we set up the MAC address.
Also we can skip U-Boot and use the following boot sequence :
(2) ROM BOOT -> AT91Boostrap -> Linux Kernel.
Add EEPROMs and nvmem-layout to describe eui48 MAC address region
to be used for case (2).

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[andrei.simion@microchip.com: Add nvmem-layout to describe eui48 mac region.
Align compatible name with datasheet. Reword commit message.]
Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
---
v3 -> v4:
- reword commit message
- change commit title

v2 -> v3:
- change from atmel,24mac02e4 to microchip,24aa025e48 to align with datasheet
- drop co-developed-by to maintain the chronological order of the changes

v1 -> v2:
- remove unnecessary #address-cells #size-cells
---
 .../arm/boot/dts/microchip/at91-sama7g5ek.dts | 40 +++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
index 20b2497657ae..40f4480e298b 100644
--- a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
+++ b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
@@ -403,6 +403,42 @@ i2c8: i2c@600 {
 		i2c-digital-filter;
 		i2c-digital-filter-width-ns = <35>;
 		status = "okay";
+
+		eeprom0: eeprom@52 {
+			compatible = "microchip,24aa025e48";
+			reg = <0x52>;
+			size = <256>;
+			pagesize = <16>;
+			vcc-supply = <&vdd_3v3>;
+
+			nvmem-layout {
+				compatible = "fixed-layout";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				eeprom0_eui48: eui48@fa {
+					reg = <0xfa 0x6>;
+				};
+			};
+		};
+
+		eeprom1: eeprom@53 {
+			compatible = "microchip,24aa025e48";
+			reg = <0x53>;
+			size = <256>;
+			pagesize = <16>;
+			vcc-supply = <&vdd_3v3>;
+
+			nvmem-layout {
+				compatible = "fixed-layout";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				eeprom1_eui48: eui48@fa {
+					reg = <0xfa 0x6>;
+				};
+			};
+		};
 	};
 };
 
@@ -440,6 +476,8 @@ &pinctrl_gmac0_mdio_default
 		     &pinctrl_gmac0_txck_default
 		     &pinctrl_gmac0_phy_irq>;
 	phy-mode = "rgmii-id";
+	nvmem-cells = <&eeprom0_eui48>;
+	nvmem-cell-names = "mac-address";
 	status = "okay";
 
 	ethernet-phy@7 {
@@ -457,6 +495,8 @@ &gmac1 {
 		     &pinctrl_gmac1_mdio_default
 		     &pinctrl_gmac1_phy_irq>;
 	phy-mode = "rmii";
+	nvmem-cells = <&eeprom1_eui48>;
+	nvmem-cell-names = "mac-address";
 	status = "okay"; /* Conflict with pdmc0. */
 
 	ethernet-phy@0 {
-- 
2.34.1

Re: [PATCH v4 2/3] ARM: dts: microchip: at91-sama7g5ek: add EEPROMs

[claudiu beznea]

On 03.07.2024 11:47, Andrei Simion wrote:
> From: Claudiu Beznea <claudiu.beznea@microchip.com>
> 
> Our main boot sequence is
> (1) ROM BOOT -> AT91Bootstrap -> U-Boot -> Linux Kernel.
> U-Boot is the stage where we set up the MAC address.
> Also we can skip U-Boot and use the following boot sequence :
> (2) ROM BOOT -> AT91Boostrap -> Linux Kernel.
> Add EEPROMs and nvmem-layout to describe eui48 MAC address region
> to be used for case (2).
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> [andrei.simion@microchip.com: Add nvmem-layout to describe eui48 mac region.
> Align compatible name with datasheet. Reword commit message.]
> Signed-off-by: Andrei Simion <andrei.simion@microchip.com>

Applied to at91-dt, thanks!

Please note that I've adjusted the commit message.
Please have a look and let me know if you disagree with the changes.

Thank you,
Claudiu Beznea

[PATCH v4 3/3] dt-bindings: eeprom: at24: Add Microchip 24AA025E48/24AA025E64

[Andrei Simion]

Add support for compatible Microchip 24AA025E48/24AA025E64 EEPROMs.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
---
v3 -> v4:
- change the rule to select compatible

v2 -> v3:
- commit subject changed to reference Microchip 24AA025E48/24AA025E64
- drop pattern: mac02e4$ and mac02e6$ and a-z from regex
- add these two devices down at the bottom
- added Reviewed-by

v1 -> v2:
- change pattern into "^atmel,(24(c|cs|mac)[a-z0-9]+|spd)$" to keep simpler
---
 Documentation/devicetree/bindings/eeprom/at24.yaml | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml
index 3c36cd0510de..4d46b8c5439d 100644
--- a/Documentation/devicetree/bindings/eeprom/at24.yaml
+++ b/Documentation/devicetree/bindings/eeprom/at24.yaml
@@ -18,7 +18,9 @@ select:
   properties:
     compatible:
       contains:
-        pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
+        anyOf:
+          - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
+          - enum: ["microchip,24aa025e48", "microchip,24aa025e64"]
   required:
     - compatible
 
@@ -132,6 +134,10 @@ properties:
               - renesas,r1ex24128
               - samsung,s524ad0xd1
           - const: atmel,24c128
+      - items:
+          - const: microchip,24aa025e48
+      - items:
+          - const: microchip,24aa025e64
       - pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st
 
   label:
-- 
2.34.1

Re: [PATCH v4 0/3] Read MAC address through NVMEM for sama7g5ek

[Bartosz Golaszewski]

From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>


On Wed, 03 Jul 2024 11:47:01 +0300, Andrei Simion wrote:
> Our main boot sequence :
> (1) ROM BOOT -> AT91Bootstrap -> U-Boot -> Linux Kernel.
> U-Boot is the stage where we set up the MAC address.
> Also we can skip U-Boot and use the following boot sequence :
> (2) ROM BOOT -> AT91Boostrap -> Linux Kernel.
> Add EEPROMs and nvmem-layout to describe eui48 MAC address region
> to be used for case (2).
> 
> [...]

Applied, thanks!

[1/3] eeprom: at24: Add support for Microchip 24AA025E48/24AA025E64 EEPROMs
      commit: b61ea8705095e5d242762268cfebf48c848315f6
[3/3] dt-bindings: eeprom: at24: Add Microchip 24AA025E48/24AA025E64
      commit: c1ec80e54afd0460d02b29a5731fd2a7b31f400b

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>