From: Josua Mayer <josua@solid-run.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Andrew Lunn <andrew@lunn.ch>,
Gregory Clement <gregory.clement@bootlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Yazan Shhady <yazan.shhady@solid-run.com>,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, Josua Mayer <josua@solid-run.com>
Subject: [PATCH RFC 2/2] arm: dts: marvell: armada-38x: add description for usb phys
Date: Mon, 15 Jul 2024 19:47:30 +0200 [thread overview]
Message-ID: <20240715-a38x-utmi-phy-v1-2-d57250f53cf2@solid-run.com> (raw)
In-Reply-To: <20240715-a38x-utmi-phy-v1-0-d57250f53cf2@solid-run.com>
Armada 38x has 3x USB-2.0 utmi phys. They are almost identical to the 2x
utmi phys on armada 8k.
Add descriptions for all 3 phy ports.
Also add a syscon node covering just the usb configuration registers.
Armada 8K have a syscon node covering configuration registers for
various functions including pinmux, woith dirvers using syscon framework
for register access.
Armada 388 has various drivers directly claiming some of those
configuration registers. Hence a similar syscon node would compete for
resources with these drivers.
This patch-set is marked RFC to figure out a solution. I have some
ideas:
1. Can syscon have holes, i.e. facilitate consumer drivers accessing
certain offsets only?
2. Declare a tiny syscon (see this patch) covering just the area used by
utmi phy driver: This impacts driver access offsets - can those be
hard-coded - or is there a mechanism in device-tree?
E.g. marvell,system-controller = <&syscon any-poffset-here>?
3. utmi phy driver access just three registers using syscon: all-ports
power-up (probably enables clocks), device-mode mux, per-port power-up.
Assign these registers individually to the phy device-node, and
implement access in driver when syscon is not available.
If this is preferred, which dt property should s[ecify their address?
reg, ranges, ...?
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm/boot/dts/marvell/armada-38x.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/marvell/armada-38x.dtsi b/arch/arm/boot/dts/marvell/armada-38x.dtsi
index 446861b6b17b..5cf9449162b1 100644
--- a/arch/arm/boot/dts/marvell/armada-38x.dtsi
+++ b/arch/arm/boot/dts/marvell/armada-38x.dtsi
@@ -392,6 +392,11 @@ comphy5: phy@5 {
};
};
+ syscon0: system-controller@18400 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x18420 0x30>;
+ };
+
coreclk: mvebu-sar@18600 {
compatible = "marvell,armada-380-core-clock";
reg = <0x18600 0x04>;
@@ -580,6 +585,31 @@ ahci0: sata@a8000 {
status = "disabled";
};
+ utmi: utmi@c0000 {
+ compatible = "marvell,armada-380-utmi-phy";
+ reg = <0xc0000 0x6000>;
+ ranges = <0x18420>, <0x00018440>, <0x00018444>, <0x00018448>;
+ marvell,system-controller = <&syscon0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ utmi0: usb-phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+
+ utmi1: usb-phy@1 {
+ reg = <1>;
+ #phy-cells = <0>;
+ };
+
+ utmi2: usb-phy@2 {
+ reg = <2>;
+ #phy-cells = <0>;
+ };
+ };
+
bm: bm@c8000 {
compatible = "marvell,armada-380-neta-bm";
reg = <0xc8000 0xac>;
--
2.35.3
next prev parent reply other threads:[~2024-07-15 17:47 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-15 17:47 [PATCH RFC 0/2] phy: mvebu-cp110-utmi: add support for armada-380 utmi phys Josua Mayer
2024-07-15 17:47 ` [PATCH RFC 1/2] " Josua Mayer
2024-07-15 18:05 ` Andrew Lunn
2024-07-16 8:30 ` Josua Mayer
2024-07-15 17:47 ` Josua Mayer [this message]
2024-07-15 18:12 ` [PATCH RFC 2/2] arm: dts: marvell: armada-38x: add description for usb phys Andrew Lunn
2024-07-16 8:16 ` Josua Mayer
2024-07-16 12:55 ` Josua Mayer
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