From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F95A1862AB; Mon, 15 Jul 2024 09:58:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721037485; cv=none; b=iTC7aQoRr5HWD2vBjWxIWkYJsupusR0Q+00hvM6u2xy0hYi0zVXuVs48qNkDAmQsTRy2e5alUXy+rZG3lZQWZFwwdoaY2KFhfgjj83/A7dvRUolSt/DIawO+wbkgFF9IRDbDE+SnGQdSHb0gSPCHgqxdTetwBhgwa56Uy9f1UIc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721037485; c=relaxed/simple; bh=nAt8VBS7wBWsqWXn67dHYCaAAYqSJWG1z+5IeoSpFRA=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=C0hBhLCYOBMKRqHy2jgoxttdu5pN+3ky8/gnilqx0O71idSCR+VA8gsP9YWRQCQ9E9fSunbLxF3pIag3Q167CC/Yh7i0L6QzoFolbG61ysEGb+fFhPATgSM3Q15ZdMF3PAi57AMiq8+L2pfuad9Jk7xOoPLzWlqBWuu9Y+TvFjA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=yLvmndCo; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="yLvmndCo" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1721037484; x=1752573484; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=nAt8VBS7wBWsqWXn67dHYCaAAYqSJWG1z+5IeoSpFRA=; b=yLvmndCoeTAgDhSaLFiXTx+LG/KVPXs6uVBbR9qb/2ZOBsGohZFOHq49 gJia6XLUCqRruYdxcJIu1Nhl+F04NBJn04Nbcm3ryLNQwDfptGYL1ipIO 1DREtwq5Qpkx3je0Mj8Q3u2KY0VoZXpTAj0bymfoB1BBS/WJxjM6p6zu+ Y/RPn8fbfwKgWzXXLkK+X2iSI7CZemjS6D9YH5ANOhWT2bmcsvLWEngCV 7UxbY5yVkI5nEfMyy4uAdl5L12m4e7EIr4MZDDJX8mre3y8rrLYY3IQ8+ rHPFgbwRR8fRZG/MsWLn8s3F17hszpBYPn0tPOaYS5nIqRp5V/egi6GN2 A==; X-CSE-ConnectionGUID: f2RA4CzOQFeHP4RB67Wxuw== X-CSE-MsgGUID: AsO29LzERRaTouRrGMLJqg== X-IronPort-AV: E=Sophos;i="6.09,210,1716274800"; d="scan'208";a="29237561" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 15 Jul 2024 02:57:57 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 15 Jul 2024 02:57:51 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 15 Jul 2024 02:57:40 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH v2 0/4] MIPI DSI Controller support for SAM9X75 series Date: Mon, 15 Jul 2024 15:27:32 +0530 Message-ID: <20240715095736.618246-1-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain This patch series adds support for the Microchip's MIPI DSI Controller wrapper driver that uses the Synopsys DesignWare MIPI DSI host controller bridge for SAM9X75 SoC series. Changelogs are available in respective patches. Manikandan Muralidharan (4): dt-bindings: display: bridge: add sam9x75-mipi-dsi binding drm/bridge: add Microchip DSI controller support for sam9x7 SoC series MAINTAINERS: add SAM9X7 SoC's Microchip's MIPI DSI host wrapper driver ARM: configs: at91: Enable Microchip's MIPI DSI Host Controller support .../bridge/microchip,sam9x75-mipi-dsi.yaml | 116 ++++ MAINTAINERS | 7 + arch/arm/configs/at91_dt_defconfig | 1 + drivers/gpu/drm/bridge/Kconfig | 8 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/dw-mipi-dsi-mchp.c | 546 ++++++++++++++++++ 6 files changed, 679 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-mipi-dsi.yaml create mode 100644 drivers/gpu/drm/bridge/dw-mipi-dsi-mchp.c -- 2.25.1