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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Andy Gross , Konrad Dybcio , Steev Klimaszewski , linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: Re: [PATCH 2/2] arm64: dts: qcom: x1e80100-yoga: add wifi calibration variant Message-ID: <20240716101335.GK3446@thinkpad> References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Mon, Jul 15, 2024 at 09:40:41PM +0200, Patrick Wildt wrote: > Describe the bus topology for PCIe domain 4 and add the ath12k > calibration variant so that the board file (calibration data) can be > loaded. > > Signed-off-by: Patrick Wildt Reviewed-by: Manivannan Sadhasivam - Mani > --- > .../boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 9 +++++++++ > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 10 ++++++++++ > 2 files changed, 19 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts > index fbff558f5b07..f569f0fbd1fc 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts > +++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts > @@ -635,6 +635,15 @@ &pcie4_phy { > status = "okay"; > }; > > +&pcie4_port0 { > + wifi@0 { > + compatible = "pci17cb,1107"; > + reg = <0x10000 0x0 0x0 0x0 0x0>; > + > + qcom,ath12k-calibration-variant = "LES790"; > + }; > +}; > + > &pcie6a { > perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; > wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index 7bca5fcd7d52..70eeacd4f9ad 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -3085,6 +3085,16 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > phy-names = "pciephy"; > > status = "disabled"; > + > + pcie4_port0: pcie@0 { > + device_type = "pci"; > + reg = <0x0 0x0 0x0 0x0 0x0>; > + bus-range = <0x01 0xff>; > + > + #address-cells = <3>; > + #size-cells = <2>; > + ranges; > + }; > }; > > pcie4_phy: phy@1c0e000 { > -- > 2.45.2 > > -- மணிவண்ணன் சதாசிவம்