From: Tomer Maimon <tmaimon77@gmail.com>
To: <linus.walleij@linaro.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<avifishman70@gmail.com>, <tali.perry1@gmail.com>,
<joel@jms.id.au>, <venture@google.com>, <yuenn@google.com>,
<benjaminfair@google.com>
Cc: <openbmc@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
<linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>,
Tomer Maimon <tmaimon77@gmail.com>
Subject: [PATCH v2 6/7] pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration
Date: Tue, 16 Jul 2024 22:40:07 +0300 [thread overview]
Message-ID: <20240716194008.3502068-7-tmaimon77@gmail.com> (raw)
In-Reply-To: <20240716194008.3502068-1-tmaimon77@gmail.com>
Modify clkrun and serirq pin configuration on the Nuvoton NPCM8XX BMC
SoC.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
index bc947d0d6ede..2cc433a74ad2 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
@@ -1485,13 +1485,13 @@ static const struct npcm8xx_pincfg pincfg[] = {
NPCM8XX_PINCFG(159, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW),
NPCM8XX_PINCFG(160, clkout, MFSEL1, 21, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW),
NPCM8XX_PINCFG(161, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
- NPCM8XX_PINCFG(162, serirq, MFSEL1, 31, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12)),
+ NPCM8XX_PINCFG(162, clkrun, MFSEL3, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12)),
NPCM8XX_PINCFG(163, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
NPCM8XX_PINCFG(164, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
NPCM8XX_PINCFG(165, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
NPCM8XX_PINCFG(166, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
NPCM8XX_PINCFG(167, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
- NPCM8XX_PINCFG(168, none, NONE, 0, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
+ NPCM8XX_PINCFG(168, serirq, MFSEL1, 31, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
NPCM8XX_PINCFG(169, scipme, MFSEL3, 0, smb21, MFSEL5, 29, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
NPCM8XX_PINCFG(170, smi, MFSEL1, 22, smb21, MFSEL5, 29, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
NPCM8XX_PINCFG(171, smb6, MFSEL3, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0),
--
2.34.1
next prev parent reply other threads:[~2024-07-16 19:40 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-16 19:40 [PATCH v2 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon
2024-07-16 19:40 ` [PATCH v2 1/7] dt-bindings: pinctrl: npcm8xx: remove non-existent groups and functions Tomer Maimon
2024-07-23 2:26 ` Rob Herring (Arm)
2024-08-05 7:33 ` Linus Walleij
2024-07-16 19:40 ` [PATCH v2 2/7] pinctrl: nuvoton: npcm8xx: remove non-existent pins, groups, functions Tomer Maimon
2024-07-16 19:40 ` [PATCH v2 3/7] pinctrl: nuvoton: npcm8xx: clear polarity before set both edge Tomer Maimon
2024-07-16 19:40 ` [PATCH v2 4/7] pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 Tomer Maimon
2024-07-16 19:40 ` [PATCH v2 5/7] pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group Tomer Maimon
2024-07-16 19:40 ` Tomer Maimon [this message]
2024-07-16 19:40 ` [PATCH v2 7/7] pinctrl: nuvoton: npcm8xx: modify pins flags Tomer Maimon
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