From: Manivannan Sadhasivam via B4 Relay <devnull+manivannan.sadhasivam.linaro.org@kernel.org>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>
Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v2 05/13] PCI: endpoint: Assign PCI domain number for endpoint controllers
Date: Wed, 17 Jul 2024 22:33:10 +0530 [thread overview]
Message-ID: <20240717-pci-qcom-hotplug-v2-5-71d304b817f8@linaro.org> (raw)
In-Reply-To: <20240717-pci-qcom-hotplug-v2-0-71d304b817f8@linaro.org>
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Right now, PCI endpoint subsystem doesn't assign PCI domain number for the
PCI endpoint controllers. But this domain number could be useful to the EPC
drivers to uniquely identify each controller based on the hardware instance
when there are multiple ones present in an SoC (even multiple RC/EP).
So let's make use of the existing pci_bus_find_domain_nr() API to allocate
domain numbers based on either Devicetree (linux,pci-domain) property or
dynamic domain number allocation scheme.
It should be noted that the domain number allocated by this API will be
based on both RC and EP controllers in a SoC. If the 'linux,pci-domain' DT
property is present, then the domain number represents the actual hardware
instance of the PCI endpoint controller. If not, then the domain number
will be allocated based on the PCI EP/RC controller probe order.
If the architecture doesn't support CONFIG_PCI_DOMAINS_GENERIC (rare), then
currently a warning is thrown to indicate that the architecture specific
implementation is needed.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/pci/endpoint/pci-epc-core.c | 10 ++++++++++
include/linux/pci-epc.h | 2 ++
2 files changed, 12 insertions(+)
diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
index 84309dfe0c68..7fa81b91e762 100644
--- a/drivers/pci/endpoint/pci-epc-core.c
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -838,6 +838,9 @@ void pci_epc_destroy(struct pci_epc *epc)
{
pci_ep_cfs_remove_epc_group(epc->group);
device_unregister(&epc->dev);
+
+ if (IS_ENABLED(CONFIG_PCI_DOMAINS_GENERIC))
+ pci_bus_release_domain_nr(NULL, &epc->dev);
}
EXPORT_SYMBOL_GPL(pci_epc_destroy);
@@ -900,6 +903,13 @@ __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
epc->dev.release = pci_epc_release;
epc->ops = ops;
+ /*
+ * TODO: If the architecture doesn't support generic PCI domains, then
+ * a custom implementation has to be used.
+ */
+ if (!WARN_ON_ONCE(!IS_ENABLED(CONFIG_PCI_DOMAINS_GENERIC)))
+ epc->domain_nr = pci_bus_find_domain_nr(NULL, dev);
+
ret = dev_set_name(&epc->dev, "%s", dev_name(dev));
if (ret)
goto put_dev;
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index 85bdf2adb760..8e3dcac55dcd 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -128,6 +128,7 @@ struct pci_epc_mem {
* @group: configfs group representing the PCI EPC device
* @lock: mutex to protect pci_epc ops
* @function_num_map: bitmap to manage physical function number
+ * @domain_nr: PCI domain number of the endpoint controller
* @init_complete: flag to indicate whether the EPC initialization is complete
* or not
*/
@@ -145,6 +146,7 @@ struct pci_epc {
/* mutex to protect against concurrent access of EP controller */
struct mutex lock;
unsigned long function_num_map;
+ int domain_nr;
bool init_complete;
};
--
2.25.1
next prev parent reply other threads:[~2024-07-17 17:03 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-17 17:03 [PATCH v2 00/13] PCI: qcom: Simulate PCIe hotplug using 'global' interrupt Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 01/13] PCI: qcom-ep: Drop the redundant masking of global IRQ events Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 02/13] PCI: qcom-ep: Reword the error message for receiving unknown global IRQ event Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 03/13] dt-bindings: PCI: pci-ep: Update Maintainers Manivannan Sadhasivam via B4 Relay
2024-07-23 2:32 ` Rob Herring (Arm)
2024-07-17 17:03 ` [PATCH v2 04/13] dt-bindings: PCI: pci-ep: Document 'linux,pci-domain' property Manivannan Sadhasivam via B4 Relay
2024-07-23 2:33 ` Rob Herring (Arm)
2024-07-17 17:03 ` Manivannan Sadhasivam via B4 Relay [this message]
2024-07-18 12:11 ` [PATCH v2 05/13] PCI: endpoint: Assign PCI domain number for endpoint controllers Konrad Dybcio
2024-07-18 15:01 ` Manivannan Sadhasivam
2024-07-18 15:04 ` kernel test robot
2024-07-18 15:32 ` Manivannan Sadhasivam
2024-07-18 15:37 ` kernel test robot
2024-07-17 17:03 ` [PATCH v2 06/13] PCI: qcom-ep: Modify 'global_irq' and 'perst_irq' IRQ device names Manivannan Sadhasivam via B4 Relay
2024-07-18 12:12 ` Konrad Dybcio
2024-07-17 17:03 ` [PATCH v2 07/13] ARM: dts: qcom: sdx55: Add 'linux,pci-domain' to PCIe EP controller node Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 08/13] ARM: dts: qcom: sdx65: " Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 09/13] arm64: dts: qcom: sa8775p: Add 'linux,pci-domain' to PCIe EP controller nodes Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 10/13] dt-bindings: PCI: qcom: Add 'global' interrupt Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 11/13] dt-bindings: PCI: qcom,pcie-sm8450: " Manivannan Sadhasivam via B4 Relay
2024-07-23 2:35 ` Rob Herring
2024-07-17 17:03 ` [PATCH v2 12/13] PCI: qcom: Simulate PCIe hotplug using " Manivannan Sadhasivam via B4 Relay
2024-07-17 22:57 ` Mayank Rana
2024-07-18 10:29 ` Manivannan Sadhasivam
2024-07-18 17:15 ` Mayank Rana
2024-07-18 17:23 ` Manivannan Sadhasivam
2024-07-19 23:32 ` Frank Li
2024-07-21 7:34 ` Manivannan Sadhasivam
2024-07-17 17:03 ` [PATCH v2 13/13] arm64: dts: qcom: sm8450: Add 'global' interrupt to the PCIe RC node Manivannan Sadhasivam via B4 Relay
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