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From: Conor Dooley <conor@kernel.org>
To: Frank Li <Frank.li@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	shawnguo@kernel.org, l.stach@pengutronix.de,
	devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	imx@lists.linux.dev
Subject: Re: [PATCH v1 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint
Date: Tue, 23 Jul 2024 15:35:11 +0100	[thread overview]
Message-ID: <20240723-spinning-wikipedia-525130c48dcd@spud> (raw)
In-Reply-To: <Zp7FYRaXM4NNO0oM@lizhi-Precision-Tower-5810>

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On Mon, Jul 22, 2024 at 04:47:29PM -0400, Frank Li wrote:
> On Mon, Jul 22, 2024 at 05:37:14PM +0100, Conor Dooley wrote:
> > On Mon, Jul 22, 2024 at 03:56:16PM +0800, Richard Zhu wrote:
> > > Add reg-name: "dbi2", "atu" for i.MX8M PCIe Endpoint.
> > > 
> > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > > ---
> > >  .../devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml  | 13 +++++++++----
> > >  1 file changed, 9 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
> > > index a06f75df8458..309e8953dc91 100644
> > > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
> > > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
> > > @@ -65,11 +65,13 @@ allOf:
> > >      then:
> > >        properties:
> > >          reg:
> > > -          minItems: 2
> > > -          maxItems: 2
> > > +          minItems: 4
> > > +          maxItems: 4
> > >          reg-names:
> > >            items:
> > >              - const: dbi
> > > +            - const: dbi2
> > > +            - const: atu
> > 
> > New properties in the middle of the list is potentially an ABI break.
> > Why not add them at the end?
> 
> Because it ref to snps,dw-pcie-ep.yaml, which already defined the reg
> name orders.

Are you sure that it defines an order for reg? If it did, it would not
allow what you already have in this binding. The order is actually
defined in this file.

> we using reg-names to get reg resource, I don't think it break
> the ABI. Driver already auto detect both 'dbi2' or no 'dbi2' case.

Linux's might, another might not. I don't see any point in breaking the
ABI when you can just put the entries at the end of he list and have no
problems at all.

Thanks,
Conor.

> > >              - const: addr_space
> > >  
> > >    - if:
> > > @@ -129,8 +131,11 @@ examples:
> > >  
> > >      pcie_ep: pcie-ep@33800000 {
> > >        compatible = "fsl,imx8mp-pcie-ep";
> > > -      reg = <0x33800000 0x000400000>, <0x18000000 0x08000000>;
> > > -      reg-names = "dbi", "addr_space";
> > > +      reg = <0x33800000 0x100000>,
> > > +            <0x33900000 0x100000>,
> > > +            <0x33b00000 0x100000>,
> > > +            <0x18000000 0x8000000>;
> > > +      reg-names = "dbi", "dbi2", "atu", "addr_space";
> > >        clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> > >                 <&clk IMX8MP_CLK_HSIO_AXI>,
> > >                 <&clk IMX8MP_CLK_PCIE_ROOT>;
> > > -- 
> > > 2.37.1
> > > 
> 
> 

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  reply	other threads:[~2024-07-23 14:35 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-22  7:56 [PATCH v1 0/4] Add dbi2 and atu for i.MX8M PCIe EP Richard Zhu
2024-07-22  7:56 ` [PATCH v1 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint Richard Zhu
2024-07-22 16:37   ` Conor Dooley
2024-07-22 20:47     ` Frank Li
2024-07-23 14:35       ` Conor Dooley [this message]
2024-07-23 20:39         ` Frank Li
2024-07-22  7:56 ` [PATCH v1 2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ PCIe EP Richard Zhu
2024-07-22  7:56 ` [PATCH v1 3/4] dts: arm64: imx8mp: Add dbi2 and atu reg for i.MX8MP " Richard Zhu
2024-07-22  7:56 ` [PATCH v1 4/4] dts: arm64: imx8mm: Add dbi2 and atu reg for i.MX8MM " Richard Zhu

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