From: Rob Herring <robh@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 11/13] dt-bindings: PCI: qcom,pcie-sm8450: Add 'global' interrupt
Date: Mon, 22 Jul 2024 20:35:53 -0600 [thread overview]
Message-ID: <20240723023553.GA181687-robh@kernel.org> (raw)
In-Reply-To: <20240717-pci-qcom-hotplug-v2-11-71d304b817f8@linaro.org>
On Wed, Jul 17, 2024 at 10:33:16PM +0530, Manivannan Sadhasivam wrote:
> Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt
> to the host CPU. This interrupt can be used by the device driver to
> identify events such as PCIe link specific events, safety events, etc...
>
> Hence, document it in the binding along with the existing MSI interrupts.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml
> index d8c0afaa4b19..0d68ce073383 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml
> @@ -55,11 +55,12 @@ properties:
> - const: aggre1 # Aggre NoC PCIe1 AXI clock
>
> interrupts:
> - minItems: 8
> - maxItems: 8
> + minItems: 9
ABI break
> + maxItems: 9
>
> interrupt-names:
> items:
> + - const: global
ABI break. You can't add a new entry at the beginning of the list.
> - const: msi0
> - const: msi1
> - const: msi2
> @@ -142,7 +143,8 @@ examples:
> "aggre0",
> "aggre1";
>
> - interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
> + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
> @@ -150,7 +152,7 @@ examples:
> <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "msi0", "msi1", "msi2", "msi3",
> + interrupt-names = "global", "msi0", "msi1", "msi2", "msi3",
> "msi4", "msi5", "msi6", "msi7";
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0x7>;
>
> --
> 2.25.1
>
next prev parent reply other threads:[~2024-07-23 2:35 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-17 17:03 [PATCH v2 00/13] PCI: qcom: Simulate PCIe hotplug using 'global' interrupt Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 01/13] PCI: qcom-ep: Drop the redundant masking of global IRQ events Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 02/13] PCI: qcom-ep: Reword the error message for receiving unknown global IRQ event Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 03/13] dt-bindings: PCI: pci-ep: Update Maintainers Manivannan Sadhasivam via B4 Relay
2024-07-23 2:32 ` Rob Herring (Arm)
2024-07-17 17:03 ` [PATCH v2 04/13] dt-bindings: PCI: pci-ep: Document 'linux,pci-domain' property Manivannan Sadhasivam via B4 Relay
2024-07-23 2:33 ` Rob Herring (Arm)
2024-07-17 17:03 ` [PATCH v2 05/13] PCI: endpoint: Assign PCI domain number for endpoint controllers Manivannan Sadhasivam via B4 Relay
2024-07-18 12:11 ` Konrad Dybcio
2024-07-18 15:01 ` Manivannan Sadhasivam
2024-07-18 15:04 ` kernel test robot
2024-07-18 15:32 ` Manivannan Sadhasivam
2024-07-18 15:37 ` kernel test robot
2024-07-17 17:03 ` [PATCH v2 06/13] PCI: qcom-ep: Modify 'global_irq' and 'perst_irq' IRQ device names Manivannan Sadhasivam via B4 Relay
2024-07-18 12:12 ` Konrad Dybcio
2024-07-17 17:03 ` [PATCH v2 07/13] ARM: dts: qcom: sdx55: Add 'linux,pci-domain' to PCIe EP controller node Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 08/13] ARM: dts: qcom: sdx65: " Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 09/13] arm64: dts: qcom: sa8775p: Add 'linux,pci-domain' to PCIe EP controller nodes Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 10/13] dt-bindings: PCI: qcom: Add 'global' interrupt Manivannan Sadhasivam via B4 Relay
2024-07-17 17:03 ` [PATCH v2 11/13] dt-bindings: PCI: qcom,pcie-sm8450: " Manivannan Sadhasivam via B4 Relay
2024-07-23 2:35 ` Rob Herring [this message]
2024-07-17 17:03 ` [PATCH v2 12/13] PCI: qcom: Simulate PCIe hotplug using " Manivannan Sadhasivam via B4 Relay
2024-07-17 22:57 ` Mayank Rana
2024-07-18 10:29 ` Manivannan Sadhasivam
2024-07-18 17:15 ` Mayank Rana
2024-07-18 17:23 ` Manivannan Sadhasivam
2024-07-19 23:32 ` Frank Li
2024-07-21 7:34 ` Manivannan Sadhasivam
2024-07-17 17:03 ` [PATCH v2 13/13] arm64: dts: qcom: sm8450: Add 'global' interrupt to the PCIe RC node Manivannan Sadhasivam via B4 Relay
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240723023553.GA181687-robh@kernel.org \
--to=robh@kernel.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzk+dt@kernel.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).