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From: Liu Ying <victor.liu@nxp.com>
To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org
Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch,
	maarten.lankhorst@linux.intel.com, mripard@kernel.org,
	tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
	kernel@pengutronix.de, festevam@gmail.com, tglx@linutronix.de,
	vkoul@kernel.org, kishon@kernel.org, aisheng.dong@nxp.com,
	agx@sigxcpu.org, francesco@dolcini.it, frank.li@nxp.com
Subject: [PATCH v3 02/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller blit engine
Date: Wed, 24 Jul 2024 17:29:33 +0800	[thread overview]
Message-ID: <20240724092950.752536-3-victor.liu@nxp.com> (raw)
In-Reply-To: <20240724092950.752536-1-victor.liu@nxp.com>

i.MX8qxp Display Controller contains a blit engine for raster graphics.
It may read up to 3 source images from memory and computes one destination
image from it, which is written back to memory.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
v3:
* New patch. (Rob)

 .../imx/fsl,imx8qxp-dc-blit-engine.yaml       | 204 ++++++++++++++++++
 1 file changed, 204 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml

diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml
new file mode 100644
index 000000000000..45db6da39e20
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml
@@ -0,0 +1,204 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blit-engine.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8qxp Display Controller Blit Engine
+
+description: |
+  A blit operation (block based image transfer) reads up to 3 source images
+  from memory and computes one destination image from it, which is written
+  back to memory. The following basic operations are supported:
+
+  * Buffer Fill
+    Fills a buffer with constant color
+
+  * Buffer Copy
+    Copies one source to a destination buffer.
+
+  * Image Blend
+    Combines two source images by a blending equation and writes result to
+    destination (which can be one of the sources).
+
+  * Image Rop2/3
+    Combines up to three source images by a logical equation (raster operation)
+    and writes result to destination (which can be one of the sources).
+
+  * Image Flip
+    Mirrors the source image in horizontal and/or vertical direction.
+
+  * Format Convert
+    Convert between the supported color and buffer formats.
+
+  * Color Transform
+    Modify colors by linear or non-linear transformations.
+
+  * Image Scale
+    Changes size of the source image.
+
+  * Image Rotate
+    Rotates the source image by any angle.
+
+  * Image Filter
+    Performs an FIR filter operation on the source image.
+
+  * Image Warp
+    Performs a re-sampling of the source image with any pattern. The sample
+    point positions are read from a compressed coordinate buffer.
+
+  * Buffer Pack
+    Writes an image with color components stored in up to three different
+    buffers (planar formats) into a single buffer (packed format).
+
+  * Chroma Resample
+    Converts between different YUV formats that differ in chroma sampling rate
+    (4:4:4, 4:2:2, 4:2:0).
+
+maintainers:
+  - Liu Ying <victor.liu@nxp.com>
+
+properties:
+  compatible:
+    const: fsl,imx8qxp-dc-blit-engine
+
+  reg:
+    maxItems: 2
+
+  reg-names:
+    items:
+      - const: pec
+      - const: cfg
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+  ranges: true
+
+patternProperties:
+  "^blitblend@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-blitblend
+
+  "^clut@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-clut
+
+  "^fetchdecode@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-fetchdecode
+
+  "^fetcheco@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-fetcheco
+
+  "^fetchwarp@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-fetchwarp
+
+  "^filter@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-filter
+
+  "^hscaler@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-hscaler
+
+  "^matrix@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-matrix
+
+  "^rop@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-rop
+
+  "^store@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-store
+
+  "^vscaler@[0-9a-f]+$":
+    type: object
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: fsl,imx8qxp-dc-vscaler
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - "#address-cells"
+  - "#size-cells"
+  - ranges
+
+additionalProperties: false
+
+examples:
+  - |
+    blit-engine@56180820 {
+        compatible = "fsl,imx8qxp-dc-blit-engine";
+        reg = <0x56180820 0x13c>, <0x56181000 0x3400>;
+        reg-names = "pec", "cfg";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+
+        fetchdecode@56180820 {
+            compatible = "fsl,imx8qxp-dc-fetchdecode";
+            reg = <0x56180820 0x10>, <0x56181000 0x404>;
+            reg-names = "pec", "cfg";
+        };
+
+        store@56180940 {
+            compatible = "fsl,imx8qxp-dc-store";
+            reg = <0x56180940 0x1c>, <0x56184000 0x5c>;
+            reg-names = "pec", "cfg";
+            interrupt-parent = <&dc0_intc>;
+            interrupts = <0>, <1>, <2>;
+            interrupt-names = "shdload", "framecomplete", "seqcomplete";
+        };
+    };
-- 
2.34.1


  parent reply	other threads:[~2024-07-24  9:21 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-24  9:29 [PATCH v3 00/19] Add Freescale i.MX8qxp Display Controller support Liu Ying
2024-07-24  9:29 ` [PATCH v3 01/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller processing units Liu Ying
2024-08-16 22:43   ` Rob Herring
2024-07-24  9:29 ` Liu Ying [this message]
2024-08-16 22:45   ` [PATCH v3 02/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller blit engine Rob Herring
2024-07-24  9:29 ` [PATCH v3 03/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller display engine Liu Ying
2024-08-16 22:40   ` Rob Herring
2024-07-24  9:29 ` [PATCH v3 04/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller pixel engine Liu Ying
2024-08-16 22:39   ` Rob Herring
2024-07-24  9:29 ` [PATCH v3 05/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller AXI performance counter Liu Ying
2024-08-16 22:38   ` Rob Herring
2024-07-24  9:29 ` [PATCH v3 06/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller command sequencer Liu Ying
2024-08-16 22:37   ` Rob Herring
2024-08-19  7:37     ` Liu Ying
2024-07-24  9:29 ` [PATCH v3 07/19] dt-bindings: interrupt-controller: Add i.MX8qxp Display Controller interrupt controller Liu Ying
2024-07-24  9:29 ` [PATCH v3 08/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller Liu Ying
2024-08-18 14:24   ` Rob Herring (Arm)
2024-07-24  9:29 ` [PATCH v3 09/19] drm/imx: Add i.MX8qxp Display Controller display engine Liu Ying
2024-07-24  9:29 ` [PATCH v3 10/19] drm/imx: Add i.MX8qxp Display Controller pixel engine Liu Ying
2024-07-24  9:29 ` [PATCH v3 11/19] drm/imx: Add i.MX8qxp Display Controller interrupt controller Liu Ying
2024-07-24  9:29 ` [PATCH v3 12/19] drm/imx: Add i.MX8qxp Display Controller KMS Liu Ying
2024-07-24  9:29 ` [PATCH v3 13/19] MAINTAINERS: Add maintainer for i.MX8qxp Display Controller Liu Ying
2024-07-24  9:29 ` [DO NOT MERGE PATCH v3 14/19] dt-bindings: phy: mixel,mipi-dsi-phy: Allow assigned-clock* properties Liu Ying
2024-07-24  9:29 ` [DO NOT MERGE PATCH v3 15/19] dt-bindings: firmware: imx: Add SCU controlled display pixel link nodes Liu Ying
2024-07-24  9:29 ` [DO NOT MERGE PATCH v3 16/19] arm64: dts: imx8qxp: Add display controller subsystem Liu Ying
2024-07-24  9:29 ` [DO NOT MERGE PATCH v3 17/19] arm64: dts: imx8qxp: Add MIPI-LVDS combo subsystems Liu Ying
2024-07-24  9:29 ` [DO NOT MERGE PATCH v3 18/19] arm64: dts: imx8qxp-mek: Enable display controller Liu Ying
2024-07-24  9:29 ` [DO NOT MERGE PATCH v3 19/19] arm64: dts: imx8qxp-mek: Add MX8-DLVDS-LCD1 display module support Liu Ying
2024-07-27 16:39 ` [PATCH v3 00/19] Add Freescale i.MX8qxp Display Controller support Dmitry Baryshkov
2024-07-27 19:10   ` Sui Jingfeng
2024-07-27 20:28     ` Dmitry Baryshkov
2024-07-27 21:38       ` Sui Jingfeng
2024-07-27 22:08         ` Dmitry Baryshkov
2024-07-30  8:42   ` Liu Ying

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