* [PATCH v6 01/27] dt-bindings: atmel-sysreg: add sam9x7
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
@ 2024-07-29 7:05 ` Varshini Rajendran
2024-07-29 7:06 ` [PATCH v6 02/27] dt-bindings: mfd: syscon: add microchip's sam9x7 sfr Varshini Rajendran
` (15 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:05 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, nicolas.ferre, alexandre.belloni,
claudiu.beznea, varshini.rajendran, lee, sboyd, devicetree,
linux-arm-kernel, linux-kernel
Cc: Krzysztof Kozlowski
Add RAM controller & PIT64 DT bindings.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Changes in v6:
- Removed sfr compatible from the previous version patch as the syscon
devices compatible are moved to a different file. Did not remove the
Acked-by tag as there is no additional changes, only a change that is
removed.
--
Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 7374beb5a613..76e2b7978250 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -11,7 +11,8 @@ PIT Timer required properties:
shared across all System Controller members.
PIT64B Timer required properties:
-- compatible: Should be "microchip,sam9x60-pit64b"
+- compatible: Should be "microchip,sam9x60-pit64b" or
+ "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt for PIT64B timer
- clocks: Should contain the available clock sources for PIT64B timer.
@@ -31,7 +32,8 @@ RAMC SDRAM/DDR Controller required properties:
"atmel,at91sam9g45-ddramc",
"atmel,sama5d3-ddramc",
"microchip,sam9x60-ddramc",
- "microchip,sama7g5-uddrc"
+ "microchip,sama7g5-uddrc",
+ "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc".
- reg: Should contain registers location and length
Examples:
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH v6 02/27] dt-bindings: mfd: syscon: add microchip's sam9x7 sfr
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
2024-07-29 7:05 ` [PATCH v6 01/27] dt-bindings: atmel-sysreg: add sam9x7 Varshini Rajendran
@ 2024-07-29 7:06 ` Varshini Rajendran
2024-07-30 16:50 ` Rob Herring
2024-07-29 7:06 ` [PATCH v6 03/27] dt-bindings: atmel-ssc: add microchip,sam9x7-ssc Varshini Rajendran
` (14 subsequent siblings)
16 siblings, 1 reply; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:06 UTC (permalink / raw)
To: lee, robh, krzk+dt, conor+dt, matthias.bgg,
angelogioacchino.delregno, ychuang3, schung, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
Cc: varshini.rajendran
Add compatible for sam9x7 SoC's SFR.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
Changes in v6:
- New patch in v6 as the syscon devices are moved to a new file
upstream.
---
.../devicetree/bindings/mfd/syscon.yaml | 188 +++++++++---------
1 file changed, 97 insertions(+), 91 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 9dc594ea3654..50392d091e70 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -120,97 +120,103 @@ select:
properties:
compatible:
- items:
- - enum:
- - al,alpine-sysfabric-service
- - allwinner,sun8i-a83t-system-controller
- - allwinner,sun8i-h3-system-controller
- - allwinner,sun8i-v3s-system-controller
- - allwinner,sun50i-a64-system-controller
- - altr,l3regs
- - altr,sdr-ctl
- - amd,pensando-elba-syscon
- - amlogic,meson-mx-assist
- - amlogic,meson-mx-bootrom
- - amlogic,meson8-analog-top
- - amlogic,meson8b-analog-top
- - amlogic,meson8-pmu
- - amlogic,meson8b-pmu
- - apm,merlin-poweroff-mailbox
- - apm,mustang-poweroff-mailbox
- - apm,xgene-csw
- - apm,xgene-efuse
- - apm,xgene-mcb
- - apm,xgene-rb
- - apm,xgene-scu
- - atmel,sama5d2-sfrbu
- - atmel,sama5d3-nfc-io
- - atmel,sama5d3-sfrbu
- - atmel,sama5d4-sfrbu
- - axis,artpec6-syscon
- - brcm,cru-clkset
- - brcm,sr-cdru
- - brcm,sr-mhb
- - cirrus,ep7209-syscon1
- - cirrus,ep7209-syscon2
- - cirrus,ep7209-syscon3
- - cnxt,cx92755-uc
- - freecom,fsg-cs2-system-controller
- - fsl,imx93-aonmix-ns-syscfg
- - fsl,imx93-wakeupmix-syscfg
- - fsl,ls1088a-reset
- - fsl,vf610-anatop
- - fsl,vf610-mscm-cpucfg
- - hisilicon,dsa-subctrl
- - hisilicon,hi6220-sramctrl
- - hisilicon,hip04-ppe
- - hisilicon,pcie-sas-subctrl
- - hisilicon,peri-subctrl
- - hpe,gxp-sysreg
- - loongson,ls1b-syscon
- - loongson,ls1c-syscon
- - lsi,axxia-syscon
- - marvell,armada-3700-cpu-misc
- - marvell,armada-3700-nb-pm
- - marvell,armada-3700-avs
- - marvell,armada-3700-usb2-host-misc
- - marvell,dove-global-config
- - mediatek,mt2701-pctl-a-syscfg
- - mediatek,mt2712-pctl-a-syscfg
- - mediatek,mt6397-pctl-pmic-syscfg
- - mediatek,mt8135-pctl-a-syscfg
- - mediatek,mt8135-pctl-b-syscfg
- - mediatek,mt8173-pctl-a-syscfg
- - mediatek,mt8365-syscfg
- - microchip,lan966x-cpu-syscon
- - microchip,sam9x60-sfr
- - microchip,sama7g5-ddr3phy
- - mscc,ocelot-cpu-syscon
- - mstar,msc313-pmsleep
- - nuvoton,ma35d1-sys
- - nuvoton,wpcm450-shm
- - rockchip,px30-qos
- - rockchip,rk3036-qos
- - rockchip,rk3066-qos
- - rockchip,rk3128-qos
- - rockchip,rk3228-qos
- - rockchip,rk3288-qos
- - rockchip,rk3368-qos
- - rockchip,rk3399-qos
- - rockchip,rk3568-qos
- - rockchip,rk3588-qos
- - rockchip,rv1126-qos
- - st,spear1340-misc
- - stericsson,nomadik-pmu
- - starfive,jh7100-sysmain
- - ti,am62-opp-efuse-table
- - ti,am62-usb-phy-ctrl
- - ti,am625-dss-oldi-io-ctrl
- - ti,am62p-cpsw-mac-efuse
- - ti,am654-dss-oldi-io-ctrl
- - ti,j784s4-pcie-ctrl
- - ti,keystone-pllctrl
- - const: syscon
+ oneOf:
+ - items:
+ - enum:
+ - al,alpine-sysfabric-service
+ - allwinner,sun8i-a83t-system-controller
+ - allwinner,sun8i-h3-system-controller
+ - allwinner,sun8i-v3s-system-controller
+ - allwinner,sun50i-a64-system-controller
+ - altr,l3regs
+ - altr,sdr-ctl
+ - amd,pensando-elba-syscon
+ - amlogic,meson-mx-assist
+ - amlogic,meson-mx-bootrom
+ - amlogic,meson8-analog-top
+ - amlogic,meson8b-analog-top
+ - amlogic,meson8-pmu
+ - amlogic,meson8b-pmu
+ - apm,merlin-poweroff-mailbox
+ - apm,mustang-poweroff-mailbox
+ - apm,xgene-csw
+ - apm,xgene-efuse
+ - apm,xgene-mcb
+ - apm,xgene-rb
+ - apm,xgene-scu
+ - atmel,sama5d2-sfrbu
+ - atmel,sama5d3-nfc-io
+ - atmel,sama5d3-sfrbu
+ - atmel,sama5d4-sfrbu
+ - axis,artpec6-syscon
+ - brcm,cru-clkset
+ - brcm,sr-cdru
+ - brcm,sr-mhb
+ - cirrus,ep7209-syscon1
+ - cirrus,ep7209-syscon2
+ - cirrus,ep7209-syscon3
+ - cnxt,cx92755-uc
+ - freecom,fsg-cs2-system-controller
+ - fsl,imx93-aonmix-ns-syscfg
+ - fsl,imx93-wakeupmix-syscfg
+ - fsl,ls1088a-reset
+ - fsl,vf610-anatop
+ - fsl,vf610-mscm-cpucfg
+ - hisilicon,dsa-subctrl
+ - hisilicon,hi6220-sramctrl
+ - hisilicon,hip04-ppe
+ - hisilicon,pcie-sas-subctrl
+ - hisilicon,peri-subctrl
+ - hpe,gxp-sysreg
+ - loongson,ls1b-syscon
+ - loongson,ls1c-syscon
+ - lsi,axxia-syscon
+ - marvell,armada-3700-cpu-misc
+ - marvell,armada-3700-nb-pm
+ - marvell,armada-3700-avs
+ - marvell,armada-3700-usb2-host-misc
+ - marvell,dove-global-config
+ - mediatek,mt2701-pctl-a-syscfg
+ - mediatek,mt2712-pctl-a-syscfg
+ - mediatek,mt6397-pctl-pmic-syscfg
+ - mediatek,mt8135-pctl-a-syscfg
+ - mediatek,mt8135-pctl-b-syscfg
+ - mediatek,mt8173-pctl-a-syscfg
+ - mediatek,mt8365-syscfg
+ - microchip,lan966x-cpu-syscon
+ - microchip,sam9x60-sfr
+ - microchip,sam9x7-sfr
+ - microchip,sama7g5-ddr3phy
+ - mscc,ocelot-cpu-syscon
+ - mstar,msc313-pmsleep
+ - nuvoton,ma35d1-sys
+ - nuvoton,wpcm450-shm
+ - rockchip,px30-qos
+ - rockchip,rk3036-qos
+ - rockchip,rk3066-qos
+ - rockchip,rk3128-qos
+ - rockchip,rk3228-qos
+ - rockchip,rk3288-qos
+ - rockchip,rk3368-qos
+ - rockchip,rk3399-qos
+ - rockchip,rk3568-qos
+ - rockchip,rk3588-qos
+ - rockchip,rv1126-qos
+ - st,spear1340-misc
+ - stericsson,nomadik-pmu
+ - starfive,jh7100-sysmain
+ - ti,am62-opp-efuse-table
+ - ti,am62-usb-phy-ctrl
+ - ti,am625-dss-oldi-io-ctrl
+ - ti,am62p-cpsw-mac-efuse
+ - ti,am654-dss-oldi-io-ctrl
+ - ti,j784s4-pcie-ctrl
+ - ti,keystone-pllctrl
+ - const: syscon
+ - items:
+ - const: microchip,sam9x7-sfr
+ - const: microchip,sam9x60-sfr
+ - const: syscon
reg:
maxItems: 1
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH v6 02/27] dt-bindings: mfd: syscon: add microchip's sam9x7 sfr
2024-07-29 7:06 ` [PATCH v6 02/27] dt-bindings: mfd: syscon: add microchip's sam9x7 sfr Varshini Rajendran
@ 2024-07-30 16:50 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2024-07-30 16:50 UTC (permalink / raw)
To: Varshini Rajendran
Cc: lee, krzk+dt, conor+dt, matthias.bgg, angelogioacchino.delregno,
ychuang3, schung, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
On Mon, Jul 29, 2024 at 12:36:03PM +0530, Varshini Rajendran wrote:
> Add compatible for sam9x7 SoC's SFR.
That's (kind of) obvious from the diff. How is the block on the new SoC
the same or different from the prior chip? It's kind of strange that one
of these blocks which tend to be register bit soup of left over controls
would be the same or a superset of another SoC.
>
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
> Changes in v6:
>
> - New patch in v6 as the syscon devices are moved to a new file
> upstream.
> ---
> .../devicetree/bindings/mfd/syscon.yaml | 188 +++++++++---------
> 1 file changed, 97 insertions(+), 91 deletions(-)
Put this in your own schema file. I don't think we want get into more
complicated cases here.
Rob
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v6 03/27] dt-bindings: atmel-ssc: add microchip,sam9x7-ssc
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
2024-07-29 7:05 ` [PATCH v6 01/27] dt-bindings: atmel-sysreg: add sam9x7 Varshini Rajendran
2024-07-29 7:06 ` [PATCH v6 02/27] dt-bindings: mfd: syscon: add microchip's sam9x7 sfr Varshini Rajendran
@ 2024-07-29 7:06 ` Varshini Rajendran
2024-07-29 7:06 ` [PATCH v6 04/27] dt-bindings: serial: atmel,at91-usart: add compatible for sam9x7 Varshini Rajendran
` (13 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:06 UTC (permalink / raw)
To: claudiu.beznea, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, linux-arm-kernel, devicetree, linux-kernel
Cc: varshini.rajendran, Krzysztof Kozlowski
Add microchip,sam9x7-ssc to DT bindings documentation.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/misc/atmel-ssc.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/misc/atmel-ssc.txt b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
index f9fb412642fe..894875826de9 100644
--- a/Documentation/devicetree/bindings/misc/atmel-ssc.txt
+++ b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
@@ -2,6 +2,7 @@
Required properties:
- compatible: "atmel,at91rm9200-ssc" or "atmel,at91sam9g45-ssc"
+ or "microchip,sam9x7-ssc", "atmel,at91sam9g45-ssc"
- atmel,at91rm9200-ssc: support pdc transfer
- atmel,at91sam9g45-ssc: support dma transfer
- reg: Should contain SSC registers location and length
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH v6 04/27] dt-bindings: serial: atmel,at91-usart: add compatible for sam9x7.
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (2 preceding siblings ...)
2024-07-29 7:06 ` [PATCH v6 03/27] dt-bindings: atmel-ssc: add microchip,sam9x7-ssc Varshini Rajendran
@ 2024-07-29 7:06 ` Varshini Rajendran
2024-07-29 7:06 ` [PATCH v6 05/27] dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x7 compatible Varshini Rajendran
` (12 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:06 UTC (permalink / raw)
To: richard.genoud, radu_nicolae.pirea, gregkh, jirislaby, robh,
krzk+dt, conor+dt, nicolas.ferre, alexandre.belloni,
claudiu.beznea, linux-spi, linux-kernel, linux-serial, devicetree,
linux-arm-kernel
Cc: varshini.rajendran, Conor Dooley
Add sam9x7 compatible to DT bindings documentation.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
Changes in v6:
- Updated the Acked-by tag.
---
.../devicetree/bindings/serial/atmel,at91-usart.yaml | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
index eb2992a447d7..f466c38518c4 100644
--- a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
+++ b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
@@ -23,13 +23,20 @@ properties:
- const: atmel,at91sam9260-dbgu
- const: atmel,at91sam9260-usart
- items:
- - const: microchip,sam9x60-usart
+ - enum:
+ - microchip,sam9x60-usart
+ - microchip,sam9x7-usart
- const: atmel,at91sam9260-usart
- items:
- const: microchip,sam9x60-dbgu
- const: microchip,sam9x60-usart
- const: atmel,at91sam9260-dbgu
- const: atmel,at91sam9260-usart
+ - items:
+ - const: microchip,sam9x7-dbgu
+ - const: atmel,at91sam9260-dbgu
+ - const: microchip,sam9x7-usart
+ - const: atmel,at91sam9260-usart
reg:
maxItems: 1
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH v6 05/27] dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x7 compatible
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (3 preceding siblings ...)
2024-07-29 7:06 ` [PATCH v6 04/27] dt-bindings: serial: atmel,at91-usart: add compatible for sam9x7 Varshini Rajendran
@ 2024-07-29 7:06 ` Varshini Rajendran
2024-07-30 19:04 ` Rob Herring
2024-07-29 7:07 ` [PATCH v6 09/27] dt-bindings: clocks: atmel,at91sam9x5-sckc: add sam9x7 Varshini Rajendran
` (11 subsequent siblings)
16 siblings, 1 reply; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:06 UTC (permalink / raw)
To: conor, robh, krzk+dt, nicolas.ferre, alexandre.belloni,
claudiu.beznea, devicetree, linux-arm-kernel, linux-kernel
Cc: varshini.rajendran
Add support for sam9x7 device compatible.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
Changes in v6:
- New patch in v6 to document tcb compatible.
---
.../soc/microchip/atmel,at91rm9200-tcb.yaml | 20 ++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml
index a46411149571..2c7275c4503b 100644
--- a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml
+++ b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml
@@ -15,13 +15,19 @@ description: |
properties:
compatible:
- items:
- - enum:
- - atmel,at91rm9200-tcb
- - atmel,at91sam9x5-tcb
- - atmel,sama5d2-tcb
- - const: simple-mfd
- - const: syscon
+ oneOf:
+ - items:
+ - enum:
+ - atmel,at91rm9200-tcb
+ - atmel,at91sam9x5-tcb
+ - atmel,sama5d2-tcb
+ - const: simple-mfd
+ - const: syscon
+ - items:
+ - const: microchip,sam9x7-tcb
+ - const: atmel,sama5d2-tcb
+ - const: simple-mfd
+ - const: syscon
reg:
maxItems: 1
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH v6 05/27] dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x7 compatible
2024-07-29 7:06 ` [PATCH v6 05/27] dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x7 compatible Varshini Rajendran
@ 2024-07-30 19:04 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2024-07-30 19:04 UTC (permalink / raw)
To: Varshini Rajendran
Cc: conor, krzk+dt, nicolas.ferre, alexandre.belloni, claudiu.beznea,
devicetree, linux-arm-kernel, linux-kernel
On Mon, Jul 29, 2024 at 12:36:49PM +0530, Varshini Rajendran wrote:
> Add support for sam9x7 device compatible.
How is this device similar to sama5d2? IOW, why is the fallback
appropriate?
>
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
> Changes in v6:
>
> - New patch in v6 to document tcb compatible.
> ---
> .../soc/microchip/atmel,at91rm9200-tcb.yaml | 20 ++++++++++++-------
> 1 file changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml
> index a46411149571..2c7275c4503b 100644
> --- a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml
> +++ b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml
> @@ -15,13 +15,19 @@ description: |
>
> properties:
> compatible:
> - items:
> - - enum:
> - - atmel,at91rm9200-tcb
> - - atmel,at91sam9x5-tcb
> - - atmel,sama5d2-tcb
> - - const: simple-mfd
> - - const: syscon
> + oneOf:
> + - items:
> + - enum:
> + - atmel,at91rm9200-tcb
> + - atmel,at91sam9x5-tcb
> + - atmel,sama5d2-tcb
> + - const: simple-mfd
> + - const: syscon
> + - items:
> + - const: microchip,sam9x7-tcb
> + - const: atmel,sama5d2-tcb
> + - const: simple-mfd
> + - const: syscon
>
> reg:
> maxItems: 1
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v6 09/27] dt-bindings: clocks: atmel,at91sam9x5-sckc: add sam9x7
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (4 preceding siblings ...)
2024-07-29 7:06 ` [PATCH v6 05/27] dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x7 compatible Varshini Rajendran
@ 2024-07-29 7:07 ` Varshini Rajendran
2024-07-29 7:07 ` [PATCH v6 10/27] dt-bindings: clocks: atmel,at91rm9200-pmc: add sam9x7 clock controller Varshini Rajendran
` (10 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:07 UTC (permalink / raw)
To: mturquette, sboyd, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, linux-clk, devicetree,
linux-arm-kernel, linux-kernel
Cc: varshini.rajendran, Conor Dooley
Add bindings for SAM9X7's slow clock controller.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
---
Changes in v6:
- Corrected the subject line
- Updated Reviewed-by tag
---
.../devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml b/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
index 7be29877e6d2..c2283cd07f05 100644
--- a/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
+++ b/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
@@ -18,7 +18,9 @@ properties:
- atmel,sama5d4-sckc
- microchip,sam9x60-sckc
- items:
- - const: microchip,sama7g5-sckc
+ - enum:
+ - microchip,sam9x7-sckc
+ - microchip,sama7g5-sckc
- const: microchip,sam9x60-sckc
reg:
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH v6 10/27] dt-bindings: clocks: atmel,at91rm9200-pmc: add sam9x7 clock controller
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (5 preceding siblings ...)
2024-07-29 7:07 ` [PATCH v6 09/27] dt-bindings: clocks: atmel,at91sam9x5-sckc: add sam9x7 Varshini Rajendran
@ 2024-07-29 7:07 ` Varshini Rajendran
2024-07-29 7:08 ` [PATCH v6 14/27] dt-bindings: clock: at91: Allow PLLs to be exported and referenced in DT Varshini Rajendran
` (9 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:07 UTC (permalink / raw)
To: mturquette, sboyd, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, linux-clk, devicetree,
linux-arm-kernel, linux-kernel
Cc: varshini.rajendran, Conor Dooley
Add bindings for SAM9X7's pmc.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
---
Changes in v6:
- Corrected the subject line
- Updated Reviewed-by tag
---
.../devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
index c1bdcd9058ed..c9eb60776b4d 100644
--- a/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
+++ b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
@@ -42,6 +42,7 @@ properties:
- atmel,sama5d3-pmc
- atmel,sama5d4-pmc
- microchip,sam9x60-pmc
+ - microchip,sam9x7-pmc
- microchip,sama7g5-pmc
- const: syscon
@@ -88,6 +89,7 @@ allOf:
contains:
enum:
- microchip,sam9x60-pmc
+ - microchip,sam9x7-pmc
- microchip,sama7g5-pmc
then:
properties:
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH v6 14/27] dt-bindings: clock: at91: Allow PLLs to be exported and referenced in DT
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (6 preceding siblings ...)
2024-07-29 7:07 ` [PATCH v6 10/27] dt-bindings: clocks: atmel,at91rm9200-pmc: add sam9x7 clock controller Varshini Rajendran
@ 2024-07-29 7:08 ` Varshini Rajendran
2024-07-29 7:08 ` [PATCH v6 16/27] dt-bindings: interrupt-controller: Add support for sam9x7 aic Varshini Rajendran
` (8 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:08 UTC (permalink / raw)
To: mturquette, sboyd, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, linux-clk, devicetree,
linux-arm-kernel, linux-kernel
Cc: varshini.rajendran
Allow PLLADIV2 and LVDSPLL to be referenced as a PMC_TYPE_CORE
clock from phandle in DT for sam9x7 SoC family.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
---
Changes in v6:
- Updated Reviewed-by tag
---
include/dt-bindings/clock/at91.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h
index 3e3972a814c1..6ede88c3992d 100644
--- a/include/dt-bindings/clock/at91.h
+++ b/include/dt-bindings/clock/at91.h
@@ -38,6 +38,10 @@
#define PMC_CPU (PMC_MAIN + 9)
#define PMC_MCK1 (PMC_MAIN + 10)
+/* SAM9X7 */
+#define PMC_PLLADIV2 (PMC_MAIN + 11)
+#define PMC_LVDSPLL (PMC_MAIN + 12)
+
#ifndef AT91_PMC_MOSCS
#define AT91_PMC_MOSCS 0 /* MOSCS Flag */
#define AT91_PMC_LOCKA 1 /* PLLA Lock */
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH v6 16/27] dt-bindings: interrupt-controller: Add support for sam9x7 aic
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (7 preceding siblings ...)
2024-07-29 7:08 ` [PATCH v6 14/27] dt-bindings: clock: at91: Allow PLLs to be exported and referenced in DT Varshini Rajendran
@ 2024-07-29 7:08 ` Varshini Rajendran
2024-07-29 16:24 ` Rob Herring
2024-07-29 7:09 ` [PATCH v6 21/27] dt-bindings: reset: atmel,at91sam9260-reset: add sam9x7 Varshini Rajendran
` (7 subsequent siblings)
16 siblings, 1 reply; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:08 UTC (permalink / raw)
To: tglx, robh, krzk+dt, conor+dt, nicolas.ferre, alexandre.belloni,
claudiu.beznea, dharma.b, linux-kernel, devicetree,
linux-arm-kernel
Cc: varshini.rajendran
Document the support added for the Advanced interrupt controller(AIC)
chip in the sam9x7 SoC family.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
Changes in v6:
- Changed the compatible list to only sam9x7's. Removed the Acked-by
tag as there is functional change in the patch.
---
.../devicetree/bindings/interrupt-controller/atmel,aic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml
index d4658fe3867c..d671ed884c9e 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml
@@ -23,6 +23,7 @@ properties:
- atmel,sama5d3-aic
- atmel,sama5d4-aic
- microchip,sam9x60-aic
+ - microchip,sam9x7-aic
reg:
maxItems: 1
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH v6 16/27] dt-bindings: interrupt-controller: Add support for sam9x7 aic
2024-07-29 7:08 ` [PATCH v6 16/27] dt-bindings: interrupt-controller: Add support for sam9x7 aic Varshini Rajendran
@ 2024-07-29 16:24 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2024-07-29 16:24 UTC (permalink / raw)
To: Varshini Rajendran
Cc: tglx, krzk+dt, conor+dt, nicolas.ferre, alexandre.belloni,
claudiu.beznea, dharma.b, linux-kernel, devicetree,
linux-arm-kernel
On Mon, Jul 29, 2024 at 12:38:18PM +0530, Varshini Rajendran wrote:
> Document the support added for the Advanced interrupt controller(AIC)
> chip in the sam9x7 SoC family.
The diff tells us that. What would be useful is how it's different from
prior designs. Number of interrupts for example...
>
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
> Changes in v6:
>
> - Changed the compatible list to only sam9x7's. Removed the Acked-by
> tag as there is functional change in the patch.
> ---
> .../devicetree/bindings/interrupt-controller/atmel,aic.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml
> index d4658fe3867c..d671ed884c9e 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml
> @@ -23,6 +23,7 @@ properties:
> - atmel,sama5d3-aic
> - atmel,sama5d4-aic
> - microchip,sam9x60-aic
> + - microchip,sam9x7-aic
>
> reg:
> maxItems: 1
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v6 21/27] dt-bindings: reset: atmel,at91sam9260-reset: add sam9x7
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (8 preceding siblings ...)
2024-07-29 7:08 ` [PATCH v6 16/27] dt-bindings: interrupt-controller: Add support for sam9x7 aic Varshini Rajendran
@ 2024-07-29 7:09 ` Varshini Rajendran
2024-07-29 7:09 ` [PATCH v6 22/27] dt-bindings: power: reset: atmel,sama5d2-shdwc: " Varshini Rajendran
` (6 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:09 UTC (permalink / raw)
To: p.zabel, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea, devicetree, linux-arm-kernel,
linux-kernel
Cc: varshini.rajendran, Krzysztof Kozlowski
Add documentation for SAM9X7 reset controller.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
---
.../devicetree/bindings/reset/atmel,at91sam9260-reset.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml
index 98465d26949e..c3b33bbc7319 100644
--- a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml
+++ b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml
@@ -26,6 +26,10 @@ properties:
- items:
- const: atmel,sama5d3-rstc
- const: atmel,at91sam9g45-rstc
+ - items:
+ - enum:
+ - microchip,sam9x7-rstc
+ - const: microchip,sam9x60-rstc
reg:
minItems: 1
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH v6 22/27] dt-bindings: power: reset: atmel,sama5d2-shdwc: add sam9x7
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (9 preceding siblings ...)
2024-07-29 7:09 ` [PATCH v6 21/27] dt-bindings: reset: atmel,at91sam9260-reset: add sam9x7 Varshini Rajendran
@ 2024-07-29 7:09 ` Varshini Rajendran
2024-07-29 7:09 ` [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC Varshini Rajendran
` (5 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:09 UTC (permalink / raw)
To: claudiu.beznea, sre, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, linux-pm, devicetree, linux-arm-kernel,
linux-kernel
Cc: varshini.rajendran, Krzysztof Kozlowski, Sebastian Reichel
Add shutdown controller DT bindings.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
.../devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
index 8c58e12cdb60..0735ceb7c103 100644
--- a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
+++ b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
@@ -22,6 +22,9 @@ properties:
- enum:
- atmel,sama5d2-shdwc
- microchip,sam9x60-shdwc
+ - items:
+ - const: microchip,sam9x7-shdwc
+ - const: microchip,sam9x60-shdwc
reg:
maxItems: 1
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (10 preceding siblings ...)
2024-07-29 7:09 ` [PATCH v6 22/27] dt-bindings: power: reset: atmel,sama5d2-shdwc: " Varshini Rajendran
@ 2024-07-29 7:09 ` Varshini Rajendran
2024-07-31 8:30 ` Krzysztof Kozlowski
2024-07-29 7:09 ` [PATCH v6 26/27] dt-bindings: arm: add sam9x75 curiosity board Varshini Rajendran
` (4 subsequent siblings)
16 siblings, 1 reply; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:09 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, varshini.rajendran, nicolas.ferre,
devicetree, linux-kernel
Add device tree file for SAM9X7 SoC family.
Co-developed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
Changes in v6:
- Moved vendor specific property to the end of the nodes.
- Added assigned-clock-rates property in gmac node.
- Modify aic compatible according to the previous support patches.
---
arch/arm/boot/dts/microchip/sam9x7.dtsi | 1226 +++++++++++++++++++++++
1 file changed, 1226 insertions(+)
create mode 100644 arch/arm/boot/dts/microchip/sam9x7.dtsi
diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi
new file mode 100644
index 000000000000..bedcb9173b79
--- /dev/null
+++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi
@@ -0,0 +1,1226 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * sam9x7.dtsi - Device Tree Include file for Microchip SAM9X7 SoC family
+ *
+ * Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Varshini Rajendran <varshini.rajendran@microchip.com>
+ */
+
+#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/mfd/at91-usart.h>
+#include <dt-bindings/mfd/atmel-flexcom.h>
+#include <dt-bindings/pinctrl/at91.h>
+
+/ {
+ model = "Microchip SAM9X7 SoC";
+ compatible = "microchip,sam9x7";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&aic>;
+
+ aliases {
+ serial0 = &dbgu;
+ gpio0 = &pioA;
+ gpio1 = &pioB;
+ gpio2 = &pioC;
+ gpio3 = &pioD;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "arm,arm926ej-s";
+ reg = <0>;
+ device_type = "cpu";
+ };
+ };
+
+ clocks {
+ slow_xtal: clock-slowxtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+
+ main_xtal: clock-mainxtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+ };
+
+ sram: sram@300000 {
+ compatible = "mmio-sram";
+ reg = <0x300000 0x10000>;
+ ranges = <0 0x300000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sdmmc0: mmc@80000000 {
+ compatible = "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci";
+ reg = <0x80000000 0x300>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 12>, <&pmc PMC_TYPE_GCK 12>;
+ clock-names = "hclock", "multclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 12>;
+ assigned-clock-rates = <100000000>;
+ status = "disabled";
+ };
+
+ sdmmc1: mmc@90000000 {
+ compatible = "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci";
+ reg = <0x90000000 0x300>;
+ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_GCK 26>;
+ clock-names = "hclock", "multclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
+ assigned-clock-rates = <100000000>;
+ status = "disabled";
+ };
+ };
+
+ apb {
+ compatible = "simple-bus";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ flx4: flexcom@f0000000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf0000000 0x200>;
+ ranges = <0x0 0xf0000000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
+ status = "disabled";
+
+ uart4: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(8))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(9))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ spi4: spi@400 {
+ compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
+ reg = <0x400 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
+ clock-names = "spi_clk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(8))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(9))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(8))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(9))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx5: flexcom@f0004000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf0004000 0x200>;
+ ranges = <0x0 0xf0004000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
+ status = "disabled";
+
+ uart5: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(10))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(11))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ spi5: spi@400 {
+ compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
+ reg = <0x400 0x200>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
+ clock-names = "spi_clk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(10))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(11))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(10))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(11))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ dma0: dma-controller@f0008000 {
+ compatible = "microchip,sam9x7-dma", "atmel,sama5d4-dma";
+ reg = <0xf0008000 0x1000>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
+ #dma-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
+ clock-names = "dma_clk";
+ status = "disabled";
+ };
+
+ ssc: ssc@f0010000 {
+ compatible = "microchip,sam9x7-ssc", "atmel,at91sam9g45-ssc";
+ reg = <0xf0010000 0x4000>;
+ interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
+ clock-names = "pclk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(38))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(39))>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ i2s: i2s@f001c000 {
+ compatible = "microchip,sam9x7-i2smcc", "microchip,sam9x60-i2smcc";
+ reg = <0xf001c000 0x100>;
+ interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 34>, <&pmc PMC_TYPE_GCK 34>;
+ clock-names = "pclk", "gclk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(36))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(37))>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ flx11: flexcom@f0020000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf0020000 0x200>;
+ ranges = <0x0 0xf0020000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
+ status = "disabled";
+
+ uart11: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(22))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(23))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ i2c11: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(22))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(23))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx12: flexcom@f0024000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf0024000 0x200>;
+ ranges = <0x0 0xf0024000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
+ status = "disabled";
+
+ uart12: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(24))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(25))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ i2c12: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(24))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(25))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ pit64b0: timer@f0028000 {
+ compatible = "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b";
+ reg = <0xf0028000 0x100>;
+ interrupts = <37 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 37>, <&pmc PMC_TYPE_GCK 37>;
+ clock-names = "pclk", "gclk";
+ };
+
+ sha: crypto@f002c000 {
+ compatible = "microchip,sam9x7-sha", "atmel,at91sam9g46-sha";
+ reg = <0xf002c000 0x100>;
+ interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
+ clock-names = "sha_clk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(34))>;
+ dma-names = "tx";
+ };
+
+ trng: rng@f0030000 {
+ compatible = "microchip,sam9x7-trng", "microchip,sam9x60-trng";
+ reg = <0xf0030000 0x100>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
+ status = "disabled";
+ };
+
+ aes: crypto@f0034000 {
+ compatible = "microchip,sam9x7-aes", "atmel,at91sam9g46-aes";
+ reg = <0xf0034000 0x100>;
+ interrupts = <39 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
+ clock-names = "aes_clk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(32))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(33))>;
+ dma-names = "tx", "rx";
+ };
+
+ tdes: crypto@f0038000 {
+ compatible = "microchip,sam9x7-tdes", "atmel,at91sam9g46-tdes";
+ reg = <0xf0038000 0x100>;
+ interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
+ clock-names = "tdes_clk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(31))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(30))>;
+ dma-names = "tx", "rx";
+ };
+
+ classd: sound@f003c000 {
+ compatible = "microchip,sam9x7-classd", "atmel,sama5d2-classd";
+ reg = <0xf003c000 0x100>;
+ interrupts = <42 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_GCK 42>;
+ clock-names = "pclk", "gclk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(35))>;
+ dma-names = "tx";
+ status = "disabled";
+ };
+
+ pit64b1: timer@f0040000 {
+ compatible = "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b";
+ reg = <0xf0040000 0x100>;
+ interrupts = <58 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>;
+ clock-names = "pclk", "gclk";
+ };
+
+ can0: can@f8000000 {
+ compatible = "bosch,m_can";
+ reg = <0xf8000000 0x100>, <0x300000 0x7800>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>,
+ <68 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "int0", "int1";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_GCK 29>;
+ clock-names = "hclk", "cclk";
+ assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 29>;
+ assigned-clock-rates = <480000000>, <40000000>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+ bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
+ status = "disabled";
+ };
+
+ can1: can@f8004000 {
+ compatible = "bosch,m_can";
+ reg = <0xf8004000 0x100>, <0x300000 0xbc00>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>,
+ <69 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "int0", "int1";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>;
+ clock-names = "hclk", "cclk";
+ assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
+ assigned-clock-rates = <480000000>, <40000000>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+ bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
+ status = "disabled";
+ };
+
+ tcb: timer@f8008000 {
+ compatible = "microchip,sam9x7-tcb","atmel,sama5d2-tcb", "simple-mfd", "syscon";
+ reg = <0xf8008000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_GCK 17>, <&clk32k 0>;
+ clock-names = "t0_clk", "gclk", "slow_clk";
+ status = "disabled";
+ };
+
+ flx6: flexcom@f8010000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf8010000 0x200>;
+ ranges = <0x0 0xf8010000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
+ status = "disabled";
+
+ uart6: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(12))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(13))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ i2c6: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(12))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(13))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx7: flexcom@f8014000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf8014000 0x200>;
+ ranges = <0x0 0xf8014000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
+ status = "disabled";
+
+ uart7: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(14))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(15))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ i2c7: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(14))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(15))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx8: flexcom@f8018000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf8018000 0x200>;
+ ranges = <0x0 0xf8018000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
+ status = "disabled";
+
+ uart8: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(16))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(17))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ i2c8: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(16))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(17))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx0: flexcom@f801c000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf801c000 0x200>;
+ ranges = <0x0 0xf801c000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
+ status = "disabled";
+
+ uart0: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(0))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(1))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ spi0: spi@400 {
+ compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
+ reg = <0x400 0x200>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
+ clock-names = "spi_clk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(0))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(1))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+
+ i2c0: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(0))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(1))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx1: flexcom@f8020000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf8020000 0x200>;
+ ranges = <0x0 0xf8020000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
+ status = "disabled";
+
+ uart1: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(2))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(3))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ spi1: spi@400 {
+ compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
+ reg = <0x400 0x200>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
+ clock-names = "spi_clk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(2))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(3))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(2))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(3))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx2: flexcom@f8024000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf8024000 0x200>;
+ ranges = <0x0 0xf8024000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
+ status = "disabled";
+
+ uart2: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(4))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(5))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ spi2: spi@400 {
+ compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
+ reg = <0x400 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
+ clock-names = "spi_clk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(4))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(5))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(4))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(5))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx3: flexcom@f8028000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf8028000 0x200>;
+ ranges = <0x0 0xf8028000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
+ status = "disabled";
+
+ uart3: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(6))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(7))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ spi3: spi@400 {
+ compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
+ reg = <0x400 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
+ clock-names = "spi_clk";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(6))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(7))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(6))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(7))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ gmac: ethernet@f802c000 {
+ compatible = "microchip,sam9x7-gem", "microchip,sama7g5-gem";
+ reg = <0xf802c000 0x1000>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 0 */
+ <60 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 1 */
+ <61 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 2 */
+ <62 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 3 */
+ <63 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 4 */
+ <64 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 5 */
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_GCK 24>, <&pmc PMC_TYPE_GCK 67>;
+ clock-names = "hclk", "pclk", "tx_clk", "tsu_clk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 67>;
+ assigned-clock-rates = <266666666>;
+ status = "disabled";
+ };
+
+ pwm0: pwm@f8034000 {
+ compatible = "microchip,sam9x7-pwm", "microchip,sam9x60-pwm";
+ reg = <0xf8034000 0x300>;
+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ flx9: flexcom@f8040000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf8040000 0x200>;
+ ranges = <0x0 0xf8040000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
+ status = "disabled";
+
+ uart9: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(18))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(19))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ i2c9: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(18))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(19))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx10: flexcom@f8044000 {
+ compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";
+ reg = <0xf8044000 0x200>;
+ ranges = <0x0 0xf8044000 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
+ status = "disabled";
+
+ uart10: serial@200 {
+ compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(20))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(21))>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ i2c10: i2c@600 {
+ compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(20))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) |
+ AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(21))>;
+ dma-names = "tx", "rx";
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ sfr: sfr@f8050000 {
+ compatible = "microchip,sam9x7-sfr", "microchip,sam9x60-sfr", "syscon";
+ reg = <0xf8050000 0x100>;
+ };
+
+ matrix: matrix@ffffde00 {
+ compatible = "microchip,sam9x7-matrix", "atmel,at91sam9x5-matrix", "syscon";
+ reg = <0xffffde00 0x200>;
+ };
+
+ pmecc: ecc-engine@ffffe000 {
+ compatible = "microchip,sam9x7-pmecc", "atmel,at91sam9g45-pmecc";
+ reg = <0xffffe000 0x300>, <0xffffe600 0x100>;
+ };
+
+ mpddrc: mpddrc@ffffe800 {
+ compatible = "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc";
+ reg = <0xffffe800 0x200>;
+ clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>;
+ clock-names = "ddrck", "mpddr";
+ };
+
+ smc: smc@ffffea00 {
+ compatible = "microchip,sam9x7-smc", "atmel,at91sam9260-smc", "syscon";
+ reg = <0xffffea00 0x100>;
+ };
+
+ aic: interrupt-controller@fffff100 {
+ compatible = "microchip,sam9x7-aic";
+ reg = <0xfffff100 0x100>;
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ atmel,external-irqs = <31>;
+ };
+
+ dbgu: serial@fffff200 {
+ compatible = "microchip,sam9x7-dbgu", "atmel,at91sam9260-dbgu", "microchip,sam9x7-usart", "atmel,at91sam9260-usart";
+ reg = <0xfffff200 0x200>;
+ interrupts = <47 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
+ clock-names = "usart";
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(28))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+ AT91_XDMAC_DT_PERID(29))>;
+ dma-names = "tx", "rx";
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
+ pinctrl: pinctrl@fffff400 {
+ compatible = "microchip,sam9x7-pinctrl", "microchip,sam9x60-pinctrl", "simple-mfd";
+ ranges = <0xfffff400 0xfffff400 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* mux-mask corresponding to sam9x7 SoC in TFBGA228L package */
+ atmel,mux-mask = <
+ /* A B C D */
+ 0xffffffff 0xffffefc0 0xc0ffd000 0x00000000 /* pioA */
+ 0x07ffffff 0x0805fe7f 0x01ff9f81 0x06078000 /* pioB */
+ 0xffffffff 0x07dfffff 0xfa3fffff 0x00000000 /* pioC */
+ 0x00003fff 0x00003fe0 0x0000003f 0x00000000 /* pioD */
+ >;
+
+ pioA: gpio@fffff400 {
+ compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
+ };
+
+ pioB: gpio@fffff600 {
+ compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #gpio-lines = <26>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
+ };
+
+ pioC: gpio@fffff800 {
+ compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
+ };
+
+ pioD: gpio@fffffa00 {
+ compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";
+ reg = <0xfffffa00 0x200>;
+ interrupts = <44 IRQ_TYPE_LEVEL_HIGH 1>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #gpio-lines = <22>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
+ };
+ };
+
+ pmc: clock-controller@fffffc00 {
+ compatible = "microchip,sam9x7-pmc", "syscon";
+ reg = <0xfffffc00 0x200>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ #clock-cells = <2>;
+ clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
+ clock-names = "td_slck", "md_slck", "main_xtal";
+ };
+
+ reset_controller: reset-controller@fffffe00 {
+ compatible = "microchip,sam9x7-rstc", "microchip,sam9x60-rstc";
+ reg = <0xfffffe00 0x10>;
+ clocks = <&clk32k 0>;
+ };
+
+ poweroff: poweroff@fffffe10 {
+ compatible = "microchip,sam9x7-shdwc", "microchip,sam9x60-shdwc";
+ reg = <0xfffffe10 0x10>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk32k 0>;
+ atmel,wakeup-rtc-timer;
+ atmel,wakeup-rtt-timer;
+ status = "disabled";
+ };
+
+ rtt: rtc@fffffe20 {
+ compatible = "microchip,sam9x7-rtt", "atmel,at91sam9260-rtt";
+ reg = <0xfffffe20 0x20>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&clk32k 0>;
+ };
+
+ clk32k: clock-controller@fffffe50 {
+ compatible = "microchip,sam9x7-sckc", "microchip,sam9x60-sckc";
+ reg = <0xfffffe50 0x4>;
+ clocks = <&slow_xtal>;
+ #clock-cells = <1>;
+ };
+
+ gpbr: syscon@fffffe60 {
+ compatible = "microchip,sam9x7-gpbr", "atmel,at91sam9260-gpbr", "syscon";
+ reg = <0xfffffe60 0x10>;
+ };
+
+ rtc: rtc@fffffea8 {
+ compatible = "microchip,sam9x7-rtc", "microchip,sam9x60-rtc";
+ reg = <0xfffffea8 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&clk32k 0>;
+ };
+
+ watchdog: watchdog@ffffff80 {
+ compatible = "microchip,sam9x7-wdt", "microchip,sam9x60-wdt";
+ reg = <0xffffff80 0x24>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ status = "disabled";
+ };
+ };
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC
2024-07-29 7:09 ` [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC Varshini Rajendran
@ 2024-07-31 8:30 ` Krzysztof Kozlowski
2024-08-27 9:50 ` Varshini.Rajendran
0 siblings, 1 reply; 28+ messages in thread
From: Krzysztof Kozlowski @ 2024-07-31 8:30 UTC (permalink / raw)
To: Varshini Rajendran, robh, krzk+dt, conor+dt, nicolas.ferre,
devicetree, linux-kernel
On 29/07/2024 09:09, Varshini Rajendran wrote:
> Add device tree file for SAM9X7 SoC family.
>
> Co-developed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
...
> +
> + can1: can@f8004000 {
> + compatible = "bosch,m_can";
> + reg = <0xf8004000 0x100>, <0x300000 0xbc00>;
> + reg-names = "m_can", "message_ram";
> + interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>,
> + <69 IRQ_TYPE_LEVEL_HIGH 0>;
> + interrupt-names = "int0", "int1";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>;
> + clock-names = "hclk", "cclk";
> + assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
> + assigned-clock-rates = <480000000>, <40000000>;
> + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
> + bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
> + status = "disabled";
> + };
> +
> + tcb: timer@f8008000 {
> + compatible = "microchip,sam9x7-tcb","atmel,sama5d2-tcb", "simple-mfd", "syscon";
Why this is simple-mfd without children?
> + reg = <0xf8008000 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_GCK 17>, <&clk32k 0>;
> + clock-names = "t0_clk", "gclk", "slow_clk";
> + status = "disabled";
> + };
> +
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC
2024-07-31 8:30 ` Krzysztof Kozlowski
@ 2024-08-27 9:50 ` Varshini.Rajendran
2024-08-27 12:48 ` Krzysztof Kozlowski
0 siblings, 1 reply; 28+ messages in thread
From: Varshini.Rajendran @ 2024-08-27 9:50 UTC (permalink / raw)
To: krzk, robh, krzk+dt, conor+dt, Nicolas.Ferre, devicetree,
linux-kernel
Hi Krzysztof,
Apologies for the delay in response.
On 31/07/24 2:00 pm, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 29/07/2024 09:09, Varshini Rajendran wrote:
>> Add device tree file for SAM9X7 SoC family.
>>
>> Co-developed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
>
> ...
>
>> +
>> + can1: can@f8004000 {
>> + compatible = "bosch,m_can";
>> + reg = <0xf8004000 0x100>, <0x300000 0xbc00>;
>> + reg-names = "m_can", "message_ram";
>> + interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>,
>> + <69 IRQ_TYPE_LEVEL_HIGH 0>;
>> + interrupt-names = "int0", "int1";
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>;
>> + clock-names = "hclk", "cclk";
>> + assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
>> + assigned-clock-rates = <480000000>, <40000000>;
>> + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
>> + bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
>> + status = "disabled";
>> + };
>> +
>> + tcb: timer@f8008000 {
>> + compatible = "microchip,sam9x7-tcb","atmel,sama5d2-tcb", "simple-mfd", "syscon";
>
> Why this is simple-mfd without children?
The tcb node will have each TC (Timer Counter) Block as a child when it
is configured to be used as either one of the following modes Timer or
Counter / Capture / PWM.
>
>> + reg = <0xf8008000 0x100>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_GCK 17>, <&clk32k 0>;
>> + clock-names = "t0_clk", "gclk", "slow_clk";
>> + status = "disabled";
>> + };
>> +
>
> Best regards,
> Krzysztof
>
--
Thanks and Regards,
Varshini Rajendran.
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC
2024-08-27 9:50 ` Varshini.Rajendran
@ 2024-08-27 12:48 ` Krzysztof Kozlowski
2024-08-28 8:25 ` Varshini.Rajendran
0 siblings, 1 reply; 28+ messages in thread
From: Krzysztof Kozlowski @ 2024-08-27 12:48 UTC (permalink / raw)
To: Varshini.Rajendran, robh, krzk+dt, conor+dt, Nicolas.Ferre,
devicetree, linux-kernel
On 27/08/2024 11:50, Varshini.Rajendran@microchip.com wrote:
> Hi Krzysztof,
>
> Apologies for the delay in response.
>
> On 31/07/24 2:00 pm, Krzysztof Kozlowski wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> On 29/07/2024 09:09, Varshini Rajendran wrote:
>>> Add device tree file for SAM9X7 SoC family.
>>>
>>> Co-developed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>>> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>>> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
>>
>> ...
>>
>>> +
>>> + can1: can@f8004000 {
>>> + compatible = "bosch,m_can";
>>> + reg = <0xf8004000 0x100>, <0x300000 0xbc00>;
>>> + reg-names = "m_can", "message_ram";
>>> + interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>,
>>> + <69 IRQ_TYPE_LEVEL_HIGH 0>;
>>> + interrupt-names = "int0", "int1";
>>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>;
>>> + clock-names = "hclk", "cclk";
>>> + assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
>>> + assigned-clock-rates = <480000000>, <40000000>;
>>> + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
>>> + bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + tcb: timer@f8008000 {
>>> + compatible = "microchip,sam9x7-tcb","atmel,sama5d2-tcb", "simple-mfd", "syscon";
>>
>> Why this is simple-mfd without children?
>
> The tcb node will have each TC (Timer Counter) Block as a child when it
> is configured to be used as either one of the following modes Timer or
> Counter / Capture / PWM.
And where are these children? What does it mean "will have", in context
when? DTS is static, if you do not have here children then this is not a
simple-mfd.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC
2024-08-27 12:48 ` Krzysztof Kozlowski
@ 2024-08-28 8:25 ` Varshini.Rajendran
2024-08-28 11:49 ` Krzysztof Kozlowski
0 siblings, 1 reply; 28+ messages in thread
From: Varshini.Rajendran @ 2024-08-28 8:25 UTC (permalink / raw)
To: krzk, robh, krzk+dt, conor+dt, Nicolas.Ferre, devicetree,
linux-kernel
On 27/08/24 6:18 pm, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 27/08/2024 11:50, Varshini.Rajendran@microchip.com wrote:
>> Hi Krzysztof,
>>
>> Apologies for the delay in response.
>>
>> On 31/07/24 2:00 pm, Krzysztof Kozlowski wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> On 29/07/2024 09:09, Varshini Rajendran wrote:
>>>> Add device tree file for SAM9X7 SoC family.
>>>>
>>>> Co-developed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>>>> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>>>> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
>>>
>>> ...
>>>
>>>> +
>>>> + can1: can@f8004000 {
>>>> + compatible = "bosch,m_can";
>>>> + reg = <0xf8004000 0x100>, <0x300000 0xbc00>;
>>>> + reg-names = "m_can", "message_ram";
>>>> + interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>,
>>>> + <69 IRQ_TYPE_LEVEL_HIGH 0>;
>>>> + interrupt-names = "int0", "int1";
>>>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>;
>>>> + clock-names = "hclk", "cclk";
>>>> + assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
>>>> + assigned-clock-rates = <480000000>, <40000000>;
>>>> + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
>>>> + bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + tcb: timer@f8008000 {
>>>> + compatible = "microchip,sam9x7-tcb","atmel,sama5d2-tcb", "simple-mfd", "syscon";
>>>
>>> Why this is simple-mfd without children?
>>
>> The tcb node will have each TC (Timer Counter) Block as a child when it
>> is configured to be used as either one of the following modes Timer or
>> Counter / Capture / PWM.
>
> And where are these children? What does it mean "will have", in context
> when? DTS is static, if you do not have here children then this is not a
> simple-mfd.
>
I understand your concern. But the thing is that, each tc block is
configured as a child and it can be configured in 3 different modes with
different compatibles. In the current dts (i.e., sam9x75_curiosity
board) we don't have a use case for the tcb, hence there are no child
nodes defined. But there are instances where it can be defined in the
dts, say for a custom board using sam9x7 SoC. In that case the
simple-mfd usage is justified, if I am not wrong. If this justification
doesn't suffice, then declaring child nodes with one mode as default
which can be overridden in the dts and kept disabled in the dtsi should
be the other plausible way. Please let me know your suggestions.
> Best regards,
> Krzysztof
>
--
Thanks and Regards,
Varshini Rajendran.
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC
2024-08-28 8:25 ` Varshini.Rajendran
@ 2024-08-28 11:49 ` Krzysztof Kozlowski
2024-09-02 6:34 ` Varshini.Rajendran
0 siblings, 1 reply; 28+ messages in thread
From: Krzysztof Kozlowski @ 2024-08-28 11:49 UTC (permalink / raw)
To: Varshini.Rajendran, robh, krzk+dt, conor+dt, Nicolas.Ferre,
devicetree, linux-kernel
On 28/08/2024 10:25, Varshini.Rajendran@microchip.com wrote:
> On 27/08/24 6:18 pm, Krzysztof Kozlowski wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> On 27/08/2024 11:50, Varshini.Rajendran@microchip.com wrote:
>>> Hi Krzysztof,
>>>
>>> Apologies for the delay in response.
>>>
>>> On 31/07/24 2:00 pm, Krzysztof Kozlowski wrote:
>>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>>
>>>> On 29/07/2024 09:09, Varshini Rajendran wrote:
>>>>> Add device tree file for SAM9X7 SoC family.
>>>>>
>>>>> Co-developed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>>>>> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>>>>> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
>>>>
>>>> ...
>>>>
>>>>> +
>>>>> + can1: can@f8004000 {
>>>>> + compatible = "bosch,m_can";
>>>>> + reg = <0xf8004000 0x100>, <0x300000 0xbc00>;
>>>>> + reg-names = "m_can", "message_ram";
>>>>> + interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>,
>>>>> + <69 IRQ_TYPE_LEVEL_HIGH 0>;
>>>>> + interrupt-names = "int0", "int1";
>>>>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>;
>>>>> + clock-names = "hclk", "cclk";
>>>>> + assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
>>>>> + assigned-clock-rates = <480000000>, <40000000>;
>>>>> + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
>>>>> + bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
>>>>> + status = "disabled";
>>>>> + };
>>>>> +
>>>>> + tcb: timer@f8008000 {
>>>>> + compatible = "microchip,sam9x7-tcb","atmel,sama5d2-tcb", "simple-mfd", "syscon";
>>>>
>>>> Why this is simple-mfd without children?
>>>
>>> The tcb node will have each TC (Timer Counter) Block as a child when it
>>> is configured to be used as either one of the following modes Timer or
>>> Counter / Capture / PWM.
>>
>> And where are these children? What does it mean "will have", in context
>> when? DTS is static, if you do not have here children then this is not a
>> simple-mfd.
>>
> I understand your concern. But the thing is that, each tc block is
> configured as a child and it can be configured in 3 different modes with
> different compatibles. In the current dts (i.e., sam9x75_curiosity
> board) we don't have a use case for the tcb, hence there are no child
> nodes defined. But there are instances where it can be defined in the
> dts, say for a custom board using sam9x7 SoC. In that case the
Where are these instances? Can you point me to DTS?
> simple-mfd usage is justified, if I am not wrong. If this justification
> doesn't suffice, then declaring child nodes with one mode as default
If I understand correctly: some out of tree, non-upstream project wants
this. Sorry, but out of tree does not matter. So it is not a correct
justification.
With such argument you could claim that everything needs simple-mfd
because some broken out-of-tree code adds there children.
> which can be overridden in the dts and kept disabled in the dtsi should
> be the other plausible way. Please let me know your suggestions.
No clue, please post complete binding and complete DTS so we can review
these.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC
2024-08-28 11:49 ` Krzysztof Kozlowski
@ 2024-09-02 6:34 ` Varshini.Rajendran
0 siblings, 0 replies; 28+ messages in thread
From: Varshini.Rajendran @ 2024-09-02 6:34 UTC (permalink / raw)
To: krzk, robh, krzk+dt, conor+dt, Nicolas.Ferre, devicetree,
linux-kernel
Hi Krzysztof,
On 28/08/24 5:19 pm, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 28/08/2024 10:25, Varshini.Rajendran@microchip.com wrote:
>> On 27/08/24 6:18 pm, Krzysztof Kozlowski wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> On 27/08/2024 11:50, Varshini.Rajendran@microchip.com wrote:
>>>> Hi Krzysztof,
>>>>
>>>> Apologies for the delay in response.
>>>>
>>>> On 31/07/24 2:00 pm, Krzysztof Kozlowski wrote:
>>>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>>>
>>>>> On 29/07/2024 09:09, Varshini Rajendran wrote:
>>>>>> Add device tree file for SAM9X7 SoC family.
>>>>>>
>>>>>> Co-developed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>>>>>> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>>>>>> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
>>>>>
>>>>> ...
>>>>>
>>>>>> +
>>>>>> + can1: can@f8004000 {
>>>>>> + compatible = "bosch,m_can";
>>>>>> + reg = <0xf8004000 0x100>, <0x300000 0xbc00>;
>>>>>> + reg-names = "m_can", "message_ram";
>>>>>> + interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>,
>>>>>> + <69 IRQ_TYPE_LEVEL_HIGH 0>;
>>>>>> + interrupt-names = "int0", "int1";
>>>>>> + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>;
>>>>>> + clock-names = "hclk", "cclk";
>>>>>> + assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
>>>>>> + assigned-clock-rates = <480000000>, <40000000>;
>>>>>> + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
>>>>>> + bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
>>>>>> + status = "disabled";
>>>>>> + };
>>>>>> +
>>>>>> + tcb: timer@f8008000 {
>>>>>> + compatible = "microchip,sam9x7-tcb","atmel,sama5d2-tcb", "simple-mfd", "syscon";
>>>>>
>>>>> Why this is simple-mfd without children?
>>>>
>>>> The tcb node will have each TC (Timer Counter) Block as a child when it
>>>> is configured to be used as either one of the following modes Timer or
>>>> Counter / Capture / PWM.
>>>
>>> And where are these children? What does it mean "will have", in context
>>> when? DTS is static, if you do not have here children then this is not a
>>> simple-mfd.
>>>
>> I understand your concern. But the thing is that, each tc block is
>> configured as a child and it can be configured in 3 different modes with
>> different compatibles. In the current dts (i.e., sam9x75_curiosity
>> board) we don't have a use case for the tcb, hence there are no child
>> nodes defined. But there are instances where it can be defined in the
>> dts, say for a custom board using sam9x7 SoC. In that case the
>
> Where are these instances? Can you point me to DTS?
>
>> simple-mfd usage is justified, if I am not wrong. If this justification
>> doesn't suffice, then declaring child nodes with one mode as default
>
> If I understand correctly: some out of tree, non-upstream project wants
> this. Sorry, but out of tree does not matter. So it is not a correct
> justification.
>
Not just out of tree projects, Even upstreamed DTS files have child
nodes for this node in [1] and [2]. I guess the best way to sort this is
to add similar child nodes in this dts as well. I will add them in the
next version if that is acceptable. Please let me know.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts#:~:text=okay%22%3B%0A%7D%3B-,%26tcb0%20%7B,-timer0%3A%20timer
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts#:~:text=%3B%0A%09%7D%3B%0A%7D%3B-,%26tcb0%20%7B,-timer0%3A%20timer
> With such argument you could claim that everything needs simple-mfd
> because some broken out-of-tree code adds there children.
>
>> which can be overridden in the dts and kept disabled in the dtsi should
>> be the other plausible way. Please let me know your suggestions.
>
> No clue, please post complete binding and complete DTS so we can review
> these.
>
> Best regards,
> Krzysztof
>
--
Thanks and Regards,
Varshini Rajendran.
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v6 26/27] dt-bindings: arm: add sam9x75 curiosity board
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (11 preceding siblings ...)
2024-07-29 7:09 ` [PATCH v6 25/27] ARM: dts: at91: sam9x7: add device tree for SoC Varshini Rajendran
@ 2024-07-29 7:09 ` Varshini Rajendran
2024-07-29 7:10 ` [PATCH v6 27/27] ARM: dts: microchip: sam9x75_curiosity: " Varshini Rajendran
` (3 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:09 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, nicolas.ferre, alexandre.belloni,
claudiu.beznea, mihai.sain, varshini.rajendran, andrei.simion,
devicetree, linux-arm-kernel, linux-kernel
Add documentation for SAM9X75 Curiosity board.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
---
Changes in v6:
- Updated Reviewed-by tag
---
Documentation/devicetree/bindings/arm/atmel-at91.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml
index 82f37328cc69..7160ec80ac1b 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml
@@ -106,6 +106,12 @@ properties:
- const: microchip,sam9x60
- const: atmel,at91sam9
+ - description: Microchip SAM9X7 Evaluation Boards
+ items:
+ - const: microchip,sam9x75-curiosity
+ - const: microchip,sam9x7
+ - const: atmel,at91sam9
+
- description: Nattis v2 board with Natte v2 power board
items:
- const: axentia,nattis-2
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH v6 27/27] ARM: dts: microchip: sam9x75_curiosity: add sam9x75 curiosity board
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (12 preceding siblings ...)
2024-07-29 7:09 ` [PATCH v6 26/27] dt-bindings: arm: add sam9x75 curiosity board Varshini Rajendran
@ 2024-07-29 7:10 ` Varshini Rajendran
2024-07-29 8:17 ` [PATCH v6 00/27] Add support for sam9x7 SoC family Andrei.Simion
` (2 subsequent siblings)
16 siblings, 0 replies; 28+ messages in thread
From: Varshini Rajendran @ 2024-07-29 7:10 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, nicolas.ferre, alexandre.belloni,
claudiu.beznea, mihai.sain, varshini.rajendran, devicetree,
linux-kernel, linux-arm-kernel
Add device tree file for sam9x75 curiosity board.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
Changes in v6:
- Corrected the regulator voltages according to the schematics
---
arch/arm/boot/dts/microchip/Makefile | 3 +
.../dts/microchip/at91-sam9x75_curiosity.dts | 312 ++++++++++++++++++
2 files changed, 315 insertions(+)
create mode 100644 arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts
diff --git a/arch/arm/boot/dts/microchip/Makefile b/arch/arm/boot/dts/microchip/Makefile
index 0c45c8d17468..470fe46433a9 100644
--- a/arch/arm/boot/dts/microchip/Makefile
+++ b/arch/arm/boot/dts/microchip/Makefile
@@ -2,6 +2,7 @@
# Enables support for device-tree overlays
DTC_FLAGS_at91-sam9x60_curiosity := -@
DTC_FLAGS_at91-sam9x60ek := -@
+DTC_FLAGS_at91-sam9x75_curiosity := -@
DTC_FLAGS_at91-sama5d27_som1_ek := -@
DTC_FLAGS_at91-sama5d27_wlsom1_ek := -@
DTC_FLAGS_at91-sama5d29_curiosity := -@
@@ -60,6 +61,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
dtb-$(CONFIG_SOC_SAM9X60) += \
at91-sam9x60_curiosity.dtb \
at91-sam9x60ek.dtb
+dtb-$(CONFIG_SOC_SAM9X7) += \
+ at91-sam9x75_curiosity.dtb
dtb-$(CONFIG_SOC_SAM_V7) += \
at91-kizbox2-2.dtb \
at91-kizbox3-hs.dtb \
diff --git a/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts
new file mode 100644
index 000000000000..4cab66b317ba
--- /dev/null
+++ b/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts
@@ -0,0 +1,312 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * at91-sam9x75_curiosity.dts - Device Tree file for Microchip SAM9X75 Curiosity board
+ *
+ * Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Varshini Rajendran <varshini.rajendran@microchip.com>
+ */
+/dts-v1/;
+#include "sam9x7.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Microchip SAM9X75 Curiosity";
+ compatible = "microchip,sam9x75-curiosity", "microchip,sam9x7", "atmel,at91sam9";
+
+ aliases {
+ i2c0 = &i2c6;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_key_gpio_default>;
+
+ button-user {
+ label = "USER";
+ gpios = <&pioC 9 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_0>;
+ wakeup-source;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_red: led-red {
+ label = "red";
+ gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&pinctrl_red_led_gpio_default>;
+ };
+
+ led_green: led-green {
+ label = "green";
+ gpios = <&pioC 21 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&pinctrl_green_led_gpio_default>;
+ };
+
+ led_blue: led-blue {
+ label = "blue";
+ gpios = <&pioC 20 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&pinctrl_blue_led_gpio_default>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ memory@20000000 {
+ reg = <0x20000000 0x10000000>;
+ device_type = "memory";
+ };
+};
+
+&classd {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_classd_default>;
+ atmel,pwm-type = "diff";
+ atmel,non-overlap-time = <10>;
+ status = "okay";
+};
+
+&dbgu {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dbgu_default>;
+ status = "okay";
+};
+
+&dma0 {
+ status = "okay";
+};
+
+&flx6 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
+ status = "okay";
+};
+
+&i2c6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx6_default>;
+ i2c-analog-filter;
+ i2c-digital-filter;
+ i2c-digital-filter-width-ns = <35>;
+ status = "okay";
+
+ pmic@5b {
+ compatible = "microchip,mcp16502";
+ reg = <0x5b>;
+
+ regulators {
+ vdd_3v3: VDD_IO {
+ regulator-name = "VDD_IO";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-initial-mode = <2>;
+ regulator-allowed-modes = <2>, <4>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ regulator-mode = <4>;
+ };
+
+ regulator-state-mem {
+ regulator-mode = <4>;
+ };
+ };
+
+ vddioddr: VDD_DDR {
+ regulator-name = "VDD_DDR";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-initial-mode = <2>;
+ regulator-allowed-modes = <2>, <4>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ regulator-mode = <4>;
+ };
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-mode = <4>;
+ };
+ };
+
+ vddcore: VDD_CORE {
+ regulator-name = "VDD_CORE";
+ regulator-min-microvolt = <1150000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-initial-mode = <2>;
+ regulator-allowed-modes = <2>, <4>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ regulator-mode = <4>;
+ };
+
+ regulator-state-mem {
+ regulator-mode = <4>;
+ };
+ };
+
+ dcdc4: VDD_OTHER {
+ regulator-name = "VDD_OTHER";
+ regulator-min-microvolt = <1150000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-initial-mode = <2>;
+ regulator-allowed-modes = <2>, <4>;
+ regulator-ramp-delay = <3125>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ regulator-mode = <4>;
+ };
+
+ regulator-state-mem {
+ regulator-mode = <4>;
+ };
+ };
+
+ vldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vldo2: LDO2 {
+ regulator-name = "LDO2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2s {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2s_default>;
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&main_xtal {
+ clock-frequency = <24000000>;
+};
+
+&pinctrl {
+ classd {
+ pinctrl_classd_default: classd-default {
+ atmel,pins =
+ <AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_PULL_DOWN>;
+ };
+ };
+
+ dbgu {
+ pinctrl_dbgu_default: dbgu-default {
+ atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ flexcom {
+ pinctrl_flx6_default: flx6-default {
+ atmel,pins =
+ <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ gpio-keys {
+ pinctrl_key_gpio_default: key-gpio-default {
+ atmel,pins = <AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ };
+
+ i2s {
+ pinctrl_i2s_default: i2s-default {
+ atmel,pins =
+ <AT91_PIOB 26 AT91_PERIPH_D AT91_PINCTRL_NONE>, /* I2SCK */
+ <AT91_PIOB 15 AT91_PERIPH_D AT91_PINCTRL_NONE>, /* I2SWS */
+ <AT91_PIOB 16 AT91_PERIPH_D AT91_PINCTRL_NONE>, /* I2SDIN */
+ <AT91_PIOB 17 AT91_PERIPH_D AT91_PINCTRL_NONE>, /* I2SDOUT */
+ <AT91_PIOB 25 AT91_PERIPH_D AT91_PINCTRL_NONE>; /* I2SMCK */
+ };
+ };
+
+ leds {
+ pinctrl_red_led_gpio_default: red-led-gpio-default {
+ atmel,pins = <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ pinctrl_green_led_gpio_default: green-led-gpio-default {
+ atmel,pins = <AT91_PIOC 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ pinctrl_blue_led_gpio_default: blue-led-gpio-default {
+ atmel,pins = <AT91_PIOC 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ };
+
+ sdmmc0 {
+ pinctrl_sdmmc0_default: sdmmc0-default {
+ atmel,pins =
+ <AT91_PIOA 2 AT91_PERIPH_A (AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA2 CK periph A with pullup */
+ <AT91_PIOA 1 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA1 CMD periph A with pullup */
+ <AT91_PIOA 0 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA0 DAT0 periph A */
+ <AT91_PIOA 3 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA3 DAT1 periph A with pullup */
+ <AT91_PIOA 4 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA4 DAT2 periph A with pullup */
+ <AT91_PIOA 5 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>; /* PA5 DAT3 periph A with pullup */
+ };
+ };
+}; /* pinctrl */
+
+&rtt {
+ atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc0_default>;
+ cd-gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ status = "okay";
+};
+
+&slow_xtal {
+ clock-frequency = <32768>;
+};
+
+&poweroff {
+ debounce-delay-us = <976>;
+ status = "okay";
+
+ input@0 {
+ reg = <0>;
+ };
+};
+
+&trng {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH v6 00/27] Add support for sam9x7 SoC family
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (13 preceding siblings ...)
2024-07-29 7:10 ` [PATCH v6 27/27] ARM: dts: microchip: sam9x75_curiosity: " Varshini Rajendran
@ 2024-07-29 8:17 ` Andrei.Simion
2024-07-29 8:57 ` Varshini.Rajendran
2024-07-29 18:52 ` Rob Herring (Arm)
2024-08-09 6:24 ` claudiu beznea
16 siblings, 1 reply; 28+ messages in thread
From: Andrei.Simion @ 2024-07-29 8:17 UTC (permalink / raw)
To: Varshini.Rajendran, robh, krzk+dt, conor+dt, Nicolas.Ferre,
alexandre.belloni, claudiu.beznea, mturquette, sboyd, tglx, lee,
sre, p.zabel, richard.genoud, radu_nicolae.pirea, gregkh,
jirislaby, linux, matthias.bgg, angelogioacchino.delregno,
ychuang3, schung, Mihai.Sain, arnd, Jason, Dharma.B, rdunlap,
devicetree, linux-arm-kernel, linux-kernel, linux-clk, linux-pm,
linux-spi, linux-serial, linux-mediatek
On 29.07.2024 09:56, Varshini Rajendran wrote:
> This patch series adds support for the new SoC family - sam9x7.
> - The device tree, configs and drivers are added
> - Clock driver for sam9x7 is added
> - Support for basic peripherals is added
> - Target board SAM9X75 Curiosity is added
>
> Changes in v6:
> --------------
>
> - Addressed all the review comments in the patches
> - Picked up all Acked-by and Reviewed-by tags
> - Reverted the IRQ patch to that of version 3 of the same series
> - All the specific changes are captured in the corresponding patches
>
> Changes in v5:
> --------------
>
> - Addressed all the review comments in the patches
> - Picked up all Acked-by and Reviewed-by tags
> - Dropped applied patches from the series
> - Addressed the ABI breakage reported in the IRQ patch
> - All the specific changes are captured in the corresponding patches
>
> Changes in v4:
> --------------
>
> - Addressed all the review comments in the patches
> - Picked up all Acked-by and Reviewed-by tags
> - Dropped applied patches from the series
> - Added pwm node and related dt binding documentation
> - Added support for exporting some clocks to DT
> - Dropped USB related patches and changes. See NOTE.
> - All the specific changes are captured in the corresponding patches
>
> NOTE: Owing to the discussion here
> https://lore.kernel.org/linux-devicetree/CAL_JsqJ9PrX6fj-EbffeJce09MXs=B7t+KS_kOinxaRx38=WxA@mail.gmail.com/
> the USB related changes are dropped from this series in order to enable
> us to work on the mentioned issues before adding new compatibles as
> said. The issues/warnings will be addressed in subsequent patches.
> After which the USB related support for sam9x7 SoCs will be added. Hope
> this works out fine.
>
> Changes in v3:
> --------------
>
> - Fixed the DT documentation errors pointed out in v2.
> - Dropped Acked-by tag in tcb DT doc patch as it had to be adapted
> according to sam9x7 correctly.
> - Picked by the previously missed tags.
> - Dropped this patch "dt-bindings: usb: generic-ehci: Document clock-names
> property" as the warning was not found while validating DT-schema for
> at91-sam9x75_curiosity.dtb.
> - Dropped redundant words in the commit message.
> - Fixed the CHECK_DTBS warnings validated against
> at91-sam9x75_curiosity.dtb.
> - Renamed dt nodes according to naming convention.
> - Dropped unwanted status property in dts.
> - Removed nodes that are not in use from the board dts.
> - Removed spi DT doc patch from the series as it was already applied
> and a fix patch was applied subsequently. Added a patch to remove the
> compatible to adapt sam9x7.
> - Added sam9x7 compatibles in usb dt documentation.
>
>
> Changes in v2:
> --------------
>
> - Added sam9x7 specific compatibles in DT with fallbacks
> - Documented all the newly added DT compatible strings
> - Added device tree for the target board sam9x75 curiosity and
> documented the same in the DT bindings documentation
> - Removed the dt nodes that are not supported at the moment
> - Removed the configs added by previous version that are not supported
> at the moment
> - Fixed all the corrections in the commit message
> - Changed all the instances of copyright year to 2023
> - Added sam9x7 flag in PIT64B configuration
> - Moved macro definitions to header file
> - Added another divider in mck characteristics in the pmc driver
> - Fixed the memory leak in the pmc driver
> - Dropped patches that are no longer needed
> - Picked up Acked-by and Reviewed-by tags
>
>
> Hari Prasath (1):
> irqchip/atmel-aic5: Add support for sam9x7 aic
>
> Varshini Rajendran (26):
> dt-bindings: atmel-sysreg: add sam9x7
> dt-bindings: mfd: syscon: add microchip's sam9x7 sfr
> dt-bindings: atmel-ssc: add microchip,sam9x7-ssc
> dt-bindings: serial: atmel,at91-usart: add compatible for sam9x7.
> dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x7 compatible
> ARM: at91: pm: add support for sam9x7 SoC family
> ARM: at91: pm: add sam9x7 SoC init config
> ARM: at91: add support in SoC driver for new sam9x7
> dt-bindings: clocks: atmel,at91sam9x5-sckc: add sam9x7
> dt-bindings: clocks: atmel,at91rm9200-pmc: add sam9x7 clock controller
> clk: at91: clk-sam9x60-pll: re-factor to support individual core freq
> outputs
> clk: at91: sam9x7: add support for HW PLL freq dividers
> clk: at91: sama7g5: move mux table macros to header file
> dt-bindings: clock: at91: Allow PLLs to be exported and referenced in
> DT
> clk: at91: sam9x7: add sam9x7 pmc driver
> dt-bindings: interrupt-controller: Add support for sam9x7 aic
> power: reset: at91-poweroff: lookup for proper pmc dt node for sam9x7
> power: reset: at91-reset: add reset support for sam9x7 SoC
> power: reset: at91-reset: add sdhwc support for sam9x7 SoC
> dt-bindings: reset: atmel,at91sam9260-reset: add sam9x7
> dt-bindings: power: reset: atmel,sama5d2-shdwc: add sam9x7
> ARM: at91: Kconfig: add config flag for SAM9X7 SoC
> ARM: configs: at91: enable config flags for sam9x7 SoC family
> ARM: dts: at91: sam9x7: add device tree for SoC
> dt-bindings: arm: add sam9x75 curiosity board
> ARM: dts: microchip: sam9x75_curiosity: add sam9x75 curiosity board
>
> .../devicetree/bindings/arm/atmel-at91.yaml | 6 +
> .../devicetree/bindings/arm/atmel-sysregs.txt | 6 +-
> .../bindings/clock/atmel,at91rm9200-pmc.yaml | 2 +
> .../bindings/clock/atmel,at91sam9x5-sckc.yaml | 4 +-
> .../interrupt-controller/atmel,aic.yaml | 1 +
> .../devicetree/bindings/mfd/syscon.yaml | 188 +--
> .../devicetree/bindings/misc/atmel-ssc.txt | 1 +
> .../power/reset/atmel,sama5d2-shdwc.yaml | 3 +
> .../reset/atmel,at91sam9260-reset.yaml | 4 +
> .../bindings/serial/atmel,at91-usart.yaml | 9 +-
> .../soc/microchip/atmel,at91rm9200-tcb.yaml | 20 +-
> arch/arm/boot/dts/microchip/Makefile | 3 +
> .../dts/microchip/at91-sam9x75_curiosity.dts | 312 +++++
> arch/arm/boot/dts/microchip/sam9x7.dtsi | 1226 +++++++++++++++++
Hi,
Sorry for disturbing, I don't see the patch where you add arch/arm/boot/dts/microchip/sam9x7.dtsi
In linux-next this file is not applied yet:
:~$ find arch/arm/boot/dts/microchip | grep -i sam9x7.dtsi | wc -l
0
Best regards,
Andrei
> arch/arm/configs/at91_dt_defconfig | 1 +
> arch/arm/mach-at91/Kconfig | 22 +-
> arch/arm/mach-at91/Makefile | 1 +
> arch/arm/mach-at91/generic.h | 2 +
> arch/arm/mach-at91/pm.c | 29 +
> arch/arm/mach-at91/sam9x7.c | 33 +
> drivers/clk/at91/Makefile | 1 +
> drivers/clk/at91/clk-sam9x60-pll.c | 42 +-
> drivers/clk/at91/pmc.h | 18 +
> drivers/clk/at91/sam9x60.c | 7 +
> drivers/clk/at91/sam9x7.c | 946 +++++++++++++
> drivers/clk/at91/sama7g5.c | 42 +-
> drivers/irqchip/irq-atmel-aic5.c | 10 +
> drivers/power/reset/Kconfig | 4 +-
> drivers/power/reset/at91-sama5d2_shdwc.c | 1 +
> drivers/soc/atmel/soc.c | 23 +
> drivers/soc/atmel/soc.h | 9 +
> include/dt-bindings/clock/at91.h | 4 +
> 32 files changed, 2840 insertions(+), 140 deletions(-)
> create mode 100644 arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts
> create mode 100644 arch/arm/boot/dts/microchip/sam9x7.dtsi
> create mode 100644 arch/arm/mach-at91/sam9x7.c
> create mode 100644 drivers/clk/at91/sam9x7.c
>
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v6 00/27] Add support for sam9x7 SoC family
2024-07-29 8:17 ` [PATCH v6 00/27] Add support for sam9x7 SoC family Andrei.Simion
@ 2024-07-29 8:57 ` Varshini.Rajendran
0 siblings, 0 replies; 28+ messages in thread
From: Varshini.Rajendran @ 2024-07-29 8:57 UTC (permalink / raw)
To: Andrei.Simion
Cc: robh, krzk+dt, conor+dt, Nicolas.Ferre, alexandre.belloni,
claudiu.beznea, mturquette, sboyd, tglx, lee, sre, p.zabel,
richard.genoud, radu_nicolae.pirea, gregkh, jirislaby, linux,
matthias.bgg, angelogioacchino.delregno, ychuang3, schung,
Mihai.Sain, arnd, Jason, Dharma.B, rdunlap, devicetree,
linux-arm-kernel, linux-kernel, linux-clk, linux-pm, linux-spi,
linux-serial, linux-mediatek
On 29/07/24 1:47 pm, Andrei Simion - M76677 wrote:
> On 29.07.2024 09:56, Varshini Rajendran wrote:
>> This patch series adds support for the new SoC family - sam9x7.
>> - The device tree, configs and drivers are added
>> - Clock driver for sam9x7 is added
>> - Support for basic peripherals is added
>> - Target board SAM9X75 Curiosity is added
>>
>> Changes in v6:
>> --------------
>>
>> - Addressed all the review comments in the patches
>> - Picked up all Acked-by and Reviewed-by tags
>> - Reverted the IRQ patch to that of version 3 of the same series
>> - All the specific changes are captured in the corresponding patches
>>
>> Changes in v5:
>> --------------
>>
>> - Addressed all the review comments in the patches
>> - Picked up all Acked-by and Reviewed-by tags
>> - Dropped applied patches from the series
>> - Addressed the ABI breakage reported in the IRQ patch
>> - All the specific changes are captured in the corresponding patches
>>
>> Changes in v4:
>> --------------
>>
>> - Addressed all the review comments in the patches
>> - Picked up all Acked-by and Reviewed-by tags
>> - Dropped applied patches from the series
>> - Added pwm node and related dt binding documentation
>> - Added support for exporting some clocks to DT
>> - Dropped USB related patches and changes. See NOTE.
>> - All the specific changes are captured in the corresponding patches
>>
>> NOTE: Owing to the discussion here
>> https://lore.kernel.org/linux-devicetree/CAL_JsqJ9PrX6fj-EbffeJce09MXs=B7t+KS_kOinxaRx38=WxA@mail.gmail.com/
>> the USB related changes are dropped from this series in order to enable
>> us to work on the mentioned issues before adding new compatibles as
>> said. The issues/warnings will be addressed in subsequent patches.
>> After which the USB related support for sam9x7 SoCs will be added. Hope
>> this works out fine.
>>
>> Changes in v3:
>> --------------
>>
>> - Fixed the DT documentation errors pointed out in v2.
>> - Dropped Acked-by tag in tcb DT doc patch as it had to be adapted
>> according to sam9x7 correctly.
>> - Picked by the previously missed tags.
>> - Dropped this patch "dt-bindings: usb: generic-ehci: Document clock-names
>> property" as the warning was not found while validating DT-schema for
>> at91-sam9x75_curiosity.dtb.
>> - Dropped redundant words in the commit message.
>> - Fixed the CHECK_DTBS warnings validated against
>> at91-sam9x75_curiosity.dtb.
>> - Renamed dt nodes according to naming convention.
>> - Dropped unwanted status property in dts.
>> - Removed nodes that are not in use from the board dts.
>> - Removed spi DT doc patch from the series as it was already applied
>> and a fix patch was applied subsequently. Added a patch to remove the
>> compatible to adapt sam9x7.
>> - Added sam9x7 compatibles in usb dt documentation.
>>
>>
>> Changes in v2:
>> --------------
>>
>> - Added sam9x7 specific compatibles in DT with fallbacks
>> - Documented all the newly added DT compatible strings
>> - Added device tree for the target board sam9x75 curiosity and
>> documented the same in the DT bindings documentation
>> - Removed the dt nodes that are not supported at the moment
>> - Removed the configs added by previous version that are not supported
>> at the moment
>> - Fixed all the corrections in the commit message
>> - Changed all the instances of copyright year to 2023
>> - Added sam9x7 flag in PIT64B configuration
>> - Moved macro definitions to header file
>> - Added another divider in mck characteristics in the pmc driver
>> - Fixed the memory leak in the pmc driver
>> - Dropped patches that are no longer needed
>> - Picked up Acked-by and Reviewed-by tags
>>
>>
>> Hari Prasath (1):
>> irqchip/atmel-aic5: Add support for sam9x7 aic
>>
>> Varshini Rajendran (26):
>> dt-bindings: atmel-sysreg: add sam9x7
>> dt-bindings: mfd: syscon: add microchip's sam9x7 sfr
>> dt-bindings: atmel-ssc: add microchip,sam9x7-ssc
>> dt-bindings: serial: atmel,at91-usart: add compatible for sam9x7.
>> dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x7 compatible
>> ARM: at91: pm: add support for sam9x7 SoC family
>> ARM: at91: pm: add sam9x7 SoC init config
>> ARM: at91: add support in SoC driver for new sam9x7
>> dt-bindings: clocks: atmel,at91sam9x5-sckc: add sam9x7
>> dt-bindings: clocks: atmel,at91rm9200-pmc: add sam9x7 clock controller
>> clk: at91: clk-sam9x60-pll: re-factor to support individual core freq
>> outputs
>> clk: at91: sam9x7: add support for HW PLL freq dividers
>> clk: at91: sama7g5: move mux table macros to header file
>> dt-bindings: clock: at91: Allow PLLs to be exported and referenced in
>> DT
>> clk: at91: sam9x7: add sam9x7 pmc driver
>> dt-bindings: interrupt-controller: Add support for sam9x7 aic
>> power: reset: at91-poweroff: lookup for proper pmc dt node for sam9x7
>> power: reset: at91-reset: add reset support for sam9x7 SoC
>> power: reset: at91-reset: add sdhwc support for sam9x7 SoC
>> dt-bindings: reset: atmel,at91sam9260-reset: add sam9x7
>> dt-bindings: power: reset: atmel,sama5d2-shdwc: add sam9x7
>> ARM: at91: Kconfig: add config flag for SAM9X7 SoC
>> ARM: configs: at91: enable config flags for sam9x7 SoC family
>> ARM: dts: at91: sam9x7: add device tree for SoC
>> dt-bindings: arm: add sam9x75 curiosity board
>> ARM: dts: microchip: sam9x75_curiosity: add sam9x75 curiosity board
>>
>> .../devicetree/bindings/arm/atmel-at91.yaml | 6 +
>> .../devicetree/bindings/arm/atmel-sysregs.txt | 6 +-
>> .../bindings/clock/atmel,at91rm9200-pmc.yaml | 2 +
>> .../bindings/clock/atmel,at91sam9x5-sckc.yaml | 4 +-
>> .../interrupt-controller/atmel,aic.yaml | 1 +
>> .../devicetree/bindings/mfd/syscon.yaml | 188 +--
>> .../devicetree/bindings/misc/atmel-ssc.txt | 1 +
>> .../power/reset/atmel,sama5d2-shdwc.yaml | 3 +
>> .../reset/atmel,at91sam9260-reset.yaml | 4 +
>> .../bindings/serial/atmel,at91-usart.yaml | 9 +-
>> .../soc/microchip/atmel,at91rm9200-tcb.yaml | 20 +-
>> arch/arm/boot/dts/microchip/Makefile | 3 +
>> .../dts/microchip/at91-sam9x75_curiosity.dts | 312 +++++
>> arch/arm/boot/dts/microchip/sam9x7.dtsi | 1226 +++++++++++++++++
>
> Hi,
>
> Sorry for disturbing, I don't see the patch where you add arch/arm/boot/dts/microchip/sam9x7.dtsi
> In linux-next this file is not applied yet:
> :~$ find arch/arm/boot/dts/microchip | grep -i sam9x7.dtsi | wc -l
> 0
>
Hi Andrei,
I don't quite get your query. I am answering in a presumption that you
are enquiring about the sam9x7.dtsi file presence.
This file arch/arm/boot/dts/microchip/sam9x7.dtsi is being added in this
very series by patch 25/27. It is not yet applied, hence will not be
available in any of the upstream repos.
(P.S.: Sorry for the noise and the wide audience)
> Best regards,
> Andrei
>
>> arch/arm/configs/at91_dt_defconfig | 1 +
>> arch/arm/mach-at91/Kconfig | 22 +-
>> arch/arm/mach-at91/Makefile | 1 +
>> arch/arm/mach-at91/generic.h | 2 +
>> arch/arm/mach-at91/pm.c | 29 +
>> arch/arm/mach-at91/sam9x7.c | 33 +
>> drivers/clk/at91/Makefile | 1 +
>> drivers/clk/at91/clk-sam9x60-pll.c | 42 +-
>> drivers/clk/at91/pmc.h | 18 +
>> drivers/clk/at91/sam9x60.c | 7 +
>> drivers/clk/at91/sam9x7.c | 946 +++++++++++++
>> drivers/clk/at91/sama7g5.c | 42 +-
>> drivers/irqchip/irq-atmel-aic5.c | 10 +
>> drivers/power/reset/Kconfig | 4 +-
>> drivers/power/reset/at91-sama5d2_shdwc.c | 1 +
>> drivers/soc/atmel/soc.c | 23 +
>> drivers/soc/atmel/soc.h | 9 +
>> include/dt-bindings/clock/at91.h | 4 +
>> 32 files changed, 2840 insertions(+), 140 deletions(-)
>> create mode 100644 arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts
>> create mode 100644 arch/arm/boot/dts/microchip/sam9x7.dtsi
>> create mode 100644 arch/arm/mach-at91/sam9x7.c
>> create mode 100644 drivers/clk/at91/sam9x7.c
>>
--
Thanks and Regards,
Varshini Rajendran.
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v6 00/27] Add support for sam9x7 SoC family
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (14 preceding siblings ...)
2024-07-29 8:17 ` [PATCH v6 00/27] Add support for sam9x7 SoC family Andrei.Simion
@ 2024-07-29 18:52 ` Rob Herring (Arm)
2024-08-09 6:24 ` claudiu beznea
16 siblings, 0 replies; 28+ messages in thread
From: Rob Herring (Arm) @ 2024-07-29 18:52 UTC (permalink / raw)
To: Varshini Rajendran
Cc: Jason, linux, conor+dt, sre, richard.genoud, sboyd, linux-kernel,
linux-clk, krzk+dt, andrei.simion, linux-arm-kernel, linux-serial,
linux-spi, schung, jirislaby, devicetree, dharma.b,
angelogioacchino.delregno, lee, mturquette, matthias.bgg, tglx,
rdunlap, radu_nicolae.pirea, gregkh, nicolas.ferre, ychuang3,
claudiu.beznea, linux-pm, alexandre.belloni, arnd, mihai.sain,
linux-mediatek, p.zabel
On Mon, 29 Jul 2024 12:26:03 +0530, Varshini Rajendran wrote:
> This patch series adds support for the new SoC family - sam9x7.
> - The device tree, configs and drivers are added
> - Clock driver for sam9x7 is added
> - Support for basic peripherals is added
> - Target board SAM9X75 Curiosity is added
>
> Changes in v6:
> --------------
>
> - Addressed all the review comments in the patches
> - Picked up all Acked-by and Reviewed-by tags
> - Reverted the IRQ patch to that of version 3 of the same series
> - All the specific changes are captured in the corresponding patches
>
> Changes in v5:
> --------------
>
> - Addressed all the review comments in the patches
> - Picked up all Acked-by and Reviewed-by tags
> - Dropped applied patches from the series
> - Addressed the ABI breakage reported in the IRQ patch
> - All the specific changes are captured in the corresponding patches
>
> Changes in v4:
> --------------
>
> - Addressed all the review comments in the patches
> - Picked up all Acked-by and Reviewed-by tags
> - Dropped applied patches from the series
> - Added pwm node and related dt binding documentation
> - Added support for exporting some clocks to DT
> - Dropped USB related patches and changes. See NOTE.
> - All the specific changes are captured in the corresponding patches
>
> NOTE: Owing to the discussion here
> https://lore.kernel.org/linux-devicetree/CAL_JsqJ9PrX6fj-EbffeJce09MXs=B7t+KS_kOinxaRx38=WxA@mail.gmail.com/
> the USB related changes are dropped from this series in order to enable
> us to work on the mentioned issues before adding new compatibles as
> said. The issues/warnings will be addressed in subsequent patches.
> After which the USB related support for sam9x7 SoCs will be added. Hope
> this works out fine.
>
> Changes in v3:
> --------------
>
> - Fixed the DT documentation errors pointed out in v2.
> - Dropped Acked-by tag in tcb DT doc patch as it had to be adapted
> according to sam9x7 correctly.
> - Picked by the previously missed tags.
> - Dropped this patch "dt-bindings: usb: generic-ehci: Document clock-names
> property" as the warning was not found while validating DT-schema for
> at91-sam9x75_curiosity.dtb.
> - Dropped redundant words in the commit message.
> - Fixed the CHECK_DTBS warnings validated against
> at91-sam9x75_curiosity.dtb.
> - Renamed dt nodes according to naming convention.
> - Dropped unwanted status property in dts.
> - Removed nodes that are not in use from the board dts.
> - Removed spi DT doc patch from the series as it was already applied
> and a fix patch was applied subsequently. Added a patch to remove the
> compatible to adapt sam9x7.
> - Added sam9x7 compatibles in usb dt documentation.
>
>
> Changes in v2:
> --------------
>
> - Added sam9x7 specific compatibles in DT with fallbacks
> - Documented all the newly added DT compatible strings
> - Added device tree for the target board sam9x75 curiosity and
> documented the same in the DT bindings documentation
> - Removed the dt nodes that are not supported at the moment
> - Removed the configs added by previous version that are not supported
> at the moment
> - Fixed all the corrections in the commit message
> - Changed all the instances of copyright year to 2023
> - Added sam9x7 flag in PIT64B configuration
> - Moved macro definitions to header file
> - Added another divider in mck characteristics in the pmc driver
> - Fixed the memory leak in the pmc driver
> - Dropped patches that are no longer needed
> - Picked up Acked-by and Reviewed-by tags
>
>
> Hari Prasath (1):
> irqchip/atmel-aic5: Add support for sam9x7 aic
>
> Varshini Rajendran (26):
> dt-bindings: atmel-sysreg: add sam9x7
> dt-bindings: mfd: syscon: add microchip's sam9x7 sfr
> dt-bindings: atmel-ssc: add microchip,sam9x7-ssc
> dt-bindings: serial: atmel,at91-usart: add compatible for sam9x7.
> dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x7 compatible
> ARM: at91: pm: add support for sam9x7 SoC family
> ARM: at91: pm: add sam9x7 SoC init config
> ARM: at91: add support in SoC driver for new sam9x7
> dt-bindings: clocks: atmel,at91sam9x5-sckc: add sam9x7
> dt-bindings: clocks: atmel,at91rm9200-pmc: add sam9x7 clock controller
> clk: at91: clk-sam9x60-pll: re-factor to support individual core freq
> outputs
> clk: at91: sam9x7: add support for HW PLL freq dividers
> clk: at91: sama7g5: move mux table macros to header file
> dt-bindings: clock: at91: Allow PLLs to be exported and referenced in
> DT
> clk: at91: sam9x7: add sam9x7 pmc driver
> dt-bindings: interrupt-controller: Add support for sam9x7 aic
> power: reset: at91-poweroff: lookup for proper pmc dt node for sam9x7
> power: reset: at91-reset: add reset support for sam9x7 SoC
> power: reset: at91-reset: add sdhwc support for sam9x7 SoC
> dt-bindings: reset: atmel,at91sam9260-reset: add sam9x7
> dt-bindings: power: reset: atmel,sama5d2-shdwc: add sam9x7
> ARM: at91: Kconfig: add config flag for SAM9X7 SoC
> ARM: configs: at91: enable config flags for sam9x7 SoC family
> ARM: dts: at91: sam9x7: add device tree for SoC
> dt-bindings: arm: add sam9x75 curiosity board
> ARM: dts: microchip: sam9x75_curiosity: add sam9x75 curiosity board
>
> .../devicetree/bindings/arm/atmel-at91.yaml | 6 +
> .../devicetree/bindings/arm/atmel-sysregs.txt | 6 +-
> .../bindings/clock/atmel,at91rm9200-pmc.yaml | 2 +
> .../bindings/clock/atmel,at91sam9x5-sckc.yaml | 4 +-
> .../interrupt-controller/atmel,aic.yaml | 1 +
> .../devicetree/bindings/mfd/syscon.yaml | 188 +--
> .../devicetree/bindings/misc/atmel-ssc.txt | 1 +
> .../power/reset/atmel,sama5d2-shdwc.yaml | 3 +
> .../reset/atmel,at91sam9260-reset.yaml | 4 +
> .../bindings/serial/atmel,at91-usart.yaml | 9 +-
> .../soc/microchip/atmel,at91rm9200-tcb.yaml | 20 +-
> arch/arm/boot/dts/microchip/Makefile | 3 +
> .../dts/microchip/at91-sam9x75_curiosity.dts | 312 +++++
> arch/arm/boot/dts/microchip/sam9x7.dtsi | 1226 +++++++++++++++++
> arch/arm/configs/at91_dt_defconfig | 1 +
> arch/arm/mach-at91/Kconfig | 22 +-
> arch/arm/mach-at91/Makefile | 1 +
> arch/arm/mach-at91/generic.h | 2 +
> arch/arm/mach-at91/pm.c | 29 +
> arch/arm/mach-at91/sam9x7.c | 33 +
> drivers/clk/at91/Makefile | 1 +
> drivers/clk/at91/clk-sam9x60-pll.c | 42 +-
> drivers/clk/at91/pmc.h | 18 +
> drivers/clk/at91/sam9x60.c | 7 +
> drivers/clk/at91/sam9x7.c | 946 +++++++++++++
> drivers/clk/at91/sama7g5.c | 42 +-
> drivers/irqchip/irq-atmel-aic5.c | 10 +
> drivers/power/reset/Kconfig | 4 +-
> drivers/power/reset/at91-sama5d2_shdwc.c | 1 +
> drivers/soc/atmel/soc.c | 23 +
> drivers/soc/atmel/soc.h | 9 +
> include/dt-bindings/clock/at91.h | 4 +
> 32 files changed, 2840 insertions(+), 140 deletions(-)
> create mode 100644 arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts
> create mode 100644 arch/arm/boot/dts/microchip/sam9x7.dtsi
> create mode 100644 arch/arm/mach-at91/sam9x7.c
> create mode 100644 drivers/clk/at91/sam9x7.c
>
> --
> 2.25.1
>
>
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y microchip/at91-sam9x75_curiosity.dtb' for 20240729065603.1986074-1-varshini.rajendran@microchip.com:
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /ahb/mmc@80000000: failed to match any schema with compatible: ['microchip,sam9x7-sdhci', 'microchip,sam9x60-sdhci']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /ahb/mmc@80000000: failed to match any schema with compatible: ['microchip,sam9x7-sdhci', 'microchip,sam9x60-sdhci']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /ahb/mmc@90000000: failed to match any schema with compatible: ['microchip,sam9x7-sdhci', 'microchip,sam9x60-sdhci']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /ahb/mmc@90000000: failed to match any schema with compatible: ['microchip,sam9x7-sdhci', 'microchip,sam9x60-sdhci']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/dma-controller@f0008000: failed to match any schema with compatible: ['microchip,sam9x7-dma', 'atmel,sama5d4-dma']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/dma-controller@f0008000: failed to match any schema with compatible: ['microchip,sam9x7-dma', 'atmel,sama5d4-dma']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/ssc@f0010000: failed to match any schema with compatible: ['microchip,sam9x7-ssc', 'atmel,at91sam9g45-ssc']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/ssc@f0010000: failed to match any schema with compatible: ['microchip,sam9x7-ssc', 'atmel,at91sam9g45-ssc']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/timer@f0028000: failed to match any schema with compatible: ['microchip,sam9x7-pit64b', 'microchip,sam9x60-pit64b']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/timer@f0028000: failed to match any schema with compatible: ['microchip,sam9x7-pit64b', 'microchip,sam9x60-pit64b']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/timer@f0040000: failed to match any schema with compatible: ['microchip,sam9x7-pit64b', 'microchip,sam9x60-pit64b']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/timer@f0040000: failed to match any schema with compatible: ['microchip,sam9x7-pit64b', 'microchip,sam9x60-pit64b']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/matrix@ffffde00: failed to match any schema with compatible: ['microchip,sam9x7-matrix', 'atmel,at91sam9x5-matrix', 'syscon']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/matrix@ffffde00: failed to match any schema with compatible: ['microchip,sam9x7-matrix', 'atmel,at91sam9x5-matrix', 'syscon']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/ecc-engine@ffffe000: failed to match any schema with compatible: ['microchip,sam9x7-pmecc', 'atmel,at91sam9g45-pmecc']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/ecc-engine@ffffe000: failed to match any schema with compatible: ['microchip,sam9x7-pmecc', 'atmel,at91sam9g45-pmecc']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/mpddrc@ffffe800: failed to match any schema with compatible: ['microchip,sam9x7-ddramc', 'atmel,sama5d3-ddramc']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/mpddrc@ffffe800: failed to match any schema with compatible: ['microchip,sam9x7-ddramc', 'atmel,sama5d3-ddramc']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/smc@ffffea00: failed to match any schema with compatible: ['microchip,sam9x7-smc', 'atmel,at91sam9260-smc', 'syscon']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/smc@ffffea00: failed to match any schema with compatible: ['microchip,sam9x7-smc', 'atmel,at91sam9260-smc', 'syscon']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/pinctrl@fffff400: failed to match any schema with compatible: ['microchip,sam9x7-pinctrl', 'microchip,sam9x60-pinctrl', 'simple-mfd']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/pinctrl@fffff400: failed to match any schema with compatible: ['microchip,sam9x7-pinctrl', 'microchip,sam9x60-pinctrl', 'simple-mfd']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/syscon@fffffe60: failed to match any schema with compatible: ['microchip,sam9x7-gpbr', 'atmel,at91sam9260-gpbr', 'syscon']
arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dtb: /apb/syscon@fffffe60: failed to match any schema with compatible: ['microchip,sam9x7-gpbr', 'atmel,at91sam9260-gpbr', 'syscon']
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v6 00/27] Add support for sam9x7 SoC family
2024-07-29 6:56 [PATCH v6 00/27] Add support for sam9x7 SoC family Varshini Rajendran
` (15 preceding siblings ...)
2024-07-29 18:52 ` Rob Herring (Arm)
@ 2024-08-09 6:24 ` claudiu beznea
16 siblings, 0 replies; 28+ messages in thread
From: claudiu beznea @ 2024-08-09 6:24 UTC (permalink / raw)
To: Varshini Rajendran, robh, krzk+dt, conor+dt, nicolas.ferre,
alexandre.belloni, mturquette, sboyd, tglx, lee, sre, p.zabel,
richard.genoud, radu_nicolae.pirea, gregkh, jirislaby, linux,
matthias.bgg, angelogioacchino.delregno, ychuang3, schung,
mihai.sain, andrei.simion, arnd, Jason, dharma.b, rdunlap,
devicetree, linux-arm-kernel, linux-kernel, linux-clk, linux-pm,
linux-spi, linux-serial, linux-mediatek
On 29.07.2024 09:56, Varshini Rajendran wrote:
> This patch series adds support for the new SoC family - sam9x7.
> - The device tree, configs and drivers are added
> - Clock driver for sam9x7 is added
> - Support for basic peripherals is added
> - Target board SAM9X75 Curiosity is added
[ ... ]
>
> Changes in v6:
> --------------
>
> - Addressed all the review comments in the patches
> - Picked up all Acked-by and Reviewed-by tags
> - Reverted the IRQ patch to that of version 3 of the same series
> - All the specific changes are captured in the corresponding patches
>
[ ... ]
>
> Varshini Rajendran (26):
> dt-bindings: atmel-sysreg: add sam9x7
> ARM: at91: pm: add support for sam9x7 SoC family
> ARM: at91: pm: add sam9x7 SoC init config
> ARM: at91: add support in SoC driver for new sam9x7
Applied to at91-soc, thanks!
> dt-bindings: clocks: atmel,at91sam9x5-sckc: add sam9x7
> dt-bindings: clocks: atmel,at91rm9200-pmc: add sam9x7 clock controller
> clk: at91: clk-sam9x60-pll: re-factor to support individual core freq
> outputs
> clk: at91: sam9x7: add support for HW PLL freq dividers
> clk: at91: sama7g5: move mux table macros to header file
> dt-bindings: clock: at91: Allow PLLs to be exported and referenced in
> DT
> clk: at91: sam9x7: add sam9x7 pmc driver
Applied to clk-microchip, thanks!
> ARM: at91: Kconfig: add config flag for SAM9X7 SoC
Applied to at91-soc, thanks!
> ARM: configs: at91: enable config flags for sam9x7 SoC family
Applied to at91-defconfig, thanks!
^ permalink raw reply [flat|nested] 28+ messages in thread