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From: Herve Codina <herve.codina@bootlin.com>
To: Herve Codina <herve.codina@bootlin.com>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
	Mark Brown <broonie@kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: [PATCH v1 16/36] soc: fsl: cpm1: tsa: Introduce tsa_serial_get_num()
Date: Mon, 29 Jul 2024 16:20:45 +0200	[thread overview]
Message-ID: <20240729142107.104574-17-herve.codina@bootlin.com> (raw)
In-Reply-To: <20240729142107.104574-1-herve.codina@bootlin.com>

TSA consumers in CPM1 implementation don't need to know about the serial
device number used by the TSA component. In QUICC Engine implementation,
this information is needed.

Improve the TSA API with tsa_serial_get_num() in order to provide this
information.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
 drivers/soc/fsl/qe/tsa.c | 56 ++++++++++++++++++++++++++--------------
 drivers/soc/fsl/qe/tsa.h |  3 +++
 2 files changed, 39 insertions(+), 20 deletions(-)

diff --git a/drivers/soc/fsl/qe/tsa.c b/drivers/soc/fsl/qe/tsa.c
index ffbca329a226..beaa0d3524be 100644
--- a/drivers/soc/fsl/qe/tsa.c
+++ b/drivers/soc/fsl/qe/tsa.c
@@ -231,6 +231,39 @@ static bool tsa_is_qe(const struct tsa *tsa)
 	return IS_ENABLED(CONFIG_QUICC_ENGINE);
 }
 
+static int tsa_qe_serial_get_num(struct tsa_serial *tsa_serial)
+{
+	struct tsa *tsa = tsa_serial_get_tsa(tsa_serial);
+
+	switch (tsa_serial->id) {
+	case FSL_QE_TSA_UCC1: return 0;
+	case FSL_QE_TSA_UCC2: return 1;
+	case FSL_QE_TSA_UCC3: return 2;
+	case FSL_QE_TSA_UCC4: return 3;
+	case FSL_QE_TSA_UCC5: return 4;
+	default:
+		break;
+	}
+
+	dev_err(tsa->dev, "Unsupported serial id %u\n", tsa_serial->id);
+	return -EINVAL;
+}
+
+int tsa_serial_get_num(struct tsa_serial *tsa_serial)
+{
+	struct tsa *tsa = tsa_serial_get_tsa(tsa_serial);
+
+	/*
+	 * There is no need to get the serial num out of the TSA driver in the
+	 * CPM case.
+	 * Further more, in CPM, we can have 2 types of serial SCCs and FCCs.
+	 * What kind of numbering to use that can be global to both SCCs and
+	 * FCCs ?
+	 */
+	return tsa_is_qe(tsa) ? tsa_qe_serial_get_num(tsa_serial) : -EOPNOTSUPP;
+}
+EXPORT_SYMBOL(tsa_serial_get_num);
+
 static int tsa_cpm1_serial_connect(struct tsa_serial *tsa_serial, bool connect)
 {
 	struct tsa *tsa = tsa_serial_get_tsa(tsa_serial);
@@ -271,26 +304,9 @@ static int tsa_qe_serial_connect(struct tsa_serial *tsa_serial, bool connect)
 	int ucc_num;
 	int ret;
 
-	switch (tsa_serial->id) {
-	case FSL_QE_TSA_UCC1:
-		ucc_num = 0;
-		break;
-	case FSL_QE_TSA_UCC2:
-		ucc_num = 1;
-		break;
-	case FSL_QE_TSA_UCC3:
-		ucc_num = 2;
-		break;
-	case FSL_QE_TSA_UCC4:
-		ucc_num = 3;
-		break;
-	case FSL_QE_TSA_UCC5:
-		ucc_num = 4;
-		break;
-	default:
-		dev_err(tsa->dev, "Unsupported serial id %u\n", tsa_serial->id);
-		return -EINVAL;
-	}
+	ucc_num = tsa_qe_serial_get_num(tsa_serial);
+	if (ucc_num < 0)
+		return ucc_num;
 
 	spin_lock_irqsave(&tsa->lock, flags);
 	ret = ucc_set_qe_mux_tsa(ucc_num, connect);
diff --git a/drivers/soc/fsl/qe/tsa.h b/drivers/soc/fsl/qe/tsa.h
index d9df89b6da3e..da137bc0f49b 100644
--- a/drivers/soc/fsl/qe/tsa.h
+++ b/drivers/soc/fsl/qe/tsa.h
@@ -39,4 +39,7 @@ struct tsa_serial_info {
 /* Get information */
 int tsa_serial_get_info(struct tsa_serial *tsa_serial, struct tsa_serial_info *info);
 
+/* Get serial number */
+int tsa_serial_get_num(struct tsa_serial *tsa_serial);
+
 #endif /* __SOC_FSL_TSA_H__ */
-- 
2.45.0


  parent reply	other threads:[~2024-07-29 14:21 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-29 14:20 [PATCH v1 00/36] soc: fsl: Add support for QUICC Engine TSA and QMC Herve Codina
2024-07-29 14:20 ` [PATCH v1 01/36] soc: fsl: cpm1: qmc: Update TRNSYNC only in transparent mode Herve Codina
2024-07-29 14:20 ` [PATCH v1 02/36] soc: fsl: cpm1: qmc: Enable TRNSYNC only when needed Herve Codina
2024-07-29 14:20 ` [PATCH v1 03/36] soc: fsl: cpm1: tsa: Fix tsa_write8() Herve Codina
2024-07-29 14:20 ` [PATCH v1 04/36] soc: fsl: cpm1: tsa: Use BIT(), GENMASK() and FIELD_PREP() macros Herve Codina
2024-07-29 14:20 ` [PATCH v1 05/36] soc: fsl: cpm1: tsa: Fix blank line and spaces Herve Codina
2024-07-29 14:20 ` [PATCH v1 06/36] soc: fsl: cpm1: tsa: Add missing spinlock comment Herve Codina
2024-07-29 14:20 ` [PATCH v1 07/36] dt-bindings: soc: fsl: cpm_qe: Add QUICC Engine (QE) TSA controller Herve Codina
2024-07-30 19:29   ` Rob Herring
2024-07-29 14:20 ` [PATCH v1 08/36] soc: fsl: cpm1: tsa: Remove unused registers offset definition Herve Codina
2024-07-29 14:20 ` [PATCH v1 09/36] soc: fsl: cpm1: tsa: Use ARRAY_SIZE() instead of hardcoded integer values Herve Codina
2024-07-29 14:20 ` [PATCH v1 10/36] soc: fsl: cpm1: tsa: Make SIRAM entries specific to CPM1 Herve Codina
2024-07-29 14:20 ` [PATCH v1 11/36] soc: fsl: cpm1: tsa: Introduce tsa_setup() and its CPM1 compatible version Herve Codina
2024-07-29 14:20 ` [PATCH v1 12/36] soc: fsl: cpm1: tsa: Isolate specific CPM1 part from tsa_serial_{dis}connect() Herve Codina
2024-07-29 14:20 ` [PATCH v1 13/36] soc: fsl: cpm1: tsa: Introduce tsa_version Herve Codina
2024-07-29 14:20 ` [PATCH v1 14/36] soc: fsl: cpm1: tsa: Add support for QUICC Engine (QE) implementation Herve Codina
2024-07-30  1:43   ` kernel test robot
2024-07-30  9:25   ` [PATCH " Markus Elfring
2024-07-29 14:20 ` [PATCH v1 15/36] MAINTAINERS: Add QE files related to the Freescale TSA controller Herve Codina
2024-07-29 14:20 ` Herve Codina [this message]
2024-07-29 14:20 ` [PATCH v1 17/36] soc: fsl: cpm1: qmc: Rename QMC_TSA_MASK Herve Codina
2024-07-29 14:20 ` [PATCH v1 18/36] soc: fsl: cpm1: qmc: Use BIT(), GENMASK() and FIELD_PREP() macros Herve Codina
2024-07-29 14:20 ` [PATCH v1 19/36] soc: fsl: cpm1: qmc: Fix blank line and spaces Herve Codina
2024-07-29 14:20 ` [PATCH v1 20/36] soc: fsl: cpm1: qmc: Remove unneeded parenthesis Herve Codina
2024-07-29 14:20 ` [PATCH v1 21/36] soc: fsl: cpm1: qmc: Fix 'transmiter' typo Herve Codina
2024-07-29 14:20 ` [PATCH v1 22/36] soc: fsl: cpm1: qmc: Add missing spinlock comment Herve Codina
2024-07-29 14:20 ` [PATCH v1 23/36] dt-bindings: soc: fsl: cpm_qe: Add QUICC Engine (QE) QMC controller Herve Codina
2024-07-30 19:36   ` Rob Herring
2024-08-05  6:43     ` Herve Codina
2024-07-29 14:20 ` [PATCH v1 24/36] soc: fsl: cpm1: qmc: Introduce qmc_data structure Herve Codina
2024-07-29 14:20 ` [PATCH v1 25/36] soc: fsl: cpm1: qmc: Re-order probe() operations Herve Codina
2024-07-29 14:20 ` [PATCH v1 26/36] soc: fsl: cpm1: qmc: Introduce qmc_init_resource() and its CPM1 version Herve Codina
2024-07-29 14:20 ` [PATCH v1 27/36] soc: fsl: cpm1: qmc: Introduce qmc_{init,exit}_xcc() and their " Herve Codina
2024-07-29 14:20 ` [PATCH v1 28/36] soc: fsl: cpm1: qmc: Rename qmc_chan_command() Herve Codina
2024-07-29 14:20 ` [PATCH v1 29/36] soc: fsl: cpm1: qmc: Handle RPACK initialization Herve Codina
2024-07-29 14:20 ` [PATCH v1 30/36] soc: fsl: cpm1: qmc: Rename SCC_GSMRL_MODE_QMC Herve Codina
2024-07-29 14:21 ` [PATCH v1 31/36] soc: fsl: cpm1: qmc: Introduce qmc_version Herve Codina
2024-07-29 14:21 ` [PATCH v1 32/36] soc: fsl: qe: Add resource-managed muram allocators Herve Codina
2024-07-30  2:46   ` kernel test robot
2024-07-30  3:10   ` kernel test robot
2024-07-29 14:21 ` [PATCH v1 33/36] soc: fsl: qe: Add missing PUSHSCHED command Herve Codina
2024-07-29 14:21 ` [PATCH v1 34/36] soc: fsl: cpm1: qmc: Add support for QUICC Engine (QE) implementation Herve Codina
2024-07-29 14:21 ` [PATCH v1 35/36] soc: fsl: cpm1: qmc: Handle QUICC Engine (QE) soft-qmc firmware Herve Codina
2024-07-29 14:21 ` [PATCH v1 36/36] MAINTAINERS: Add QE files related to the Freescale QMC controller Herve Codina

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