From: Manivannan Sadhasivam via B4 Relay <devnull+manivannan.sadhasivam.linaro.org@kernel.org>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konradybcio@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>
Subject: [PATCH v3 08/13] ARM: dts: qcom: sdx65: Add 'linux,pci-domain' to PCIe EP controller node
Date: Wed, 31 Jul 2024 16:20:11 +0530 [thread overview]
Message-ID: <20240731-pci-qcom-hotplug-v3-8-a1426afdee3b@linaro.org> (raw)
In-Reply-To: <20240731-pci-qcom-hotplug-v3-0-a1426afdee3b@linaro.org>
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
'linux,pci-domain' property provides the PCI domain number for the PCI
endpoint controllers in a SoC. If this property is not present, then an
unstable (across boots) unique number will be assigned.
Use this property to specify the domain number based on the actual hardware
instance of the PCI endpoint controllers in SDX65 SoC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index a949454212e9..fcfec4228670 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -345,6 +345,7 @@ pcie_ep: pcie-ep@1c00000 {
max-link-speed = <3>;
num-lanes = <2>;
+ linux,pci-domain = <0>;
status = "disabled";
};
--
2.25.1
next prev parent reply other threads:[~2024-07-31 10:50 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-31 10:50 [PATCH v3 00/13] PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt Manivannan Sadhasivam via B4 Relay
2024-07-31 10:50 ` [PATCH v3 01/13] PCI: qcom-ep: Drop the redundant masking of global IRQ events Manivannan Sadhasivam via B4 Relay
2024-07-31 10:50 ` [PATCH v3 02/13] PCI: qcom-ep: Reword the error message for receiving unknown global IRQ event Manivannan Sadhasivam via B4 Relay
2024-07-31 10:50 ` [PATCH v3 03/13] dt-bindings: PCI: pci-ep: Update Maintainers Manivannan Sadhasivam via B4 Relay
2024-07-31 10:50 ` [PATCH v3 04/13] dt-bindings: PCI: pci-ep: Document 'linux,pci-domain' property Manivannan Sadhasivam via B4 Relay
2024-07-31 10:50 ` [PATCH v3 05/13] PCI: endpoint: Assign PCI domain number for endpoint controllers Manivannan Sadhasivam via B4 Relay
2024-08-11 1:56 ` kernel test robot
2024-08-11 2:47 ` kernel test robot
2024-08-15 15:59 ` Manivannan Sadhasivam
2024-07-31 10:50 ` [PATCH v3 06/13] PCI: qcom-ep: Modify 'global_irq' and 'perst_irq' IRQ device names Manivannan Sadhasivam via B4 Relay
2024-08-01 17:23 ` Bjorn Helgaas
2024-08-02 7:43 ` Manivannan Sadhasivam
2024-08-02 16:51 ` Bjorn Helgaas
2024-07-31 10:50 ` [PATCH v3 07/13] ARM: dts: qcom: sdx55: Add 'linux,pci-domain' to PCIe EP controller node Manivannan Sadhasivam via B4 Relay
2024-07-31 10:50 ` Manivannan Sadhasivam via B4 Relay [this message]
2024-07-31 10:50 ` [PATCH v3 09/13] arm64: dts: qcom: sa8775p: Add 'linux,pci-domain' to PCIe EP controller nodes Manivannan Sadhasivam via B4 Relay
2024-07-31 10:50 ` [PATCH v3 10/13] dt-bindings: PCI: qcom: Add 'global' interrupt Manivannan Sadhasivam via B4 Relay
2024-07-31 10:50 ` [PATCH v3 11/13] dt-bindings: PCI: qcom,pcie-sm8450: " Manivannan Sadhasivam via B4 Relay
2024-08-06 16:54 ` Rob Herring
2024-07-31 10:50 ` [PATCH v3 12/13] PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt Manivannan Sadhasivam via B4 Relay
2024-07-31 10:50 ` [PATCH v3 13/13] arm64: dts: qcom: sm8450: Add 'global' interrupt to the PCIe RC node Manivannan Sadhasivam via B4 Relay
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