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From: matthew.gerlach@linux.intel.com
To: lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
	bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org,
	dinguyen@kernel.org, joyce.ooi@intel.com,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Matthew Gerlach <matthew.gerlach@linux.intel.com>,
	Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH 2/7] dt-bindings: PCI: altera: msi: Convert to YAML
Date: Wed, 31 Jul 2024 09:39:41 -0500	[thread overview]
Message-ID: <20240731143946.3478057-3-matthew.gerlach@linux.intel.com> (raw)
In-Reply-To: <20240731143946.3478057-1-matthew.gerlach@linux.intel.com>

From: Matthew Gerlach <matthew.gerlach@linux.intel.com>

Convert the device tree bindings for the Altera PCIe MSI controller
from text to YAML.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
v2: remove unused label
---
 .../bindings/pci/altera-pcie-msi.txt          | 27 --------
 .../bindings/pci/altr,msi-controller.yaml     | 65 +++++++++++++++++++
 MAINTAINERS                                   |  2 +-
 3 files changed, 66 insertions(+), 28 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
 create mode 100644 Documentation/devicetree/bindings/pci/altr,msi-controller.yaml

diff --git a/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt b/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
deleted file mode 100644
index 9514c327d31b..000000000000
--- a/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Altera PCIe MSI controller
-
-Required properties:
-- compatible:	should contain "altr,msi-1.0"
-- reg:		specifies the physical base address of the controller and
-		the length of the memory mapped region.
-- reg-names:	must include the following entries:
-		"csr": CSR registers
-		"vector_slave": vectors slave port region
-- interrupts:	specifies the interrupt source of the parent interrupt
-		controller. The format of the interrupt specifier depends on the
-		parent interrupt controller.
-- num-vectors:	number of vectors, range 1 to 32.
-- msi-controller:	indicates that this is MSI controller node
-
-
-Example
-msi0: msi@0xFF200000 {
-	compatible = "altr,msi-1.0";
-	reg = <0xFF200000 0x00000010
-		0xFF200010 0x00000080>;
-	reg-names = "csr", "vector_slave";
-	interrupt-parent = <&hps_0_arm_gic_0>;
-	interrupts = <0 42 4>;
-	msi-controller;
-	num-vectors = <32>;
-};
diff --git a/Documentation/devicetree/bindings/pci/altr,msi-controller.yaml b/Documentation/devicetree/bindings/pci/altr,msi-controller.yaml
new file mode 100644
index 000000000000..98814862d006
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/altr,msi-controller.yaml
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (C) 2015, 2024, Intel Corporation
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/altr,msi-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera PCIe MSI controller
+
+maintainers:
+  - Matthew Gerlach <matthew.gerlach@linux.intel.com>
+
+properties:
+  compatible:
+    enum:
+      - altr,msi-1.0
+
+  reg:
+    items:
+      - description: CSR registers
+      - description: Vectors slave port region
+
+  reg-names:
+    items:
+      - const: csr
+      - const: vector_slave
+
+  interrupts:
+    maxItems: 1
+
+  msi-controller: true
+
+  num-vectors:
+    description: number of vectors
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    maximum: 32
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - interrupts
+  - msi-controller
+  - num-vectors
+
+allOf:
+  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    msi@ff200000 {
+        compatible = "altr,msi-1.0";
+        reg = <0xff200000 0x00000010>,
+              <0xff200010 0x00000080>;
+        reg-names = "csr", "vector_slave";
+        interrupt-parent = <&hps_0_arm_gic_0>;
+        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+        msi-controller;
+        num-vectors = <32>;
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 55ad37e73183..2faf57628973 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17596,7 +17596,7 @@ PCI MSI DRIVER FOR ALTERA MSI IP
 M:	Joyce Ooi <joyce.ooi@intel.com>
 L:	linux-pci@vger.kernel.org
 S:	Supported
-F:	Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
+F:	Documentation/devicetree/bindings/pci/altr,msi-controller.yaml
 F:	drivers/pci/controller/pcie-altera-msi.c
 
 PCI MSI DRIVER FOR APPLIEDMICRO XGENE
-- 
2.34.1


  parent reply	other threads:[~2024-07-31 14:41 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-31 14:39 [PATCH 0/7] Add PCIe Root Port support for Agilex family of chips matthew.gerlach
2024-07-31 14:39 ` [PATCH 1/7] dt-bindings: PCI: altera: Convert to YAML matthew.gerlach
2024-07-31 14:39 ` matthew.gerlach [this message]
2024-07-31 14:39 ` [PATCH 3/7] dt-bindings: PCI: altera: Add binding for Agilex matthew.gerlach
2024-08-06 17:01   ` Rob Herring (Arm)
2024-07-31 14:39 ` [PATCH 4/7] arm64: dts: agilex: add soc0 label matthew.gerlach
2024-07-31 14:39 ` [PATCH 5/7] arm64: dts: agilex: add dtsi for PCIe Root Port matthew.gerlach
2024-08-07 23:03   ` matthew.gerlach
2024-07-31 14:39 ` [PATCH 6/7] arm64: dts: agilex: add dts enabling " matthew.gerlach
2024-07-31 14:39 ` [PATCH 7/7] pci: controller: pcie-altera: Add support for Agilex matthew.gerlach
2024-07-31 20:23   ` Bjorn Helgaas
2024-08-02  0:07     ` matthew.gerlach
2024-08-01 15:29 ` [PATCH 0/7] Add PCIe Root Port support for Agilex family of chips Rob Herring (Arm)

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