[PATCH] [DT Bindings - Arm] Altera SOCFPGA SDRAM

[PATCH] [DT Bindings - Arm] Altera SOCFPGA SDRAM

[Alessandro Zanni]

Added yaml file that substitues the old txt file.

Signed-off-by: Alessandro Zanni <alessandro.zanni87@gmail.com>
---
 .../arm/altera/socfpga-sdram-edac.txt         | 15 -------
 .../arm/altera/socfpga-sdram-edac.yaml        | 44 +++++++++++++++++++
 2 files changed, 44 insertions(+), 15 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
 create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
deleted file mode 100644
index f5ad0ff69fae..000000000000
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
-The EDAC accesses a range of registers in the SDRAM controller.
-
-Required properties:
-- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
-- altr,sdr-syscon : phandle of the sdr module
-- interrupts : Should contain the SDRAM ECC IRQ in the
-	appropriate format for the IRQ controller.
-
-Example:
-	sdramedac {
-		compatible = "altr,sdram-edac";
-		altr,sdr-syscon = <&sdr>;
-		interrupts = <0 39 4>;
-	};
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
new file mode 100644
index 000000000000..4e70daebf1c5
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
@@ -0,0 +1,44 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
+
+maintainers:
+  - Dinh Nguyen <dinguyen@kernel.org>
+
+description: >
+  The EDAC accesses a range of registers in the SDRAM controller.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: altr,sdram-edac
+      - items:
+          - const: altr,sdram-edac-a10
+  altr,sdr-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: 
+      Phandle of the sdr module      
+  interrupts:
+    description: >
+      Should contain the SDRAM ECC IRQ in the
+      appropriate format for the IRQ controller.
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    sdramedac {
+      compatible = "altr,sdram-edac";
+      altr,sdr-syscon = <&sdr>;
+      interrupts = <0 39 4>;
+    };
+
+...
-- 
2.43.0

Re: [PATCH] [DT Bindings - Arm] Altera SOCFPGA SDRAM

[Rob Herring]

On Wed, Jul 31, 2024 at 06:52:18PM +0200, Alessandro Zanni wrote:
> Added yaml file that substitues the old txt file.

Write subjects that match the subsystem. Use 'git log --oneline 
<dir>' to see this. Here, the prefix should be 'dt-bindings: '.

Use get_maintainers.pl to send this to all the correct maintainers and 
lists.

> 
> Signed-off-by: Alessandro Zanni <alessandro.zanni87@gmail.com>
> ---
>  .../arm/altera/socfpga-sdram-edac.txt         | 15 -------
>  .../arm/altera/socfpga-sdram-edac.yaml        | 44 +++++++++++++++++++
>  2 files changed, 44 insertions(+), 15 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
> deleted file mode 100644
> index f5ad0ff69fae..000000000000
> --- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
> +++ /dev/null
> @@ -1,15 +0,0 @@
> -Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
> -The EDAC accesses a range of registers in the SDRAM controller.
> -
> -Required properties:
> -- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
> -- altr,sdr-syscon : phandle of the sdr module
> -- interrupts : Should contain the SDRAM ECC IRQ in the
> -	appropriate format for the IRQ controller.
> -
> -Example:
> -	sdramedac {
> -		compatible = "altr,sdram-edac";
> -		altr,sdr-syscon = <&sdr>;
> -		interrupts = <0 39 4>;
> -	};
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> new file mode 100644
> index 000000000000..4e70daebf1c5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> @@ -0,0 +1,44 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
> +
> +maintainers:
> +  - Dinh Nguyen <dinguyen@kernel.org>
> +
> +description: >

Don't need '>'

> +  The EDAC accesses a range of registers in the SDRAM controller.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: altr,sdram-edac
> +      - items:
> +          - const: altr,sdram-edac-a10

enum:
 - altr,sdram-edac
 - altr,sdram-edac-a10

> +  altr,sdr-syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: 
> +      Phandle of the sdr module      

blank line

> +  interrupts:
> +    description: >
> +      Should contain the SDRAM ECC IRQ in the
> +      appropriate format for the IRQ controller.

Drop. Just need:

maxItems: 1

> +
> +required:
> +  - compatible

All the properties were required before.

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    sdramedac {
> +      compatible = "altr,sdram-edac";
> +      altr,sdr-syscon = <&sdr>;
> +      interrupts = <0 39 4>;
> +    };
> +
> +...
> -- 
> 2.43.0
>