devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v2 RESEND] arm64: dts: s32g: Disable usdhc write-protect
@ 2024-08-05  9:56 Ciprian Costea
  2024-08-08  3:08 ` Peng Fan
  0 siblings, 1 reply; 2+ messages in thread
From: Ciprian Costea @ 2024-08-05  9:56 UTC (permalink / raw)
  To: Chester Lin, Matthias Brugger, Ghennadi Procopciuc, Shawn Guo,
	Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-kernel, imx, devicetree, linux-kernel, s32,
	Ciprian Costea

SDHCI controller found on NXP S32G based platforms do not
define a pin for SD-Card write protection.

Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
---
 arch/arm64/boot/dts/freescale/s32g274a-evb.dts  | 1 +
 arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 1 +
 arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts | 3 ++-
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
index 00070c949e2a..dbe498798bd9 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
@@ -34,5 +34,6 @@ &uart0 {
 };
 
 &usdhc0 {
+	disable-wp;
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
index b3fc12899cae..ab1e5caaeae7 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
@@ -40,5 +40,6 @@ &uart1 {
 };
 
 &usdhc0 {
+	disable-wp;
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
index 9d674819876e..176e5af191c8 100644
--- a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
+++ b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
 /*
- * Copyright 2021-2023 NXP
+ * Copyright 2021-2024 NXP
  *
  * NXP S32G3 Reference Design Board 3 (S32G-VNP-RDB3)
  */
@@ -41,5 +41,6 @@ &uart1 {
 
 &usdhc0 {
 	bus-width = <8>;
+	disable-wp;
 	status = "okay";
 };
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* RE: [PATCH v2 RESEND] arm64: dts: s32g: Disable usdhc write-protect
  2024-08-05  9:56 [PATCH v2 RESEND] arm64: dts: s32g: Disable usdhc write-protect Ciprian Costea
@ 2024-08-08  3:08 ` Peng Fan
  0 siblings, 0 replies; 2+ messages in thread
From: Peng Fan @ 2024-08-08  3:08 UTC (permalink / raw)
  To: Ciprian Marian Costea (OSS), Chester Lin, Matthias Brugger,
	Ghennadi Procopciuc (OSS), Shawn Guo, Sascha Hauer,
	Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dl-S32,
	Ciprian Marian Costea (OSS)

> Subject: [PATCH v2 RESEND] arm64: dts: s32g: Disable usdhc write-
> protect
> 
> SDHCI controller found on NXP S32G based platforms do not define a
> pin for SD-Card write protection.
> 
> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2024-08-08  3:08 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-08-05  9:56 [PATCH v2 RESEND] arm64: dts: s32g: Disable usdhc write-protect Ciprian Costea
2024-08-08  3:08 ` Peng Fan

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).