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Tue, 6 Aug 2024 09:47:45 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 6 Aug 2024 09:47:45 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 6 Aug 2024 09:47:45 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 476EljAL070726; Tue, 6 Aug 2024 09:47:45 -0500 Date: Tue, 6 Aug 2024 09:47:45 -0500 From: Nishanth Menon To: Wadim Egorov CC: , , , , , , , , , Subject: Re: [PATCH] arm64: dts: ti: am642-phyboard-electra: Add PRU-ICSSG nodes Message-ID: <20240806144745.s3ga45pkgfuovjg6@henna> References: <20240709101205.891587-1-w.egorov@phytec.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240709101205.891587-1-w.egorov@phytec.de> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 12:12-20240709, Wadim Egorov wrote: > The phyBOARD-Electra implements two Ethernet ports utilizing PRUs. > Add configuration for both mac ports & PHYs. > > Signed-off-by: Wadim Egorov > --- > .../dts/ti/k3-am642-phyboard-electra-rdk.dts | 146 ++++++++++++++++++ > 1 file changed, 146 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts > index 6df331ccb970..364a7582cf99 100644 > --- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts > @@ -28,6 +28,8 @@ / { > model = "PHYTEC phyBOARD-Electra-AM64x RDK"; > > aliases { > + ethernet1 = &icssg0_emac0; > + ethernet2 = &icssg0_emac1; > mmc1 = &sdhci1; > serial2 = &main_uart0; > serial3 = &main_uart1; > @@ -55,6 +57,73 @@ can_tc2: can-phy1 { > standby-gpios = <&main_gpio0 35 GPIO_ACTIVE_HIGH>; > }; > > + /* Dual Ethernet application node on PRU-ICSSG0 */ > + ethernet { > + compatible = "ti,am642-icssg-prueth"; > + pinctrl-names = "default"; > + pinctrl-0 = <&icssg0_rgmii1_pins_default &icssg0_rgmii2_pins_default>; &icssg0_rgmii1_pins_default>, <&icssg0_rgmii2_pins_default> > + > + sram = <&oc_sram>; > + ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>, <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>; here and elsewhere, follow https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/dts-coding-style.rst#n117 [...] -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D