From: Rob Herring <robh@kernel.org>
To: Jie Gan <quic_jiegan@quicinc.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Jinlong Mao <quic_jinlmao@quicinc.com>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Tingwei Zhang <quic_tingweiz@quicinc.com>,
Yuanfang Zhang <quic_yuanfang@quicinc.com>,
Tao Zhang <quic_taozha@quicinc.com>,
Song Chai <quic_songchai@quicinc.com>,
linux-arm-msm@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v3 3/5] dt-bindings: arm: Add Coresight TMC Control Unit hardware
Date: Sun, 18 Aug 2024 08:28:34 -0600 [thread overview]
Message-ID: <20240818142834.GA27754-robh@kernel.org> (raw)
In-Reply-To: <20240812024141.2867655-4-quic_jiegan@quicinc.com>
On Mon, Aug 12, 2024 at 10:41:39AM +0800, Jie Gan wrote:
> Add binding file to specify how to define a Coresight TMC
> Control Unit device in device tree.
>
> It is responsible for controlling the data filter function
> based on the source device's Trace ID for TMC ETR device.
> The trace data with that Trace id can get into ETR's buffer
> while other trace data gets ignored.
>
> Signed-off-by: Jie Gan <quic_jiegan@quicinc.com>
> ---
> .../bindings/arm/qcom,coresight-ctcu.yaml | 79 +++++++++++++++++++
> 1 file changed, 79 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> new file mode 100644
> index 000000000000..7a9580007942
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> @@ -0,0 +1,79 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/qcom,coresight-ctcu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: CoreSight TMC Control Unit
> +
> +maintainers:
> + - Yuanfang Zhang <quic_yuanfang@quicinc.com>
> + - Mao Jinlong <quic_jinlmao@quicinc.com>
> + - Jie Gan <quic_jiegan@quicinc.com>
> +
> +description:
> + The Coresight TMC Control unit controls various Coresight behaviors.
> + It works as a helper device when connected to TMC ETR device.
> + It is responsible for controlling the data filter function based on
> + the source device's Trace ID for TMC ETR device. The trace data with
> + that Trace id can get into ETR's buffer while other trace data gets
> + ignored.
Nowhere is TMC defined.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,sa8775p-ctcu
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: apb
> +
> + in-ports:
Use 'ports' unless you have both in and out ports.
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + patternProperties:
> + '^port(@[0-7])?$':
> + description: Input connections from CoreSight Trace bus
> + $ref: /schemas/graph.yaml#/properties/port
> +
> +required:
> + - compatible
> + - reg
> + - in-ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + ctcu@1001000 {
> + compatible = "qcom,sa8775p-ctcu";
> + reg = <0x1001000 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + ctcu_in_port0: endpoint {
> + remote-endpoint = <&etr0_out_port>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + ctcu_in_port1: endpoint {
> + remote-endpoint = <&etr1_out_port>;
> + };
> + };
> + };
> + };
> --
> 2.34.1
>
next prev parent reply other threads:[~2024-08-18 14:28 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-12 2:41 [PATCH v3 0/5] Coresight: Add Coresight TMC Control Unit driver Jie Gan
2024-08-12 2:41 ` [PATCH v3 1/5] Coresight: Add support for new APB clock name Jie Gan
2024-08-12 2:41 ` [PATCH v3 2/5] Coresight: Add trace_id function to retrieving the trace ID Jie Gan
2024-08-12 2:41 ` [PATCH v3 3/5] dt-bindings: arm: Add Coresight TMC Control Unit hardware Jie Gan
2024-08-18 14:28 ` Rob Herring [this message]
2024-08-19 1:49 ` JieGan
2024-08-19 6:25 ` Krzysztof Kozlowski
2024-08-19 8:51 ` JieGan
2024-08-19 9:51 ` Krzysztof Kozlowski
2024-08-20 6:36 ` JieGan
2024-08-22 9:55 ` Krzysztof Kozlowski
2024-08-22 11:43 ` Suzuki K Poulose
2024-08-19 6:26 ` Krzysztof Kozlowski
2024-08-19 9:06 ` JieGan
2024-08-19 9:41 ` Krzysztof Kozlowski
2024-08-19 9:50 ` JieGan
2024-08-12 2:41 ` [PATCH v3 4/5] Coresight: Add Coresight TMC Control Unit driver Jie Gan
2024-08-12 2:41 ` [PATCH v3 5/5] arm64: dts: qcom: Add CTCU and ETR nodes for SA8775p Jie Gan
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