* [PATCH v2 0/3] add some node for amlogic c3
@ 2024-08-20 9:41 Xianwei Zhao via B4 Relay
2024-08-20 9:41 ` [PATCH v2 1/3] dt-bindings: clock: fix C3 PLL input parameter Xianwei Zhao via B4 Relay
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Xianwei Zhao via B4 Relay @ 2024-08-20 9:41 UTC (permalink / raw)
To: Neil Armstrong, Jerome Brunet, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chuan Liu,
Kevin Hilman, Martin Blumenstingl
Cc: Krzysztof Kozlowski, linux-amlogic, linux-clk, devicetree,
linux-kernel, linux-arm-kernel, Xianwei Zhao
Add some node for board AW409 and support board C308l AW419.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
Changes in v2:
- Delete unused sdio node in board level dts.
- Add the description of modifying the binding in commit msg.
- Add the reason why some node property fileds place at board level in commit msg.
- Link to v1: https://lore.kernel.org/r/20240806-c3_add_node-v1-0-c0de41341632@amlogic.com
---
Xianwei Zhao (3):
dt-bindings: clock: fix C3 PLL input parameter
arm64: dts: amlogic: add some device nodes for C3
arm64: dts: amlogic: add C3 AW419 board
.../bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +-
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts | 233 ++++++++++
.../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts | 262 +++++++++++
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 487 ++++++++++++++++++++-
5 files changed, 987 insertions(+), 3 deletions(-)
---
base-commit: bfe05c592279e509a67c3ae305517859f3f5a58c
change-id: 20240806-c3_add_node-420a37918f18
Best regards,
--
Xianwei Zhao <xianwei.zhao@amlogic.com>
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v2 1/3] dt-bindings: clock: fix C3 PLL input parameter 2024-08-20 9:41 [PATCH v2 0/3] add some node for amlogic c3 Xianwei Zhao via B4 Relay @ 2024-08-20 9:41 ` Xianwei Zhao via B4 Relay 2024-08-20 11:07 ` Krzysztof Kozlowski 2024-08-20 9:41 ` [PATCH v2 2/3] arm64: dts: amlogic: add some device nodes for C3 Xianwei Zhao via B4 Relay 2024-08-20 9:41 ` [PATCH v2 3/3] arm64: dts: amlogic: add C3 AW419 board Xianwei Zhao via B4 Relay 2 siblings, 1 reply; 7+ messages in thread From: Xianwei Zhao via B4 Relay @ 2024-08-20 9:41 UTC (permalink / raw) To: Neil Armstrong, Jerome Brunet, Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chuan Liu, Kevin Hilman, Martin Blumenstingl Cc: Krzysztof Kozlowski, linux-amlogic, linux-clk, devicetree, linux-kernel, linux-arm-kernel, Xianwei Zhao From: Xianwei Zhao <xianwei.zhao@amlogic.com> Add C3 PLL controller input clock parameters "fix". The clock named "fix" was initially implemented in PLL clock controller driver. However, some registers required secure zone access, so we moved it to the secure zone (BL31) and accessed it through SCMI. Since the PLL clock driver needs to use this clock, the "fix" clock is used as an input source. We updated the driver but forgot to modify the binding accordingly, so we are adding it here. It is an ABI break but on a new and immature platform. Noboby could really use that platform at this stage, so nothing is going to break on anyone really. Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller") Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> --- Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml index 43de3c6fc1cf..700865cc9792 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml +++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml @@ -24,11 +24,13 @@ properties: items: - description: input top pll - description: input mclk pll + - description: input fix pll clock-names: items: - const: top - const: mclk + - const: fix "#clock-cells": const: 1 @@ -52,8 +54,9 @@ examples: compatible = "amlogic,c3-pll-clkc"; reg = <0x0 0x8000 0x0 0x1a4>; clocks = <&scmi_clk 2>, - <&scmi_clk 5>; - clock-names = "top", "mclk"; + <&scmi_clk 5>, + <&scmi_clk 12>; + clock-names = "top", "mclk", "fix"; #clock-cells = <1>; }; }; -- 2.37.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/3] dt-bindings: clock: fix C3 PLL input parameter 2024-08-20 9:41 ` [PATCH v2 1/3] dt-bindings: clock: fix C3 PLL input parameter Xianwei Zhao via B4 Relay @ 2024-08-20 11:07 ` Krzysztof Kozlowski 0 siblings, 0 replies; 7+ messages in thread From: Krzysztof Kozlowski @ 2024-08-20 11:07 UTC (permalink / raw) To: Xianwei Zhao Cc: Neil Armstrong, Jerome Brunet, Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chuan Liu, Kevin Hilman, Martin Blumenstingl, linux-amlogic, linux-clk, devicetree, linux-kernel, linux-arm-kernel On Tue, Aug 20, 2024 at 05:41:56PM +0800, Xianwei Zhao wrote: > Add C3 PLL controller input clock parameters "fix". > > The clock named "fix" was initially implemented in PLL clock controller driver. > However, some registers required secure zone access, so we moved it to > the secure zone (BL31) and accessed it through SCMI. Since the PLL clock > driver needs to use this clock, the "fix" clock is used as an input source. > We updated the driver but forgot to modify the binding accordingly, > so we are adding it here. > > It is an ABI break but on a new and immature platform. > Noboby could really use that platform at this stage, so nothing is going > to break on anyone really. > > Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller") > Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 2/3] arm64: dts: amlogic: add some device nodes for C3 2024-08-20 9:41 [PATCH v2 0/3] add some node for amlogic c3 Xianwei Zhao via B4 Relay 2024-08-20 9:41 ` [PATCH v2 1/3] dt-bindings: clock: fix C3 PLL input parameter Xianwei Zhao via B4 Relay @ 2024-08-20 9:41 ` Xianwei Zhao via B4 Relay 2024-08-20 9:56 ` Neil Armstrong 2024-08-20 9:41 ` [PATCH v2 3/3] arm64: dts: amlogic: add C3 AW419 board Xianwei Zhao via B4 Relay 2 siblings, 1 reply; 7+ messages in thread From: Xianwei Zhao via B4 Relay @ 2024-08-20 9:41 UTC (permalink / raw) To: Neil Armstrong, Jerome Brunet, Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chuan Liu, Kevin Hilman, Martin Blumenstingl Cc: Krzysztof Kozlowski, linux-amlogic, linux-clk, devicetree, linux-kernel, linux-arm-kernel, Xianwei Zhao From: Xianwei Zhao <xianwei.zhao@amlogic.com> Add some device nodes for SoC C3, including periphs clock controller node, PLL clock controller node, SPICC node, regulator node, NAND controller node, sdcard node, Ethernet MAC and PHY node. The sdacrd depends on regulator and pinctrl(select), so some property fields are placed at the board level. The nand chip is placed on the board, So some property fields about SPIFC and NAND controller node are placed at the board level. THe Ethernet MAC support outchip PHY, so place this property field(select PHY) at the board level. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> --- .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts | 233 ++++++++++ arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 487 ++++++++++++++++++++- 2 files changed, 719 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts index edce8850b338..b8d2037afc00 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts @@ -16,14 +16,247 @@ / { aliases { serial0 = &uart_b; + spi0 = &spifc; }; memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x10000000>; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 9 MiB reserved for ARM Trusted Firmware */ + secmon_reserved: secmon@7f00000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x07f00000 0x0 0x900000>; + no-map; + }; + }; + + main_12v: regulator-main-12v { + compatible = "regulator-fixed"; + regulator-name = "12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_5v: regulator-vcc-5v { + compatible = "regulator-fixed"; + regulator-name = "VCC5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&main_12v>; + regulator-boot-on; + regulator-always-on; + }; + + vddq: regulator-vddq { + compatible = "regulator-fixed"; + regulator-name = "VDDQ"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&main_12v>; + regulator-boot-on; + regulator-always-on; + }; + + vddao_3v3: regulator-vddao-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&main_12v>; + regulator-boot-on; + regulator-always-on; + }; + + vddao_1v8: regulator-vddao-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + ddr4_2v5: regulator-ddr4-2v5 { + compatible = "regulator-fixed"; + regulator-name = "DDR4_2V5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + vin-supply = <&vddao_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_3v3: regulator-vcc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_1v8: regulator-vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + vdd_1v8: regulator-vdd-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDD1V8_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + vddio_b: regulator-vddio-3v3-b { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_B"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + sdcard: regulator-sdcard { + compatible = "regulator-fixed"; + regulator-name = "SDCARD_POWER"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>; + regulator-boot-on; + regulator-always-on; + }; }; &uart_b { status = "okay"; }; + +&nand { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + nand-on-flash-bbt; + + partition@0 { + label = "boot"; + reg = <0x0 0x00200000>; + }; + partition@200000 { + label = "env"; + reg = <0x00200000 0x00400000>; + }; + partition@600000 { + label = "system"; + reg = <0x00600000 0x00a00000>; + }; + partition@1000000 { + label = "rootfs"; + reg = <0x01000000 0x03000000>; + }; + partition@4000000 { + label = "media"; + reg = <0x04000000 0x8000000>; + }; + }; +}; + +ðmac { + status = "okay"; + phy-handle = <&internal_ephy>; + phy-mode = "rmii"; +}; + +&spifc { + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-0 = <&spifc_pins>; + pinctrl-names = "default"; + + nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <83000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "boot"; + reg = <0 0x200000>; + }; + + partition@200000 { + label = "env"; + reg = <0x200000 0x400000>; + }; + + partition@600000 { + label = "system"; + reg = <0x600000 0xa00000>; + }; + + partition@1000000 { + label = "rootfs"; + reg = <0x1000000 0x3000000>; + }; + + partition@4000000 { + label = "data"; + reg = <0x4000000 0x8000000>; + }; + }; + }; +}; + +&sd { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default","clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&sdcard>; + vqmmc-supply = <&sdcard>; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi index f8fb060c49ae..2bf56fbe3dfb 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi @@ -7,6 +7,11 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/reset/amlogic,c3-reset.h> +#include <dt-bindings/clock/amlogic,c3-pll-clkc.h> +#include <dt-bindings/clock/amlogic,c3-scmi-clkc.h> +#include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h> +#include <dt-bindings/power/amlogic,c3-pwrc.h> +#include <dt-bindings/gpio/amlogic-c3-gpio.h> / { cpus { @@ -57,6 +62,34 @@ pwrc: power-controller { }; }; + sram { + compatible = "mmio-sram"; + reg = <0x0 0x07f50e00 0x0 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x07f50e00 0x100>; + + scmi_shmem: sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x100>; + }; + }; + + firmware { + scmi: scmi { + compatible = "arm,scmi-smc"; + arm,smc-id = <0x820000C1>; + shmem = <&scmi_shmem>; + #address-cells = <1>; + #size-cells = <0>; + + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -108,6 +141,237 @@ gpio: bank@4000 { #gpio-cells = <2>; gpio-ranges = <&periphs_pinctrl 0 0 55>; }; + + i2c0_pins1: i2c0-pins1 { + mux { + groups = "i2c0_sda_e", + "i2c0_scl_e"; + function = "i2c0"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c0_pins2: i2c0-pins2 { + mux { + groups = "i2c0_sda_d", + "i2c0_scl_d"; + function = "i2c0"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_pins1: i2c1-pins1 { + mux { + groups = "i2c1_sda_x", + "i2c1_scl_x"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_pins2: i2c1-pins2 { + mux { + groups = "i2c1_sda_d", + "i2c1_scl_d"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_pins3: i2c1-pins3 { + mux { + groups = "i2c1_sda_a", + "i2c1_scl_a"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_pins4: i2c1-pins4 { + mux { + groups = "i2c1_sda_b", + "i2c1_scl_b"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_pins1: i2c2-pins1 { + mux { + groups = "i2c2_sda", + "i2c2_scl"; + function = "i2c2"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_pins1: i2c3-pins1 { + mux { + groups = "i2c3_sda_c", + "i2c3_scl_c"; + function = "i2c3"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_pins2: i2c3-pins2 { + mux { + groups = "i2c3_sda_x", + "i2c3_scl_x"; + function = "i2c3"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_pins3: i2c3-pins3 { + mux { + groups = "i2c3_sda_d", + "i2c3_scl_d"; + function = "i2c3"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + nand_pins: nand-pins { + mux { + groups = "emmc_nand_d0", + "emmc_nand_d1", + "emmc_nand_d2", + "emmc_nand_d3", + "emmc_nand_d4", + "emmc_nand_d5", + "emmc_nand_d6", + "emmc_nand_d7", + "nand_ce0", + "nand_ale", + "nand_cle", + "nand_wen_clk", + "nand_ren_wr"; + function = "nand"; + input-enable; + }; + }; + + sdcard_pins: sdcard-pins { + mux { + groups = "sdcard_d0", + "sdcard_d1", + "sdcard_d2", + "sdcard_d3", + "sdcard_clk", + "sdcard_cmd"; + function = "sdcard"; + bias-pull-up; + drive-strength-microamp = <4000>; + }; + }; + + sdcard_clk_gate_pins: sdcard-clk-cmd-pins { + mux { + groups = "GPIOC_4"; + function = "gpio_periphs"; + bias-pull-down; + drive-strength-microamp = <4000>; + }; + }; + + sdio_m_clk_gate_pins: sdio-m-clk-cmd-pins { + mux { + groups = "sdio_clk"; + function = "sdio"; + bias-pull-down; + drive-strength-microamp = <4000>; + }; + }; + + sdio_m_pins: sdio-m-all-pins { + mux { + groups = "sdio_d0", + "sdio_d1", + "sdio_d2", + "sdio_d3", + "sdio_clk", + "sdio_cmd"; + function = "sdio"; + input-enable; + bias-pull-up; + drive-strength-microamp = <4000>; + }; + }; + + spicc0_pins1: spicc0-pins1 { + mux { + groups = "spi_a_mosi_b", + "spi_a_miso_b", + "spi_a_clk_b"; + function = "spi_a"; + drive-strength-microamp = <3000>; + }; + }; + + spicc0_pins2: spicc0-pins2 { + mux { + groups = "spi_a_mosi_c", + "spi_a_miso_c", + "spi_a_clk_c"; + function = "spi_a"; + drive-strength-microamp = <3000>; + }; + }; + + spicc0_pins3: spicc0-pins3 { + mux { + groups = "spi_a_mosi_x", + "spi_a_miso_x", + "spi_a_clk_x"; + function = "spi_a"; + drive-strength-microamp = <3000>; + }; + }; + + spicc1_pins1: spicc1-pins1 { + mux { + groups = "spi_b_mosi_d", + "spi_b_miso_d", + "spi_b_clk_d"; + function = "spi_b"; + drive-strength-microamp = <3000>; + }; + }; + + spicc1_pins2: spicc1-pins2 { + mux { + groups = "spi_b_mosi_x", + "spi_b_miso_x", + "spi_b_clk_x"; + function = "spi_b"; + drive-strength-microamp = <3000>; + }; + }; + + spifc_pins: spifc-pins { + mux { + groups = "spif_mo", + "spif_mi", + "spif_clk", + "spif_cs", + "spif_hold", + "spif_wp", + "spif_clk_loop"; + function = "spif"; + drive-strength-microamp = <4000>; + }; + }; }; gpio_intc: interrupt-controller@4080 { @@ -119,16 +383,237 @@ gpio_intc: interrupt-controller@4080 { <10 11 12 13 14 15 16 17 18 19 20 21>; }; + clkc_pll: clock-controller@8000 { + compatible = "amlogic,c3-pll-clkc"; + reg = <0x0 0x8000 0x0 0x1a4>; + #clock-cells = <1>; + clocks = <&scmi_clk CLKID_TOP_PLL_OSC>, + <&scmi_clk CLKID_MCLK_PLL_OSC>, + <&scmi_clk CLKID_FIXED_PLL_OSC>; + clock-names = "top", + "mclk", + "fix"; + }; + + clkc_periphs: clock-controller@0 { + compatible = "amlogic,c3-peripherals-clkc"; + reg = <0x0 0x0 0x0 0x49c>; + #clock-cells = <1>; + clocks = <&xtal>, + <&scmi_clk CLKID_OSC>, + <&scmi_clk CLKID_FIXED_PLL_OSC>, + <&clkc_pll CLKID_FCLK_DIV2>, + <&clkc_pll CLKID_FCLK_DIV2P5>, + <&clkc_pll CLKID_FCLK_DIV3>, + <&clkc_pll CLKID_FCLK_DIV4>, + <&clkc_pll CLKID_FCLK_DIV5>, + <&clkc_pll CLKID_FCLK_DIV7>, + <&clkc_pll CLKID_GP0_PLL>, + <&scmi_clk CLKID_GP1_PLL_OSC>, + <&clkc_pll CLKID_HIFI_PLL>, + <&scmi_clk CLKID_SYS_CLK>, + <&scmi_clk CLKID_AXI_CLK>, + <&scmi_clk CLKID_SYS_PLL_DIV16>, + <&scmi_clk CLKID_CPU_CLK_DIV16>; + clock-names = "xtal_24m", + "oscin", + "fix", + "fdiv2", + "fdiv2p5", + "fdiv3", + "fdiv4", + "fdiv5", + "fdiv7", + "gp0", + "gp1", + "hifi", + "sysclk", + "axiclk", + "sysplldiv16", + "cpudiv16"; + }; + + eth_phy: mdio-multiplexer@28000 { + compatible = "amlogic,g12a-mdio-mux"; + reg = <0x0 0x28000 0x0 0xa4>; + + clocks = <&clkc_periphs CLKID_SYS_ETH_PHY>, + <&xtal>, + <&clkc_pll CLKID_FCLK_50M>; + clock-names = "pclk", "clkin0", "clkin1"; + mdio-parent-bus = <&mdio0>; + #address-cells = <1>; + #size-cells = <0>; + + ext_mdio: mdio@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + int_mdio: mdio@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + internal_ephy: ethernet_phy@8 { + compatible = "ethernet-phy-id0180.3301", + "ethernet-phy-ieee802.3-c22"; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + reg = <8>; + max-speed = <100>; + }; + }; + }; + + spicc0: spi@50000 { + compatible = "amlogic,meson-g12a-spicc"; + reg = <0x0 0x50000 0x0 0x44>; + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkc_periphs CLKID_SYS_SPICC_0>, + <&clkc_periphs CLKID_SPICC_A>; + clock-names = "core", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spicc1: spi@52000 { + compatible = "amlogic,meson-g12a-spicc"; + reg = <0x0 0x52000 0x0 0x44>; + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkc_periphs CLKID_SYS_SPICC_1>, + <&clkc_periphs CLKID_SPICC_B>; + clock-names = "core", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spifc: spi@56000 { + compatible = "amlogic,a1-spifc"; + reg = <0x0 0x56000 0x0 0x290>; + interrupts = <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>; + clocks = <&clkc_periphs CLKID_SPIFC>; + clock-names = "core"; + status = "disabled"; + }; + + i2c0: i2c@66000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x66000 0x0 0x24>; + interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_SYS_I2C_M_A>; + status = "disabled"; + }; + + i2c1: i2c@68000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x68000 0x0 0x24>; + interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_SYS_I2C_M_B>; + status = "disabled"; + }; + + i2c2: i2c@6a000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x6a000 0x0 0x24>; + interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_SYS_I2C_M_C>; + status = "disabled"; + }; + + i2c3: i2c@6c000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x6c000 0x0 0x24>; + interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_SYS_I2C_M_D>; + status = "disabled"; + }; + uart_b: serial@7a000 { compatible = "amlogic,meson-s4-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x7a000 0x0 0x18>; interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; status = "disabled"; - clocks = <&xtal>, <&xtal>, <&xtal>; + clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_B>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; + sdio: mmc@88000 { + compatible = "amlogic,meson-axg-mmc"; + reg = <0x0 0x88000 0x0 0x800>; + interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>; + power-domains = <&pwrc PWRC_C3_SDIOA_ID>; + clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>, + <&clkc_periphs CLKID_SD_EMMC_A>, + <&clkc_pll CLKID_FCLK_DIV2>; + clock-names = "core","clkin0", "clkin1"; + no-mmc; + no-sd; + resets = <&reset RESET_SD_EMMC_A>; + status = "disabled"; + }; + + sd: mmc@8a000 { + compatible = "amlogic,meson-axg-mmc"; + reg = <0x0 0x8a000 0x0 0x800>; + interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>; + power-domains = <&pwrc PWRC_C3_SDCARD_ID>; + clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>, + <&clkc_periphs CLKID_SD_EMMC_B>, + <&clkc_pll CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + no-mmc; + no-sdio; + resets = <&reset RESET_SD_EMMC_B>; + status = "disabled"; + }; + + nand: nand-controller@8d000 { + compatible = "amlogic,meson-axg-nfc"; + reg = <0x0 0x8d000 0x0 0x200>, + <0x0 0x8C000 0x0 0x4>; + reg-names = "nfc", "emmc"; + interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>; + clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>, + <&clkc_pll CLKID_FCLK_DIV2>; + clock-names = "core", "device"; + status = "disabled"; + }; + }; + + ethmac: ethernet@fdc00000 { + compatible = "amlogic,meson-g12a-dwmac", + "snps,dwmac-3.70a", + "snps,dwmac"; + reg = <0x0 0xfdc00000 0x0 0x10000>, + <0x0 0xfe024000 0x0 0x8>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + power-domains = <&pwrc PWRC_C3_ETH_ID>; + clocks = <&clkc_periphs CLKID_SYS_ETH_MAC>, + <&clkc_pll CLKID_FCLK_DIV2>, + <&clkc_pll CLKID_FCLK_50M>; + clock-names = "stmmaceth", "clkin0", "clkin1"; + rx-fifo-depth = <4096>; + tx-fifo-depth = <2048>; + status = "disabled"; + + mdio0: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; }; -- 2.37.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/3] arm64: dts: amlogic: add some device nodes for C3 2024-08-20 9:41 ` [PATCH v2 2/3] arm64: dts: amlogic: add some device nodes for C3 Xianwei Zhao via B4 Relay @ 2024-08-20 9:56 ` Neil Armstrong 0 siblings, 0 replies; 7+ messages in thread From: Neil Armstrong @ 2024-08-20 9:56 UTC (permalink / raw) To: xianwei.zhao, Jerome Brunet, Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chuan Liu, Kevin Hilman, Martin Blumenstingl Cc: Krzysztof Kozlowski, linux-amlogic, linux-clk, devicetree, linux-kernel, linux-arm-kernel On 20/08/2024 11:41, Xianwei Zhao via B4 Relay wrote: > From: Xianwei Zhao <xianwei.zhao@amlogic.com> > > Add some device nodes for SoC C3, including periphs clock controller > node, PLL clock controller node, SPICC node, regulator node, NAND > controller node, sdcard node, Ethernet MAC and PHY node. > > The sdacrd depends on regulator and pinctrl(select), so some > property fields are placed at the board level. The nand chip > is placed on the board, So some property fields about SPIFC > and NAND controller node are placed at the board level. > THe Ethernet MAC support outchip PHY, so place this property > field(select PHY) at the board level. > > Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> > --- > .../boot/dts/amlogic/amlogic-c3-c302x-aw409.dts | 233 ++++++++++ > arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 487 ++++++++++++++++++++- > 2 files changed, 719 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts > index edce8850b338..b8d2037afc00 100644 > --- a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts > +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts > @@ -16,14 +16,247 @@ / { > > aliases { > serial0 = &uart_b; > + spi0 = &spifc; > }; > > memory@0 { > device_type = "memory"; > reg = <0x0 0x0 0x0 0x10000000>; > }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + /* 9 MiB reserved for ARM Trusted Firmware */ > + secmon_reserved: secmon@7f00000 { > + compatible = "shared-dma-pool"; > + reg = <0x0 0x07f00000 0x0 0x900000>; > + no-map; > + }; > + }; > + > + main_12v: regulator-main-12v { > + compatible = "regulator-fixed"; > + regulator-name = "12V"; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vcc_5v: regulator-vcc-5v { > + compatible = "regulator-fixed"; > + regulator-name = "VCC5V"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&main_12v>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vddq: regulator-vddq { > + compatible = "regulator-fixed"; > + regulator-name = "VDDQ"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + vin-supply = <&main_12v>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vddao_3v3: regulator-vddao-3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VDDAO3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&main_12v>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vddao_1v8: regulator-vddao-1v8 { > + compatible = "regulator-fixed"; > + regulator-name = "VDDAO1V8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + vin-supply = <&vddao_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + ddr4_2v5: regulator-ddr4-2v5 { > + compatible = "regulator-fixed"; > + regulator-name = "DDR4_2V5"; > + regulator-min-microvolt = <2500000>; > + regulator-max-microvolt = <2500000>; > + vin-supply = <&vddao_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vcc_3v3: regulator-vcc-3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VCC3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vddao_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vcc_1v8: regulator-vcc-1v8 { > + compatible = "regulator-fixed"; > + regulator-name = "VCC1V8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + vin-supply = <&vcc_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vdd_1v8: regulator-vdd-1v8 { > + compatible = "regulator-fixed"; > + regulator-name = "VDD1V8_BOOT"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + vin-supply = <&vcc_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vddio_b: regulator-vddio-3v3-b { > + compatible = "regulator-fixed"; > + regulator-name = "VDDIO_B"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + sdcard: regulator-sdcard { > + compatible = "regulator-fixed"; > + regulator-name = "SDCARD_POWER"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vddao_3v3>; > + gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>; > + regulator-boot-on; > + regulator-always-on; > + }; > }; > > &uart_b { > status = "okay"; > }; > + > +&nand { > + status = "okay"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + pinctrl-0 = <&nand_pins>; > + pinctrl-names = "default"; > + > + nand@0 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <1>; > + nand-on-flash-bbt; > + > + partition@0 { > + label = "boot"; > + reg = <0x0 0x00200000>; > + }; > + partition@200000 { > + label = "env"; > + reg = <0x00200000 0x00400000>; > + }; > + partition@600000 { > + label = "system"; > + reg = <0x00600000 0x00a00000>; > + }; > + partition@1000000 { > + label = "rootfs"; > + reg = <0x01000000 0x03000000>; > + }; > + partition@4000000 { > + label = "media"; > + reg = <0x04000000 0x8000000>; > + }; > + }; > +}; > + > +ðmac { > + status = "okay"; > + phy-handle = <&internal_ephy>; > + phy-mode = "rmii"; > +}; > + > +&spifc { > + #address-cells = <1>; > + #size-cells = <0>; > + > + pinctrl-0 = <&spifc_pins>; > + pinctrl-names = "default"; > + > + nand@0 { > + compatible = "spi-nand"; > + reg = <0>; > + spi-max-frequency = <83000000>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + status = "disabled"; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "boot"; > + reg = <0 0x200000>; > + }; > + > + partition@200000 { > + label = "env"; > + reg = <0x200000 0x400000>; > + }; > + > + partition@600000 { > + label = "system"; > + reg = <0x600000 0xa00000>; > + }; > + > + partition@1000000 { > + label = "rootfs"; > + reg = <0x1000000 0x3000000>; > + }; > + > + partition@4000000 { > + label = "data"; > + reg = <0x4000000 0x8000000>; > + }; > + }; > + }; > +}; > + > +&sd { > + status = "okay"; > + pinctrl-0 = <&sdcard_pins>; > + pinctrl-1 = <&sdcard_clk_gate_pins>; > + pinctrl-names = "default","clk-gate"; > + > + bus-width = <4>; > + cap-sd-highspeed; > + max-frequency = <50000000>; > + disable-wp; > + > + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; > + vmmc-supply = <&sdcard>; > + vqmmc-supply = <&sdcard>; > +}; > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi > index f8fb060c49ae..2bf56fbe3dfb 100644 > --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi > +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi > @@ -7,6 +7,11 @@ > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/gpio/gpio.h> > #include <dt-bindings/reset/amlogic,c3-reset.h> > +#include <dt-bindings/clock/amlogic,c3-pll-clkc.h> > +#include <dt-bindings/clock/amlogic,c3-scmi-clkc.h> > +#include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h> > +#include <dt-bindings/power/amlogic,c3-pwrc.h> > +#include <dt-bindings/gpio/amlogic-c3-gpio.h> > > / { > cpus { > @@ -57,6 +62,34 @@ pwrc: power-controller { > }; > }; > > + sram { > + compatible = "mmio-sram"; > + reg = <0x0 0x07f50e00 0x0 0x100>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x0 0x07f50e00 0x100>; > + > + scmi_shmem: sram@0 { > + compatible = "arm,scmi-shmem"; > + reg = <0x0 0x100>; > + }; > + }; > + > + firmware { > + scmi: scmi { > + compatible = "arm,scmi-smc"; > + arm,smc-id = <0x820000C1>; > + shmem = <&scmi_shmem>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + scmi_clk: protocol@14 { > + reg = <0x14>; > + #clock-cells = <1>; > + }; > + }; > + }; > + > soc { > compatible = "simple-bus"; > #address-cells = <2>; > @@ -108,6 +141,237 @@ gpio: bank@4000 { > #gpio-cells = <2>; > gpio-ranges = <&periphs_pinctrl 0 0 55>; > }; > + > + i2c0_pins1: i2c0-pins1 { > + mux { > + groups = "i2c0_sda_e", > + "i2c0_scl_e"; > + function = "i2c0"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c0_pins2: i2c0-pins2 { > + mux { > + groups = "i2c0_sda_d", > + "i2c0_scl_d"; > + function = "i2c0"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c1_pins1: i2c1-pins1 { > + mux { > + groups = "i2c1_sda_x", > + "i2c1_scl_x"; > + function = "i2c1"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c1_pins2: i2c1-pins2 { > + mux { > + groups = "i2c1_sda_d", > + "i2c1_scl_d"; > + function = "i2c1"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c1_pins3: i2c1-pins3 { > + mux { > + groups = "i2c1_sda_a", > + "i2c1_scl_a"; > + function = "i2c1"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c1_pins4: i2c1-pins4 { > + mux { > + groups = "i2c1_sda_b", > + "i2c1_scl_b"; > + function = "i2c1"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c2_pins1: i2c2-pins1 { > + mux { > + groups = "i2c2_sda", > + "i2c2_scl"; > + function = "i2c2"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c3_pins1: i2c3-pins1 { > + mux { > + groups = "i2c3_sda_c", > + "i2c3_scl_c"; > + function = "i2c3"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c3_pins2: i2c3-pins2 { > + mux { > + groups = "i2c3_sda_x", > + "i2c3_scl_x"; > + function = "i2c3"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + i2c3_pins3: i2c3-pins3 { > + mux { > + groups = "i2c3_sda_d", > + "i2c3_scl_d"; > + function = "i2c3"; > + bias-disable; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + nand_pins: nand-pins { > + mux { > + groups = "emmc_nand_d0", > + "emmc_nand_d1", > + "emmc_nand_d2", > + "emmc_nand_d3", > + "emmc_nand_d4", > + "emmc_nand_d5", > + "emmc_nand_d6", > + "emmc_nand_d7", > + "nand_ce0", > + "nand_ale", > + "nand_cle", > + "nand_wen_clk", > + "nand_ren_wr"; > + function = "nand"; > + input-enable; > + }; > + }; > + > + sdcard_pins: sdcard-pins { > + mux { > + groups = "sdcard_d0", > + "sdcard_d1", > + "sdcard_d2", > + "sdcard_d3", > + "sdcard_clk", > + "sdcard_cmd"; > + function = "sdcard"; > + bias-pull-up; > + drive-strength-microamp = <4000>; > + }; > + }; > + > + sdcard_clk_gate_pins: sdcard-clk-cmd-pins { > + mux { > + groups = "GPIOC_4"; > + function = "gpio_periphs"; > + bias-pull-down; > + drive-strength-microamp = <4000>; > + }; > + }; > + > + sdio_m_clk_gate_pins: sdio-m-clk-cmd-pins { > + mux { > + groups = "sdio_clk"; > + function = "sdio"; > + bias-pull-down; > + drive-strength-microamp = <4000>; > + }; > + }; > + > + sdio_m_pins: sdio-m-all-pins { > + mux { > + groups = "sdio_d0", > + "sdio_d1", > + "sdio_d2", > + "sdio_d3", > + "sdio_clk", > + "sdio_cmd"; > + function = "sdio"; > + input-enable; > + bias-pull-up; > + drive-strength-microamp = <4000>; > + }; > + }; > + > + spicc0_pins1: spicc0-pins1 { > + mux { > + groups = "spi_a_mosi_b", > + "spi_a_miso_b", > + "spi_a_clk_b"; > + function = "spi_a"; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + spicc0_pins2: spicc0-pins2 { > + mux { > + groups = "spi_a_mosi_c", > + "spi_a_miso_c", > + "spi_a_clk_c"; > + function = "spi_a"; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + spicc0_pins3: spicc0-pins3 { > + mux { > + groups = "spi_a_mosi_x", > + "spi_a_miso_x", > + "spi_a_clk_x"; > + function = "spi_a"; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + spicc1_pins1: spicc1-pins1 { > + mux { > + groups = "spi_b_mosi_d", > + "spi_b_miso_d", > + "spi_b_clk_d"; > + function = "spi_b"; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + spicc1_pins2: spicc1-pins2 { > + mux { > + groups = "spi_b_mosi_x", > + "spi_b_miso_x", > + "spi_b_clk_x"; > + function = "spi_b"; > + drive-strength-microamp = <3000>; > + }; > + }; > + > + spifc_pins: spifc-pins { > + mux { > + groups = "spif_mo", > + "spif_mi", > + "spif_clk", > + "spif_cs", > + "spif_hold", > + "spif_wp", > + "spif_clk_loop"; > + function = "spif"; > + drive-strength-microamp = <4000>; > + }; > + }; > }; > > gpio_intc: interrupt-controller@4080 { > @@ -119,16 +383,237 @@ gpio_intc: interrupt-controller@4080 { > <10 11 12 13 14 15 16 17 18 19 20 21>; > }; > > + clkc_pll: clock-controller@8000 { > + compatible = "amlogic,c3-pll-clkc"; > + reg = <0x0 0x8000 0x0 0x1a4>; > + #clock-cells = <1>; > + clocks = <&scmi_clk CLKID_TOP_PLL_OSC>, > + <&scmi_clk CLKID_MCLK_PLL_OSC>, > + <&scmi_clk CLKID_FIXED_PLL_OSC>; > + clock-names = "top", > + "mclk", > + "fix"; > + }; > + > + clkc_periphs: clock-controller@0 { > + compatible = "amlogic,c3-peripherals-clkc"; > + reg = <0x0 0x0 0x0 0x49c>; > + #clock-cells = <1>; > + clocks = <&xtal>, > + <&scmi_clk CLKID_OSC>, > + <&scmi_clk CLKID_FIXED_PLL_OSC>, > + <&clkc_pll CLKID_FCLK_DIV2>, > + <&clkc_pll CLKID_FCLK_DIV2P5>, > + <&clkc_pll CLKID_FCLK_DIV3>, > + <&clkc_pll CLKID_FCLK_DIV4>, > + <&clkc_pll CLKID_FCLK_DIV5>, > + <&clkc_pll CLKID_FCLK_DIV7>, > + <&clkc_pll CLKID_GP0_PLL>, > + <&scmi_clk CLKID_GP1_PLL_OSC>, > + <&clkc_pll CLKID_HIFI_PLL>, > + <&scmi_clk CLKID_SYS_CLK>, > + <&scmi_clk CLKID_AXI_CLK>, > + <&scmi_clk CLKID_SYS_PLL_DIV16>, > + <&scmi_clk CLKID_CPU_CLK_DIV16>; > + clock-names = "xtal_24m", > + "oscin", > + "fix", > + "fdiv2", > + "fdiv2p5", > + "fdiv3", > + "fdiv4", > + "fdiv5", > + "fdiv7", > + "gp0", > + "gp1", > + "hifi", > + "sysclk", > + "axiclk", > + "sysplldiv16", > + "cpudiv16"; > + }; This node should come first and not after clock-controller@8000 > + > + eth_phy: mdio-multiplexer@28000 { > + compatible = "amlogic,g12a-mdio-mux"; > + reg = <0x0 0x28000 0x0 0xa4>; > + > + clocks = <&clkc_periphs CLKID_SYS_ETH_PHY>, > + <&xtal>, > + <&clkc_pll CLKID_FCLK_50M>; > + clock-names = "pclk", "clkin0", "clkin1"; > + mdio-parent-bus = <&mdio0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ext_mdio: mdio@0 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + int_mdio: mdio@1 { > + reg = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + internal_ephy: ethernet_phy@8 { > + compatible = "ethernet-phy-id0180.3301", > + "ethernet-phy-ieee802.3-c22"; > + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; > + reg = <8>; > + max-speed = <100>; > + }; > + }; > + }; > + > + spicc0: spi@50000 { > + compatible = "amlogic,meson-g12a-spicc"; > + reg = <0x0 0x50000 0x0 0x44>; > + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clkc_periphs CLKID_SYS_SPICC_0>, > + <&clkc_periphs CLKID_SPICC_A>; > + clock-names = "core", "pclk"; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + }; > + > + spicc1: spi@52000 { > + compatible = "amlogic,meson-g12a-spicc"; > + reg = <0x0 0x52000 0x0 0x44>; > + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clkc_periphs CLKID_SYS_SPICC_1>, > + <&clkc_periphs CLKID_SPICC_B>; > + clock-names = "core", "pclk"; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + }; > + > + spifc: spi@56000 { > + compatible = "amlogic,a1-spifc"; > + reg = <0x0 0x56000 0x0 0x290>; > + interrupts = <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>; > + clocks = <&clkc_periphs CLKID_SPIFC>; > + clock-names = "core"; > + status = "disabled"; > + }; > + > + i2c0: i2c@66000 { > + compatible = "amlogic,meson-axg-i2c"; > + reg = <0x0 0x66000 0x0 0x24>; > + interrupts = <GIC_SPI 160 IRQ_TYPE_EDGE_RISING>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_SYS_I2C_M_A>; > + status = "disabled"; > + }; > + > + i2c1: i2c@68000 { > + compatible = "amlogic,meson-axg-i2c"; > + reg = <0x0 0x68000 0x0 0x24>; > + interrupts = <GIC_SPI 161 IRQ_TYPE_EDGE_RISING>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_SYS_I2C_M_B>; > + status = "disabled"; > + }; > + > + i2c2: i2c@6a000 { > + compatible = "amlogic,meson-axg-i2c"; > + reg = <0x0 0x6a000 0x0 0x24>; > + interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_SYS_I2C_M_C>; > + status = "disabled"; > + }; > + > + i2c3: i2c@6c000 { > + compatible = "amlogic,meson-axg-i2c"; > + reg = <0x0 0x6c000 0x0 0x24>; > + interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&clkc_periphs CLKID_SYS_I2C_M_D>; > + status = "disabled"; > + }; > + > uart_b: serial@7a000 { > compatible = "amlogic,meson-s4-uart", > "amlogic,meson-ao-uart"; > reg = <0x0 0x7a000 0x0 0x18>; > interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; > status = "disabled"; > - clocks = <&xtal>, <&xtal>, <&xtal>; > + clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_B>, <&xtal>; > clock-names = "xtal", "pclk", "baud"; > }; > > + sdio: mmc@88000 { > + compatible = "amlogic,meson-axg-mmc"; > + reg = <0x0 0x88000 0x0 0x800>; > + interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>; > + power-domains = <&pwrc PWRC_C3_SDIOA_ID>; > + clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_A>, > + <&clkc_periphs CLKID_SD_EMMC_A>, > + <&clkc_pll CLKID_FCLK_DIV2>; > + clock-names = "core","clkin0", "clkin1"; > + no-mmc; > + no-sd; > + resets = <&reset RESET_SD_EMMC_A>; > + status = "disabled"; > + }; > + > + sd: mmc@8a000 { > + compatible = "amlogic,meson-axg-mmc"; > + reg = <0x0 0x8a000 0x0 0x800>; > + interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>; > + power-domains = <&pwrc PWRC_C3_SDCARD_ID>; > + clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_B>, > + <&clkc_periphs CLKID_SD_EMMC_B>, > + <&clkc_pll CLKID_FCLK_DIV2>; > + clock-names = "core", "clkin0", "clkin1"; > + no-mmc; > + no-sdio; > + resets = <&reset RESET_SD_EMMC_B>; > + status = "disabled"; > + }; > + > + nand: nand-controller@8d000 { > + compatible = "amlogic,meson-axg-nfc"; > + reg = <0x0 0x8d000 0x0 0x200>, > + <0x0 0x8C000 0x0 0x4>; > + reg-names = "nfc", "emmc"; > + interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>; > + clocks = <&clkc_periphs CLKID_SYS_SD_EMMC_C>, > + <&clkc_pll CLKID_FCLK_DIV2>; > + clock-names = "core", "device"; > + status = "disabled"; > + }; > + }; > + > + ethmac: ethernet@fdc00000 { > + compatible = "amlogic,meson-g12a-dwmac", > + "snps,dwmac-3.70a", > + "snps,dwmac"; > + reg = <0x0 0xfdc00000 0x0 0x10000>, > + <0x0 0xfe024000 0x0 0x8>; > + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; > + power-domains = <&pwrc PWRC_C3_ETH_ID>; > + clocks = <&clkc_periphs CLKID_SYS_ETH_MAC>, > + <&clkc_pll CLKID_FCLK_DIV2>, > + <&clkc_pll CLKID_FCLK_50M>; > + clock-names = "stmmaceth", "clkin0", "clkin1"; > + rx-fifo-depth = <4096>; > + tx-fifo-depth = <2048>; > + status = "disabled"; > + > + mdio0: mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > }; > }; > }; > Apart that, it looks fine Neil ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 3/3] arm64: dts: amlogic: add C3 AW419 board 2024-08-20 9:41 [PATCH v2 0/3] add some node for amlogic c3 Xianwei Zhao via B4 Relay 2024-08-20 9:41 ` [PATCH v2 1/3] dt-bindings: clock: fix C3 PLL input parameter Xianwei Zhao via B4 Relay 2024-08-20 9:41 ` [PATCH v2 2/3] arm64: dts: amlogic: add some device nodes for C3 Xianwei Zhao via B4 Relay @ 2024-08-20 9:41 ` Xianwei Zhao via B4 Relay 2024-08-20 15:21 ` Neil Armstrong 2 siblings, 1 reply; 7+ messages in thread From: Xianwei Zhao via B4 Relay @ 2024-08-20 9:41 UTC (permalink / raw) To: Neil Armstrong, Jerome Brunet, Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chuan Liu, Kevin Hilman, Martin Blumenstingl Cc: Krzysztof Kozlowski, linux-amlogic, linux-clk, devicetree, linux-kernel, linux-arm-kernel, Xianwei Zhao From: Xianwei Zhao <xianwei.zhao@amlogic.com> Add Amlogic C3 C308L AW419 board. The corresponding binding has been applied, therefore, this series does not need to add a binding corresponding to the AW419 board. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts | 262 +++++++++++++++++++++ 2 files changed, 263 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 29417f04f886..2fbda8419c65 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb +dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts new file mode 100644 index 000000000000..4477a2659e27 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts @@ -0,0 +1,262 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "amlogic-c3.dtsi" + +/ { + model = "Amlogic C308l aw419 Development Board"; + compatible = "amlogic,aw419", "amlogic,c3"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_b; + spi0 = &spifc; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 9 MiB reserved for ARM Trusted Firmware */ + secmon_reserved: secmon@7f00000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x07f00000 0x0 0x900000>; + no-map; + }; + }; + + main_12v: regulator-main-12v { + compatible = "regulator-fixed"; + regulator-name = "12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_5v: regulator-vcc-5v { + compatible = "regulator-fixed"; + regulator-name = "VCC5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&main_12v>; + regulator-boot-on; + regulator-always-on; + }; + + vddq: regulator-vddq { + compatible = "regulator-fixed"; + regulator-name = "VDDQ"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&main_12v>; + regulator-boot-on; + regulator-always-on; + }; + + vddao_3v3: regulator-vddao-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&main_12v>; + regulator-boot-on; + regulator-always-on; + }; + + vddao_1v8: regulator-vddao-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + ddr4_2v5: regulator-ddr4-2v5 { + compatible = "regulator-fixed"; + regulator-name = "DDR4_2V5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + vin-supply = <&vddao_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_3v3: regulator-vcc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_1v8: regulator-vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + vdd_1v8: regulator-vdd-1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDD1V8_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + vddio_b: regulator-vddio-3v3-b { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_B"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3>; + regulator-boot-on; + regulator-always-on; + }; + + sdcard: regulator-sdcard { + compatible = "regulator-fixed"; + regulator-name = "SDCARD_POWER"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&uart_b { + status = "okay"; +}; + +&nand { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + nand-on-flash-bbt; + + partition@0 { + label = "boot"; + reg = <0x0 0x00200000>; + }; + partition@200000 { + label = "env"; + reg = <0x00200000 0x00400000>; + }; + partition@600000 { + label = "system"; + reg = <0x00600000 0x00a00000>; + }; + partition@1000000 { + label = "rootfs"; + reg = <0x01000000 0x03000000>; + }; + partition@4000000 { + label = "media"; + reg = <0x04000000 0x8000000>; + }; + }; +}; + +ðmac { + status = "okay"; + phy-handle = <&internal_ephy>; + phy-mode = "rmii"; +}; + +&spifc { + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-0 = <&spifc_pins>; + pinctrl-names = "default"; + + nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <83000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "boot"; + reg = <0 0x200000>; + }; + + partition@200000 { + label = "env"; + reg = <0x200000 0x400000>; + }; + + partition@600000 { + label = "system"; + reg = <0x600000 0xa00000>; + }; + + partition@1000000 { + label = "rootfs"; + reg = <0x1000000 0x3000000>; + }; + + partition@4000000 { + label = "data"; + reg = <0x4000000 0x8000000>; + }; + }; + }; +}; + +&sd { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default","clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&sdcard>; + vqmmc-supply = <&sdcard>; +}; -- 2.37.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 3/3] arm64: dts: amlogic: add C3 AW419 board 2024-08-20 9:41 ` [PATCH v2 3/3] arm64: dts: amlogic: add C3 AW419 board Xianwei Zhao via B4 Relay @ 2024-08-20 15:21 ` Neil Armstrong 0 siblings, 0 replies; 7+ messages in thread From: Neil Armstrong @ 2024-08-20 15:21 UTC (permalink / raw) To: xianwei.zhao, Jerome Brunet, Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chuan Liu, Kevin Hilman, Martin Blumenstingl Cc: Krzysztof Kozlowski, linux-amlogic, linux-clk, devicetree, linux-kernel, linux-arm-kernel On 20/08/2024 11:41, Xianwei Zhao via B4 Relay wrote: > From: Xianwei Zhao <xianwei.zhao@amlogic.com> > > Add Amlogic C3 C308L AW419 board. The corresponding binding > has been applied, therefore, this series does not need to > add a binding corresponding to the AW419 board. > > Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> > --- > arch/arm64/boot/dts/amlogic/Makefile | 1 + > .../boot/dts/amlogic/amlogic-c3-c308l-aw419.dts | 262 +++++++++++++++++++++ > 2 files changed, 263 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile > index 29417f04f886..2fbda8419c65 100644 > --- a/arch/arm64/boot/dts/amlogic/Makefile > +++ b/arch/arm64/boot/dts/amlogic/Makefile > @@ -2,6 +2,7 @@ > dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb > dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb > dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb > +dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb > dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb > dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb > dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb > diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts > new file mode 100644 > index 000000000000..4477a2659e27 > --- /dev/null > +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c308l-aw419.dts > @@ -0,0 +1,262 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. > + */ > + > +/dts-v1/; > + > +#include "amlogic-c3.dtsi" > + > +/ { > + model = "Amlogic C308l aw419 Development Board"; > + compatible = "amlogic,aw419", "amlogic,c3"; > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + aliases { > + serial0 = &uart_b; > + spi0 = &spifc; > + }; > + > + memory@0 { > + device_type = "memory"; > + reg = <0x0 0x0 0x0 0x80000000>; > + }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + /* 9 MiB reserved for ARM Trusted Firmware */ > + secmon_reserved: secmon@7f00000 { > + compatible = "shared-dma-pool"; > + reg = <0x0 0x07f00000 0x0 0x900000>; > + no-map; > + }; > + }; > + > + main_12v: regulator-main-12v { > + compatible = "regulator-fixed"; > + regulator-name = "12V"; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vcc_5v: regulator-vcc-5v { > + compatible = "regulator-fixed"; > + regulator-name = "VCC5V"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&main_12v>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vddq: regulator-vddq { > + compatible = "regulator-fixed"; > + regulator-name = "VDDQ"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + vin-supply = <&main_12v>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vddao_3v3: regulator-vddao-3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VDDAO3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&main_12v>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vddao_1v8: regulator-vddao-1v8 { > + compatible = "regulator-fixed"; > + regulator-name = "VDDAO1V8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + vin-supply = <&vddao_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + ddr4_2v5: regulator-ddr4-2v5 { > + compatible = "regulator-fixed"; > + regulator-name = "DDR4_2V5"; > + regulator-min-microvolt = <2500000>; > + regulator-max-microvolt = <2500000>; > + vin-supply = <&vddao_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vcc_3v3: regulator-vcc-3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VCC3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vddao_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vcc_1v8: regulator-vcc-1v8 { > + compatible = "regulator-fixed"; > + regulator-name = "VCC1V8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + vin-supply = <&vcc_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vdd_1v8: regulator-vdd-1v8 { > + compatible = "regulator-fixed"; > + regulator-name = "VDD1V8_BOOT"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + vin-supply = <&vcc_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + vddio_b: regulator-vddio-3v3-b { > + compatible = "regulator-fixed"; > + regulator-name = "VDDIO_B"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc_3v3>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > + sdcard: regulator-sdcard { > + compatible = "regulator-fixed"; > + regulator-name = "SDCARD_POWER"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vddao_3v3>; > + gpio = <&gpio GPIOA_4 GPIO_ACTIVE_LOW>; > + regulator-boot-on; > + regulator-always-on; > + }; > +}; > + > +&uart_b { > + status = "okay"; > +}; > + > +&nand { > + status = "okay"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + pinctrl-0 = <&nand_pins>; > + pinctrl-names = "default"; > + > + nand@0 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <1>; > + nand-on-flash-bbt; > + > + partition@0 { > + label = "boot"; > + reg = <0x0 0x00200000>; > + }; > + partition@200000 { > + label = "env"; > + reg = <0x00200000 0x00400000>; > + }; > + partition@600000 { > + label = "system"; > + reg = <0x00600000 0x00a00000>; > + }; > + partition@1000000 { > + label = "rootfs"; > + reg = <0x01000000 0x03000000>; > + }; > + partition@4000000 { > + label = "media"; > + reg = <0x04000000 0x8000000>; > + }; > + }; > +}; > + > +ðmac { > + status = "okay"; > + phy-handle = <&internal_ephy>; > + phy-mode = "rmii"; > +}; > + > +&spifc { > + #address-cells = <1>; > + #size-cells = <0>; > + > + pinctrl-0 = <&spifc_pins>; > + pinctrl-names = "default"; > + > + nand@0 { > + compatible = "spi-nand"; > + reg = <0>; > + spi-max-frequency = <83000000>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; > + #address-cells = <1>; > + #size-cells = <1>; > + status = "disabled"; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "boot"; > + reg = <0 0x200000>; > + }; > + > + partition@200000 { > + label = "env"; > + reg = <0x200000 0x400000>; > + }; > + > + partition@600000 { > + label = "system"; > + reg = <0x600000 0xa00000>; > + }; > + > + partition@1000000 { > + label = "rootfs"; > + reg = <0x1000000 0x3000000>; > + }; > + > + partition@4000000 { > + label = "data"; > + reg = <0x4000000 0x8000000>; > + }; > + }; > + }; > +}; > + > +&sd { > + status = "okay"; > + pinctrl-0 = <&sdcard_pins>; > + pinctrl-1 = <&sdcard_clk_gate_pins>; > + pinctrl-names = "default","clk-gate"; > + > + bus-width = <4>; > + cap-sd-highspeed; > + max-frequency = <50000000>; > + disable-wp; > + > + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; > + vmmc-supply = <&sdcard>; > + vqmmc-supply = <&sdcard>; > +}; > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2024-08-20 15:21 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-08-20 9:41 [PATCH v2 0/3] add some node for amlogic c3 Xianwei Zhao via B4 Relay 2024-08-20 9:41 ` [PATCH v2 1/3] dt-bindings: clock: fix C3 PLL input parameter Xianwei Zhao via B4 Relay 2024-08-20 11:07 ` Krzysztof Kozlowski 2024-08-20 9:41 ` [PATCH v2 2/3] arm64: dts: amlogic: add some device nodes for C3 Xianwei Zhao via B4 Relay 2024-08-20 9:56 ` Neil Armstrong 2024-08-20 9:41 ` [PATCH v2 3/3] arm64: dts: amlogic: add C3 AW419 board Xianwei Zhao via B4 Relay 2024-08-20 15:21 ` Neil Armstrong
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