Re: [PATCH v2 3/8] arm64: dts: qcom: qcs6490-rb3gen2: Add node for qps615

Krishna Chaitanya Chundru
2024-08-05T04:14:25Z

On 8/4/2024 2:24 PM, Krzysztof Kozlowski wrote:
> On 03/08/2024 05:22, Krishna chaitanya chundru wrote:
>> Add QPS615 PCIe switch node which has 3 downstream ports and in one
>> downstream port two embedded ethernet devices are present.
>>
>> Power to the QPS615 is supplied through two LDO regulators, controlled
>> by two GPIOs, these are added as fixed regulators.
>>
>> Add i2c device node which is used to configure the switch.
>>
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 121 +++++++++++++++++++++++++++
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +-
>> 2 files changed, 122 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>> index 0d45662b8028..59d209768636 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>> @@ -202,6 +202,30 @@ vph_pwr: vph-pwr-regulator {
>> regulator-min-microvolt = <3700000>;
>> regulator-max-microvolt = <3700000>;
>> };
>> +
>> + vdd_ntn_0p9: regulator-vdd-ntn-0p9 {
>> + compatible = "regulator-fixed";
>> + regulator-name = "VDD_NTN_0P9";
>> + gpio = <&pm8350c_gpios 2 GPIO_ACTIVE_HIGH>;
>> + regulator-min-microvolt = <899400>;
>> + regulator-max-microvolt = <899400>;
>> + enable-active-high;
>> + pinctrl-0 = <&ntn_0p9_en>;
>> + pinctrl-names = "default";
>> + regulator-enable-ramp-delay = <4300>;
>> + };
>> +
>> + vdd_ntn_1p8: regulator-vdd-ntn-1p8 {
>> + compatible = "regulator-fixed";
>> + regulator-name = "VDD_NTN_1P8";
>> + gpio = <&pm8350c_gpios 3 GPIO_ACTIVE_HIGH>;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + enable-active-high;
>> + pinctrl-0 = <&ntn_1p8_en>;
>> + pinctrl-names = "default";
>> + regulator-enable-ramp-delay = <10000>;
>> + };
>> };
>>
>> &apps_rsc {
>> @@ -595,6 +619,12 @@ lt9611_out: endpoint {
>> };
>> };
>> };
>> +
>> + qps615_switch: pcie-switch@77 {
>> + compatible = "qcom,qps615";
>> + reg = <0x77>;
>> + status = "okay";
>
> Where is it disabled?
>
let me check this, I taught if we are using a
phandle it should be enabled, if not the case
I will make it as disabled only.
>> + };
>> };
>>
>> &i2c1 {
>> @@ -688,6 +718,75 @@ &pmk8350_rtc {
>> status = "okay";
>> };
>>
>> +&pcie1 {
>
> Entries are ordered.
>
ack.

-- Krishna Chaitanya.
>> + status = "okay";
>> +};
>
>
>>
>
> Best regards,
> Krzysztof
>