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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <7969b2e6-1046-4bd4-bdfe-d2bc12a1db1b@kernel.org> On Fri, Aug 23, 2024 at 11:06:28AM +0200, Krzysztof Kozlowski wrote: > On 22/08/2024 16:09, Manivannan Sadhasivam wrote: > > On Thu, Aug 08, 2024 at 03:06:28PM +0200, Krzysztof Kozlowski wrote: > >> On 08/08/2024 14:41, Manivannan Sadhasivam wrote: > >>> On Thu, Aug 08, 2024 at 02:13:01PM +0200, Krzysztof Kozlowski wrote: > >>>> On 08/08/2024 14:01, Manivannan Sadhasivam wrote: > >>>>> On Mon, Aug 05, 2024 at 07:18:04PM +0200, Krzysztof Kozlowski wrote: > >>>>>> On 05/08/2024 19:07, Bjorn Andersson wrote: > >>>>>>> On Mon, Aug 05, 2024 at 09:41:26AM +0530, Krishna Chaitanya Chundru wrote: > >>>>>>>> On 8/4/2024 2:23 PM, Krzysztof Kozlowski wrote: > >>>>>>>>> On 03/08/2024 05:22, Krishna chaitanya chundru wrote: > >>>>>>>>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,qps615.yaml b/Documentation/devicetree/bindings/pci/qcom,qps615.yaml > >>>>>>> [..] > >>>>>>>>>> + qps615,axi-clk-freq-hz: > >>>>>>>>>> + description: > >>>>>>>>>> + AXI clock which internal bus of the switch. > >>>>>>>>> > >>>>>>>>> No need, use CCF. > >>>>>>>>> > >>>>>>>> ack > >>>>>>> > >>>>>>> This is a clock that's internal to the QPS615, so there's no clock > >>>>>>> controller involved and hence I don't think CCF is applicable. > >>>>>> > >>>>>> AXI does not sound that internal. > >>>>> > >>>>> Well, AXI is applicable to whatever entity that implements it. We mostly seen it > >>>>> in ARM SoCs (host), but in this case the PCIe switch also has a microcontroller > >>>>> /processor of some sort, so AXI is indeed relevant for it. The naming actually > >>>>> comes from the switch's i2c register name that is being configured in the driver > >>>>> based on this property value. > >>>>> > >>>>>> DT rarely needs to specify internal > >>>>>> clock rates. What if you want to define rates for 20 clocks? Even > >>>>>> clock-frequency is deprecated, so why this would be allowed? > >>>>>> bus-frequency is allowed for buses, but that's not the case here, I guess? > >>>>>> > >>>>> > >>>>> This clock frequency is for the switch's internal AXI bus that runs at default > >>>>> 200MHz. And this property is used to specify a frequency that is configured over > >>>>> the i2c interface so that the switch's AXI bus can operate in a low frequency > >>>>> there by reducing the power consumption of the switch. > >>>>> > >>>>> It is not strictly needed for the switch operation, but for power optimization. > >>>>> So this property can also be dropped for the initial submission and added later > >>>>> if you prefer. > >>>> > >>>> So if the clock rate can change, why this is static in DTB? Or why this > >>>> is configurable per-board? > >>>> > >>> > >>> Because, board manufacturers can change the frequency depending on the switch > >>> configuration (enablement of DSP's etc...) > >>> > >>>> There is a reason why clock-frequency property is not welcomed and you > >>>> are re-implementing it. > >>>> > >>> > >>> Hmm, I'm not aware that 'clock-frequency' is not encouraged these days. So you > >>> are suggesting to change the rate in the driver itself based on the switch > >>> configuration? If so, what difference does it make? > >> > >> Based on the switch, other clocks, votes etc. whatever is reasonable > >> there. In most cases, not sure if this one here as well, devices can > >> operate on different clock frequencies thus specifying fixed frequency > >> in the DTS is simplification and lack of flexibility. It is chosen by > >> people only because it is easier for them but then they come back with > >> ABI issues when it turns out they need to switch to some dynamic control. > >> > > > > Atleast for this device, this frequency is going to be static. Because, the > > device itself cannot change the frequency, only the host driver can. That too is > > only possible before enumerating the device. So there is no way the frequency is > > going to change dynamically. > > We have assigned-clocks properties for this... but there are no clock > inputs here, so maybe it is not applicable? What generates this internal > AXI clock? Does it have internal oscillator? > I do not have access to the device schematics, but based on my knowledge there should be an internal oscillator for the device. But the device also gets the refclk from PCIe bus, but I don't know if that is somehow used as a parent of AXI bus or not. Going by the AXI bus terminology, I would assume that the frequency of this come from the internal oscillator in the device. And this is common on many PCIe devices, but they never mentioned in DT (well we do not define PCIe devices in DT usually), but Qcom wants to control the frequency of the device's internal clock to optimize the power consumption of the device. Unfortunately, the device firmware is not doing its job as expected. - Mani -- மணிவண்ணன் சதாசிவம்