[PATCH v5 0/3] Add SARADC support on Sophgo CV18XX series

[PATCH v5 0/3] Add SARADC support on Sophgo CV18XX series

[Thomas Bonnefille]

This patchset adds initial ADC support for Sophgo CV18XX series SoC. This driver can
work with or without interrupt.

Link: https://github.com/sophgo/sophgo-doc/releases/download/sg2002-trm-v1.0/sg2002_trm_en.pdf

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
Changes in v5:
- Add the ability to read the sample frequency
- Edit commit message to remove No-Die reference and add precision on
  the ADC series
- Rename binding and driver file to match compatible
- Reformat the channel property in the binding
- Clean driver code
- Link to v4: https://lore.kernel.org/r/20240812-sg2002-adc-v4-0-599bdb67592f@bootlin.com

Changes in v4:
- Lowercase register hexadecimal value in dts
- Reorder properties in dts
- Use only a const in the compatible property of the device tree bindings
- Specify the series of SoC in the driver to avoid confusing with other
  Sophgo SoCs
- Add channel description in the bindings
- Use FIELD_PREP in the default configuration
- Index channels from 0
- Return PTR_ERR instead of IS_ERR
- Link to v3: https://lore.kernel.org/r/20240731-sg2002-adc-v3-0-5ac40a518c0a@bootlin.com

Changes in v3:
- Subdivide default cycle configuration into multiple elementary
  configurations
- Fix formatting in the driver
- Use devm_mutex_init
- Use devm_clk_get_enabled now because the clock is no more optional
- Remove handling of Saradc in No-Die Domain as RTC isn't implemented yet
- Use cv1800-saradc as default compatible instead of a wildcard
- Remove platform_set_drvdata as it wasn't used
- Link to v2: https://lore.kernel.org/r/20240705-sg2002-adc-v2-0-83428c20a9b2@bootlin.com

Changes in v2:
- Drop modifications in MAINTAINERS file
- Rename the ADC from "sophgo-adc" to "sophgo-cv18xx-adc" to avoid
  conflict with ADCs available in future Sophgo SoCs.
- Reorder nodes in DT to match DTS coding style
- Switch from including <linux/of.h> to <linux/mod_devicetable.h>
- Use scoped_guard instead of mutex_lock/unlock
- Check IRQ Status in the handler
- Change IIO device name
- Use devm_clk_get_optional_enabled instead of a clock variable
- Init completion before the IRQ request
- Removed unnecessary iio_info structure in the private data of the
  driver
- Use SoC specific compatible in the bindings and device trees
- Link to v1: https://lore.kernel.org/r/20240702-sg2002-adc-v1-0-ac66e076a756@bootlin.com

---
Thomas Bonnefille (3):
      dt-bindings: iio: adc: sophgo,cv1800b-saradc: Add Sophgo CV1800B SARADC
      iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC
      riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B

 .../bindings/iio/adc/sophgo,cv1800b-saradc.yaml    |  83 ++++++++
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi             |  22 +++
 drivers/iio/adc/Kconfig                            |  10 +
 drivers/iio/adc/Makefile                           |   1 +
 drivers/iio/adc/sophgo-cv1800b-adc.c               | 218 +++++++++++++++++++++
 5 files changed, 334 insertions(+)
---
base-commit: 5be63fc19fcaa4c236b307420483578a56986a37
change-id: 20240527-sg2002-adc-924b862cd3f2

Best regards,
-- 
Thomas Bonnefille <thomas.bonnefille@bootlin.com>

[PATCH v5 1/3] dt-bindings: iio: adc: sophgo,cv1800b-saradc: Add Sophgo CV1800B SARADC

[Thomas Bonnefille]

The Sophgo CV1800B SARADC is a Successive Approximation ADC that can be
found in the Sophgo CV1800B SoC.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 .../bindings/iio/adc/sophgo,cv1800b-saradc.yaml    | 83 ++++++++++++++++++++++
 1 file changed, 83 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/sophgo,cv1800b-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/sophgo,cv1800b-saradc.yaml
new file mode 100644
index 000000000000..f652b98615f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/sophgo,cv1800b-saradc.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/sophgo,cv1800b-saradc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title:
+  Sophgo CV1800B SoC 3 channels Successive Approximation Analog to
+  Digital Converters
+
+maintainers:
+  - Thomas Bonnefille <thomas.bonnefille@bootlin.com>
+
+description:
+  Datasheet at https://github.com/sophgo/sophgo-doc/releases
+
+properties:
+  compatible:
+    const: sophgo,cv1800b-saradc
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 0
+
+patternProperties:
+  "^channel@[0-2]$":
+    $ref: adc.yaml
+
+    properties:
+      reg:
+        items:
+          - minimum: 0
+            maximum: 2
+
+    required:
+      - reg
+
+    additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - '#address-cells'
+  - '#size-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/sophgo,cv1800.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    adc@30f0000 {
+        compatible = "sophgo,cv1800b-saradc";
+        reg = <0x030f0000 0x1000>;
+        clocks = <&clk CLK_SARADC>;
+        interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        channel@0 {
+            reg = <0>;
+        };
+
+        channel@1 {
+            reg = <1>;
+        };
+
+        channel@2 {
+            reg = <2>;
+        };
+    };

-- 
2.46.0

[PATCH v5 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC

[Thomas Bonnefille]

This adds a driver for the Sophgo CV1800B SARADC.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 drivers/iio/adc/Kconfig              |  10 ++
 drivers/iio/adc/Makefile             |   1 +
 drivers/iio/adc/sophgo-cv1800b-adc.c | 218 +++++++++++++++++++++++++++++++++++
 3 files changed, 229 insertions(+)

diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index f60fe85a30d5..b081cfd0ab26 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -1156,6 +1156,16 @@ config SC27XX_ADC
 	  This driver can also be built as a module. If so, the module
 	  will be called sc27xx_adc.
 
+config SOPHGO_CV1800B_ADC
+	tristate "Sophgo CV1800B SARADC"
+	depends on ARCH_SOPHGO || COMPILE_TEST
+	help
+	  Say yes here to build support for the SARADC integrated inside
+	  the Sophgo CV1800B SoC.
+
+	  This driver can also be built as a module. If so, the module
+	  will be called sophgo_cv1800b_adc.
+
 config SPEAR_ADC
 	tristate "ST SPEAr ADC"
 	depends on PLAT_SPEAR || COMPILE_TEST
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index d370e066544e..c4d362a99674 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -105,6 +105,7 @@ obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
 obj-$(CONFIG_RZG2L_ADC) += rzg2l_adc.o
 obj-$(CONFIG_SC27XX_ADC) += sc27xx_adc.o
 obj-$(CONFIG_SD_ADC_MODULATOR) += sd_adc_modulator.o
+obj-$(CONFIG_SOPHGO_CV1800B_ADC) += sophgo-cv1800b-adc.o
 obj-$(CONFIG_SPEAR_ADC) += spear_adc.o
 obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o
 obj-$(CONFIG_STM32_ADC) += stm32-adc.o
diff --git a/drivers/iio/adc/sophgo-cv1800b-adc.c b/drivers/iio/adc/sophgo-cv1800b-adc.c
new file mode 100644
index 000000000000..f4cdec966694
--- /dev/null
+++ b/drivers/iio/adc/sophgo-cv1800b-adc.c
@@ -0,0 +1,218 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ *  Sophgo CV1800B SARADC Driver
+ *
+ *  Copyright (C) Bootlin 2024
+ *  Author: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
+ */
+
+#include <linux/bitfield.h>
+#include <linux/clk.h>
+#include <linux/completion.h>
+#include <linux/interrupt.h>
+#include <linux/iio/iio.h>
+#include <linux/iopoll.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/platform_device.h>
+
+#define CV1800B_ADC_CTRL_REG				0x04
+#define	  CV1800B_ADC_EN				BIT(0)
+#define	  CV1800B_ADC_SEL(x)				BIT((x) + 5)
+#define CV1800B_ADC_STATUS_REG				0x08
+#define	  CV1800B_ADC_BUSY				BIT(0)
+#define CV1800B_ADC_CYC_SET_REG				0x0C
+#define   CV1800B_MASK_STARTUP_CYCLE			GENMASK(4, 0)
+#define   CV1800B_MASK_SAMPLE_WINDOW			GENMASK(11, 8)
+#define   CV1800B_MASK_CLKDIV				GENMASK(15, 12)
+#define   CV1800B_MASK_COMPARE_CYCLE			GENMASK(19, 16)
+#define CV1800B_ADC_CH_RESULT_REG(x)			(0x14 + 4 * (x))
+#define	  CV1800B_ADC_CH_RESULT				GENMASK(11, 0)
+#define	  CV1800B_ADC_CH_VALID				BIT(15)
+#define CV1800B_ADC_INTR_EN_REG				0x20
+#define CV1800B_ADC_INTR_CLR_REG			0x24
+#define	  CV1800B_ADC_INTR_CLR_BIT			BIT(0)
+#define CV1800B_ADC_INTR_STA_REG			0x28
+#define	  CV1800B_ADC_INTR_STA_BIT			BIT(0)
+#define CV1800B_READ_TIMEOUT_MS				1000
+#define CV1800B_READ_TIMEOUT_US				(CV1800B_READ_TIMEOUT_MS * 1000)
+
+#define CV1800B_ADC_CHANNEL(index)					\
+	{								\
+		.type = IIO_VOLTAGE,					\
+		.indexed = 1,						\
+		.channel = index,					\
+		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
+		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
+		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
+		.scan_index = index,					\
+	}
+
+struct cv1800b_adc {
+	struct completion completion;
+	void __iomem *regs;
+	struct mutex lock; /* ADC Control and Result register */
+	struct clk *clk;
+	int irq;
+};
+
+static const struct iio_chan_spec sophgo_channels[] = {
+	CV1800B_ADC_CHANNEL(0),
+	CV1800B_ADC_CHANNEL(1),
+	CV1800B_ADC_CHANNEL(2),
+};
+
+static void cv1800b_adc_start_measurement(struct cv1800b_adc *saradc,
+					  int channel)
+{
+	writel(0, saradc->regs + CV1800B_ADC_CTRL_REG);
+	writel(CV1800B_ADC_SEL(channel) | CV1800B_ADC_EN,
+	       saradc->regs + CV1800B_ADC_CTRL_REG);
+}
+
+static int cv1800b_adc_wait(struct cv1800b_adc *saradc)
+{
+	if (saradc->irq < 0) {
+		u32 reg;
+
+		return readl_poll_timeout(saradc->regs + CV1800B_ADC_STATUS_REG,
+					  reg, !(reg & CV1800B_ADC_BUSY),
+					  500, CV1800B_READ_TIMEOUT_US);
+	}
+
+	return wait_for_completion_timeout(&saradc->completion,
+					  msecs_to_jiffies(CV1800B_READ_TIMEOUT_MS)) > 0
+					  ? 0 : -ETIMEDOUT;
+}
+
+static int cv1800b_adc_read_raw(struct iio_dev *indio_dev,
+				struct iio_chan_spec const *chan,
+				int *val, int *val2, long mask)
+{
+	struct cv1800b_adc *saradc = iio_priv(indio_dev);
+
+	switch (mask) {
+	case IIO_CHAN_INFO_RAW:{
+		u32 sample;
+
+		scoped_guard(mutex, &saradc->lock) {
+			int ret;
+
+			cv1800b_adc_start_measurement(saradc, chan->scan_index);
+			ret = cv1800b_adc_wait(saradc);
+			if (ret < 0)
+				return ret;
+
+			sample = readl(saradc->regs + CV1800B_ADC_CH_RESULT_REG(chan->scan_index));
+		}
+		if (!(sample & CV1800B_ADC_CH_VALID))
+			return -ENODATA;
+
+		*val = sample & CV1800B_ADC_CH_RESULT;
+		return IIO_VAL_INT;
+		}
+	case IIO_CHAN_INFO_SCALE:
+		*val = 3300;
+		*val2 = 12;
+		return IIO_VAL_FRACTIONAL_LOG2;
+	case IIO_CHAN_INFO_SAMP_FREQ:
+		u32 status_reg = readl(saradc->regs + CV1800B_ADC_CYC_SET_REG);
+		int clk_div = (1 + FIELD_GET(CV1800B_MASK_CLKDIV, status_reg));
+		int freq = clk_get_rate(saradc->clk) / clk_div;
+		int nb_startup_cycle = 1 + FIELD_GET(CV1800B_MASK_STARTUP_CYCLE, status_reg);
+		int nb_sample_cycle = 1 + FIELD_GET(CV1800B_MASK_SAMPLE_WINDOW, status_reg);
+		int nb_compare_cycle = 1 + FIELD_GET(CV1800B_MASK_COMPARE_CYCLE, status_reg);
+
+		*val = freq / (nb_startup_cycle + nb_sample_cycle + nb_compare_cycle);
+		return IIO_VAL_INT;
+	default:
+		return -EINVAL;
+	}
+}
+
+static irqreturn_t cv1800b_adc_interrupt_handler(int irq, void *private)
+{
+	struct cv1800b_adc *saradc = private;
+	u32 reg = readl(saradc->regs + CV1800B_ADC_INTR_STA_REG);
+
+	if (!(FIELD_GET(CV1800B_ADC_INTR_STA_BIT, reg)))
+		return IRQ_NONE;
+
+	writel(CV1800B_ADC_INTR_CLR_BIT, saradc->regs + CV1800B_ADC_INTR_CLR_REG);
+	complete(&saradc->completion);
+
+	return IRQ_HANDLED;
+}
+
+static const struct iio_info cv1800b_adc_info = {
+	.read_raw = &cv1800b_adc_read_raw,
+};
+
+static int cv1800b_adc_probe(struct platform_device *pdev)
+{
+	struct cv1800b_adc *saradc;
+	struct iio_dev *indio_dev;
+	int ret;
+
+	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*saradc));
+	if (!indio_dev)
+		return -ENOMEM;
+
+	saradc = iio_priv(indio_dev);
+	indio_dev->name = "sophgo-cv1800b-adc";
+	indio_dev->modes = INDIO_DIRECT_MODE;
+	indio_dev->info = &cv1800b_adc_info;
+	indio_dev->num_channels = ARRAY_SIZE(sophgo_channels);
+	indio_dev->channels = sophgo_channels;
+
+	saradc->clk = devm_clk_get_enabled(&pdev->dev, NULL);
+	if (IS_ERR(saradc->clk))
+		return PTR_ERR(saradc->clk);
+
+	saradc->regs = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(saradc->regs))
+		return PTR_ERR(saradc->regs);
+
+	saradc->irq = platform_get_irq_optional(pdev, 0);
+	if (saradc->irq >= 0) {
+		init_completion(&saradc->completion);
+		ret = devm_request_irq(&pdev->dev, saradc->irq,
+				       cv1800b_adc_interrupt_handler, 0,
+				       dev_name(&pdev->dev), saradc);
+		if (ret)
+			return ret;
+
+		writel(1, saradc->regs + CV1800B_ADC_INTR_EN_REG);
+	}
+
+	ret = devm_mutex_init(&pdev->dev, &saradc->lock);
+	if (ret)
+		return ret;
+	writel(FIELD_PREP(CV1800B_MASK_STARTUP_CYCLE, 15) |
+	       FIELD_PREP(CV1800B_MASK_SAMPLE_WINDOW, 15) |
+	       FIELD_PREP(CV1800B_MASK_CLKDIV, 1) |
+	       FIELD_PREP(CV1800B_MASK_COMPARE_CYCLE, 15),
+	       saradc->regs + CV1800B_ADC_CYC_SET_REG);
+
+	return devm_iio_device_register(&pdev->dev, indio_dev);
+}
+
+static const struct of_device_id cv1800b_adc_match[] = {
+	{ .compatible = "sophgo,cv1800b-saradc", },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, cv1800b_adc_match);
+
+static struct platform_driver cv1800b_adc_driver = {
+	.driver	= {
+		.name		= "sophgo-cv1800b-saradc",
+		.of_match_table	= cv1800b_adc_match,
+	},
+	.probe = cv1800b_adc_probe,
+};
+module_platform_driver(cv1800b_adc_driver);
+
+MODULE_AUTHOR("Thomas Bonnefille <thomas.bonnefille@bootlin.com>");
+MODULE_DESCRIPTION("Sophgo CV1800B SARADC driver");
+MODULE_LICENSE("GPL");

-- 
2.46.0

[PATCH v5 3/3] riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B

[Thomas Bonnefille]

Add SARADC node for the Successive Approximation Analog to
Digital Converter used in Sophgo CV1800B SoC.
This patch only adds the active domain controller.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index 891932ae470f..da1ac59e976f 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -133,6 +133,28 @@ portd: gpio-controller@0 {
 			};
 		};
 
+		saradc: adc@30f0000 {
+			compatible = "sophgo,cv1800b-saradc";
+			reg = <0x030f0000 0x1000>;
+			clocks = <&clk CLK_SARADC>;
+			interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			channel@0 {
+				reg = <0>;
+			};
+
+			channel@1 {
+				reg = <1>;
+			};
+
+			channel@2 {
+				reg = <2>;
+			};
+		};
+
 		i2c0: i2c@4000000 {
 			compatible = "snps,designware-i2c";
 			reg = <0x04000000 0x10000>;

-- 
2.46.0

Re: [PATCH v5 1/3] dt-bindings: iio: adc: sophgo,cv1800b-saradc: Add Sophgo CV1800B SARADC

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 328 bytes --]

On Thu, Aug 29, 2024 at 02:31:50PM +0200, Thomas Bonnefille wrote:
> The Sophgo CV1800B SARADC is a Successive Approximation ADC that can be
> found in the Sophgo CV1800B SoC.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v5 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC

[kernel test robot]

Hi Thomas,

kernel test robot noticed the following build warnings:

[auto build test WARNING on 5be63fc19fcaa4c236b307420483578a56986a37]

url:    https://github.com/intel-lab-lkp/linux/commits/Thomas-Bonnefille/dt-bindings-iio-adc-sophgo-cv1800b-saradc-Add-Sophgo-CV1800B-SARADC/20240829-203431
base:   5be63fc19fcaa4c236b307420483578a56986a37
patch link:    https://lore.kernel.org/r/20240829-sg2002-adc-v5-2-aacb381e869b%40bootlin.com
patch subject: [PATCH v5 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20240831/202408310817.GT3TMpnv-lkp@intel.com/config)
compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240831/202408310817.GT3TMpnv-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202408310817.GT3TMpnv-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/iio/adc/sophgo-cv1800b-adc.c:120:3: warning: label followed by a declaration is a C23 extension [-Wc23-extensions]
     120 |                 u32 status_reg = readl(saradc->regs + CV1800B_ADC_CYC_SET_REG);
         |                 ^
   1 warning generated.


vim +120 drivers/iio/adc/sophgo-cv1800b-adc.c

    88	
    89	static int cv1800b_adc_read_raw(struct iio_dev *indio_dev,
    90					struct iio_chan_spec const *chan,
    91					int *val, int *val2, long mask)
    92	{
    93		struct cv1800b_adc *saradc = iio_priv(indio_dev);
    94	
    95		switch (mask) {
    96		case IIO_CHAN_INFO_RAW:{
    97			u32 sample;
    98	
    99			scoped_guard(mutex, &saradc->lock) {
   100				int ret;
   101	
   102				cv1800b_adc_start_measurement(saradc, chan->scan_index);
   103				ret = cv1800b_adc_wait(saradc);
   104				if (ret < 0)
   105					return ret;
   106	
   107				sample = readl(saradc->regs + CV1800B_ADC_CH_RESULT_REG(chan->scan_index));
   108			}
   109			if (!(sample & CV1800B_ADC_CH_VALID))
   110				return -ENODATA;
   111	
   112			*val = sample & CV1800B_ADC_CH_RESULT;
   113			return IIO_VAL_INT;
   114			}
   115		case IIO_CHAN_INFO_SCALE:
   116			*val = 3300;
   117			*val2 = 12;
   118			return IIO_VAL_FRACTIONAL_LOG2;
   119		case IIO_CHAN_INFO_SAMP_FREQ:
 > 120			u32 status_reg = readl(saradc->regs + CV1800B_ADC_CYC_SET_REG);
   121			int clk_div = (1 + FIELD_GET(CV1800B_MASK_CLKDIV, status_reg));
   122			int freq = clk_get_rate(saradc->clk) / clk_div;
   123			int nb_startup_cycle = 1 + FIELD_GET(CV1800B_MASK_STARTUP_CYCLE, status_reg);
   124			int nb_sample_cycle = 1 + FIELD_GET(CV1800B_MASK_SAMPLE_WINDOW, status_reg);
   125			int nb_compare_cycle = 1 + FIELD_GET(CV1800B_MASK_COMPARE_CYCLE, status_reg);
   126	
   127			*val = freq / (nb_startup_cycle + nb_sample_cycle + nb_compare_cycle);
   128			return IIO_VAL_INT;
   129		default:
   130			return -EINVAL;
   131		}
   132	}
   133	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH v5 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC

[Jonathan Cameron]

Minor stuff inline.

I'll fix up whilst applying.

Jonathan

> diff --git a/drivers/iio/adc/sophgo-cv1800b-adc.c b/drivers/iio/adc/sophgo-cv1800b-adc.c
> new file mode 100644
> index 000000000000..f4cdec966694
> --- /dev/null
> +++ b/drivers/iio/adc/sophgo-cv1800b-adc.c
> @@ -0,0 +1,218 @@

> +static int cv1800b_adc_read_raw(struct iio_dev *indio_dev,
> +				struct iio_chan_spec const *chan,
> +				int *val, int *val2, long mask)
> +{
> +	struct cv1800b_adc *saradc = iio_priv(indio_dev);
> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_RAW:{
> +		u32 sample;
> +
> +		scoped_guard(mutex, &saradc->lock) {
> +			int ret;
> +
> +			cv1800b_adc_start_measurement(saradc, chan->scan_index);
> +			ret = cv1800b_adc_wait(saradc);
> +			if (ret < 0)
> +				return ret;
> +
> +			sample = readl(saradc->regs + CV1800B_ADC_CH_RESULT_REG(chan->scan_index));
> +		}
> +		if (!(sample & CV1800B_ADC_CH_VALID))
> +			return -ENODATA;
> +
> +		*val = sample & CV1800B_ADC_CH_RESULT;
> +		return IIO_VAL_INT;
> +		}
> +	case IIO_CHAN_INFO_SCALE:
> +		*val = 3300;
> +		*val2 = 12;
> +		return IIO_VAL_FRACTIONAL_LOG2;
> +	case IIO_CHAN_INFO_SAMP_FREQ:

This needs  {} as per the build bot.
If nothing major comes up, I'll tweak whilst applying.

> +		u32 status_reg = readl(saradc->regs + CV1800B_ADC_CYC_SET_REG);
> +		int clk_div = (1 + FIELD_GET(CV1800B_MASK_CLKDIV, status_reg));
> +		int freq = clk_get_rate(saradc->clk) / clk_div;
> +		int nb_startup_cycle = 1 + FIELD_GET(CV1800B_MASK_STARTUP_CYCLE, status_reg);
> +		int nb_sample_cycle = 1 + FIELD_GET(CV1800B_MASK_SAMPLE_WINDOW, status_reg);
> +		int nb_compare_cycle = 1 + FIELD_GET(CV1800B_MASK_COMPARE_CYCLE, status_reg);
> +
> +		*val = freq / (nb_startup_cycle + nb_sample_cycle + nb_compare_cycle);
> +		return IIO_VAL_INT;
> +	default:
> +		return -EINVAL;
> +	}
> +}

> +static int cv1800b_adc_probe(struct platform_device *pdev)
> +{
> +	struct cv1800b_adc *saradc;
> +	struct iio_dev *indio_dev;
> +	int ret;
> +
> +	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*saradc));
> +	if (!indio_dev)
> +		return -ENOMEM;
> +
> +	saradc = iio_priv(indio_dev);
> +	indio_dev->name = "sophgo-cv1800b-adc";
> +	indio_dev->modes = INDIO_DIRECT_MODE;
> +	indio_dev->info = &cv1800b_adc_info;
> +	indio_dev->num_channels = ARRAY_SIZE(sophgo_channels);
> +	indio_dev->channels = sophgo_channels;
> +
> +	saradc->clk = devm_clk_get_enabled(&pdev->dev, NULL);
> +	if (IS_ERR(saradc->clk))
> +		return PTR_ERR(saradc->clk);
> +
> +	saradc->regs = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(saradc->regs))
> +		return PTR_ERR(saradc->regs);
> +
> +	saradc->irq = platform_get_irq_optional(pdev, 0);
> +	if (saradc->irq >= 0) {
> +		init_completion(&saradc->completion);
> +		ret = devm_request_irq(&pdev->dev, saradc->irq,
> +				       cv1800b_adc_interrupt_handler, 0,
> +				       dev_name(&pdev->dev), saradc);
> +		if (ret)
> +			return ret;
> +
> +		writel(1, saradc->regs + CV1800B_ADC_INTR_EN_REG);
> +	}
> +
> +	ret = devm_mutex_init(&pdev->dev, &saradc->lock);
> +	if (ret)
> +		return ret;

Blank line here slightly helps readability as two unrelated blocks of code.

> +	writel(FIELD_PREP(CV1800B_MASK_STARTUP_CYCLE, 15) |
> +	       FIELD_PREP(CV1800B_MASK_SAMPLE_WINDOW, 15) |
> +	       FIELD_PREP(CV1800B_MASK_CLKDIV, 1) |
> +	       FIELD_PREP(CV1800B_MASK_COMPARE_CYCLE, 15),
> +	       saradc->regs + CV1800B_ADC_CYC_SET_REG);
> +
> +	return devm_iio_device_register(&pdev->dev, indio_dev);
> +}

Re: [PATCH v5 0/3] Add SARADC support on Sophgo CV18XX series

[Jonathan Cameron]

On Thu, 29 Aug 2024 14:31:49 +0200
Thomas Bonnefille <thomas.bonnefille@bootlin.com> wrote:

> This patchset adds initial ADC support for Sophgo CV18XX series SoC. This driver can
> work with or without interrupt.
> 
> Link: https://github.com/sophgo/sophgo-doc/releases/download/sg2002-trm-v1.0/sg2002_trm_en.pdf
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Applied patches 1 and 2 to the togreg branch of iio.git. Currently that's
just pushed out as testing because I want to rebase shortly to get some
usptream fixes needed for other series.

Thanks,

Jonathan




> ---
> Changes in v5:
> - Add the ability to read the sample frequency
> - Edit commit message to remove No-Die reference and add precision on
>   the ADC series
> - Rename binding and driver file to match compatible
> - Reformat the channel property in the binding
> - Clean driver code
> - Link to v4: https://lore.kernel.org/r/20240812-sg2002-adc-v4-0-599bdb67592f@bootlin.com
> 
> Changes in v4:
> - Lowercase register hexadecimal value in dts
> - Reorder properties in dts
> - Use only a const in the compatible property of the device tree bindings
> - Specify the series of SoC in the driver to avoid confusing with other
>   Sophgo SoCs
> - Add channel description in the bindings
> - Use FIELD_PREP in the default configuration
> - Index channels from 0
> - Return PTR_ERR instead of IS_ERR
> - Link to v3: https://lore.kernel.org/r/20240731-sg2002-adc-v3-0-5ac40a518c0a@bootlin.com
> 
> Changes in v3:
> - Subdivide default cycle configuration into multiple elementary
>   configurations
> - Fix formatting in the driver
> - Use devm_mutex_init
> - Use devm_clk_get_enabled now because the clock is no more optional
> - Remove handling of Saradc in No-Die Domain as RTC isn't implemented yet
> - Use cv1800-saradc as default compatible instead of a wildcard
> - Remove platform_set_drvdata as it wasn't used
> - Link to v2: https://lore.kernel.org/r/20240705-sg2002-adc-v2-0-83428c20a9b2@bootlin.com
> 
> Changes in v2:
> - Drop modifications in MAINTAINERS file
> - Rename the ADC from "sophgo-adc" to "sophgo-cv18xx-adc" to avoid
>   conflict with ADCs available in future Sophgo SoCs.
> - Reorder nodes in DT to match DTS coding style
> - Switch from including <linux/of.h> to <linux/mod_devicetable.h>
> - Use scoped_guard instead of mutex_lock/unlock
> - Check IRQ Status in the handler
> - Change IIO device name
> - Use devm_clk_get_optional_enabled instead of a clock variable
> - Init completion before the IRQ request
> - Removed unnecessary iio_info structure in the private data of the
>   driver
> - Use SoC specific compatible in the bindings and device trees
> - Link to v1: https://lore.kernel.org/r/20240702-sg2002-adc-v1-0-ac66e076a756@bootlin.com
> 
> ---
> Thomas Bonnefille (3):
>       dt-bindings: iio: adc: sophgo,cv1800b-saradc: Add Sophgo CV1800B SARADC
>       iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC
>       riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B
> 
>  .../bindings/iio/adc/sophgo,cv1800b-saradc.yaml    |  83 ++++++++
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi             |  22 +++
>  drivers/iio/adc/Kconfig                            |  10 +
>  drivers/iio/adc/Makefile                           |   1 +
>  drivers/iio/adc/sophgo-cv1800b-adc.c               | 218 +++++++++++++++++++++
>  5 files changed, 334 insertions(+)
> ---
> base-commit: 5be63fc19fcaa4c236b307420483578a56986a37
> change-id: 20240527-sg2002-adc-924b862cd3f2
> 
> Best regards,

Re: [PATCH v5 3/3] riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B

[Inochi Amaoto]

On Thu, Aug 29, 2024 at 02:31:52PM GMT, Thomas Bonnefille wrote:
> Add SARADC node for the Successive Approximation Analog to
> Digital Converter used in Sophgo CV1800B SoC.
> This patch only adds the active domain controller.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 891932ae470f..da1ac59e976f 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -133,6 +133,28 @@ portd: gpio-controller@0 {
>  			};
>  		};
>  
> +		saradc: adc@30f0000 {
> +			compatible = "sophgo,cv1800b-saradc";
> +			reg = <0x030f0000 0x1000>;
> +			clocks = <&clk CLK_SARADC>;
> +			interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +

> +			channel@0 {
> +				reg = <0>;
> +			};
> +
> +			channel@1 {
> +				reg = <1>;
> +			};
> +
> +			channel@2 {
> +				reg = <2>;
> +			};

I think it may better to move channel definition to board file.

> +		};
> +
>  		i2c0: i2c@4000000 {
>  			compatible = "snps,designware-i2c";
>  			reg = <0x04000000 0x10000>;
> 
> -- 
> 2.46.0
> 

Re: [PATCH v5 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC

[Andy Shevchenko]

Thu, Aug 29, 2024 at 02:31:51PM +0200, Thomas Bonnefille kirjoitti:
> This adds a driver for the Sophgo CV1800B SARADC.

Jonathan, please consider the below improvements to be folded in as well.

...

+ array_size.h

> +#include <linux/bitfield.h>

+ bits.h
+ cleanup.h

> +#include <linux/clk.h>
> +#include <linux/completion.h>

+ err.h

> +#include <linux/interrupt.h>

> +#include <linux/iio/iio.h>

I would split it into a separate group already.

> +#include <linux/iopoll.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/platform_device.h>

+ types.h

...

> +#define CV1800B_READ_TIMEOUT_MS				1000
> +#define CV1800B_READ_TIMEOUT_US				(CV1800B_READ_TIMEOUT_MS * 1000)

Effectively these may be written as

(1 * MSEC_PER_SEC)
(1 * USEC_PER_SEC)

...

> +static int cv1800b_adc_wait(struct cv1800b_adc *saradc)
> +{
> +	if (saradc->irq < 0) {
> +		u32 reg;
> +
> +		return readl_poll_timeout(saradc->regs + CV1800B_ADC_STATUS_REG,
> +					  reg, !(reg & CV1800B_ADC_BUSY),
> +					  500, CV1800B_READ_TIMEOUT_US);
> +	}
> +
> +	return wait_for_completion_timeout(&saradc->completion,
> +					  msecs_to_jiffies(CV1800B_READ_TIMEOUT_MS)) > 0
> +					  ? 0 : -ETIMEDOUT;

Usually we leave "?" part on the previous line.

> +}
> +
> +static int cv1800b_adc_read_raw(struct iio_dev *indio_dev,
> +				struct iio_chan_spec const *chan,
> +				int *val, int *val2, long mask)
> +{
> +	struct cv1800b_adc *saradc = iio_priv(indio_dev);
> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_RAW:{

Missing space

> +		u32 sample;
> +
> +		scoped_guard(mutex, &saradc->lock) {
> +			int ret;
> +
> +			cv1800b_adc_start_measurement(saradc, chan->scan_index);
> +			ret = cv1800b_adc_wait(saradc);
> +			if (ret < 0)
> +				return ret;
> +
> +			sample = readl(saradc->regs + CV1800B_ADC_CH_RESULT_REG(chan->scan_index));
> +		}
> +		if (!(sample & CV1800B_ADC_CH_VALID))
> +			return -ENODATA;
> +
> +		*val = sample & CV1800B_ADC_CH_RESULT;
> +		return IIO_VAL_INT;
> +		}

This should be indented as 'c' in the above 'case'.

> +	case IIO_CHAN_INFO_SCALE:
> +		*val = 3300;
> +		*val2 = 12;
> +		return IIO_VAL_FRACTIONAL_LOG2;
> +	case IIO_CHAN_INFO_SAMP_FREQ:
> +		u32 status_reg = readl(saradc->regs + CV1800B_ADC_CYC_SET_REG);

> +		int clk_div = (1 + FIELD_GET(CV1800B_MASK_CLKDIV, status_reg));
> +		int freq = clk_get_rate(saradc->clk) / clk_div;

Why are these signed?

> +		int nb_startup_cycle = 1 + FIELD_GET(CV1800B_MASK_STARTUP_CYCLE, status_reg);
> +		int nb_sample_cycle = 1 + FIELD_GET(CV1800B_MASK_SAMPLE_WINDOW, status_reg);
> +		int nb_compare_cycle = 1 + FIELD_GET(CV1800B_MASK_COMPARE_CYCLE, status_reg);
> +
> +		*val = freq / (nb_startup_cycle + nb_sample_cycle + nb_compare_cycle);
> +		return IIO_VAL_INT;
> +	default:
> +		return -EINVAL;
> +	}
> +}

...

> +static int cv1800b_adc_probe(struct platform_device *pdev)
> +{

Having

	struct device *dev = &pdev->dev;

here helps making below code neater.

> +	struct cv1800b_adc *saradc;
> +	struct iio_dev *indio_dev;
> +	int ret;
> +
> +	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*saradc));
> +	if (!indio_dev)
> +		return -ENOMEM;
> +
> +	saradc = iio_priv(indio_dev);
> +	indio_dev->name = "sophgo-cv1800b-adc";
> +	indio_dev->modes = INDIO_DIRECT_MODE;
> +	indio_dev->info = &cv1800b_adc_info;
> +	indio_dev->num_channels = ARRAY_SIZE(sophgo_channels);
> +	indio_dev->channels = sophgo_channels;
> +
> +	saradc->clk = devm_clk_get_enabled(&pdev->dev, NULL);
> +	if (IS_ERR(saradc->clk))
> +		return PTR_ERR(saradc->clk);
> +
> +	saradc->regs = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(saradc->regs))
> +		return PTR_ERR(saradc->regs);
> +
> +	saradc->irq = platform_get_irq_optional(pdev, 0);
> +	if (saradc->irq >= 0) {

'=' is redundant

> +		init_completion(&saradc->completion);
> +		ret = devm_request_irq(&pdev->dev, saradc->irq,
> +				       cv1800b_adc_interrupt_handler, 0,
> +				       dev_name(&pdev->dev), saradc);
> +		if (ret)
> +			return ret;
> +
> +		writel(1, saradc->regs + CV1800B_ADC_INTR_EN_REG);

BIT(0)

> +	}
> +
> +	ret = devm_mutex_init(&pdev->dev, &saradc->lock);
> +	if (ret)
> +		return ret;

+ blank line?

> +	writel(FIELD_PREP(CV1800B_MASK_STARTUP_CYCLE, 15) |
> +	       FIELD_PREP(CV1800B_MASK_SAMPLE_WINDOW, 15) |
> +	       FIELD_PREP(CV1800B_MASK_CLKDIV, 1) |
> +	       FIELD_PREP(CV1800B_MASK_COMPARE_CYCLE, 15),
> +	       saradc->regs + CV1800B_ADC_CYC_SET_REG);
> +
> +	return devm_iio_device_register(&pdev->dev, indio_dev);
> +}

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v5 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC

[Jonathan Cameron]

On Mon, 2 Sep 2024 23:36:59 +0300
Andy Shevchenko <andy.shevchenko@gmail.com> wrote:

> Thu, Aug 29, 2024 at 02:31:51PM +0200, Thomas Bonnefille kirjoitti:
> > This adds a driver for the Sophgo CV1800B SARADC.  
> 
> Jonathan, please consider the below improvements to be folded in as well.
> 
> ...
> 
> + array_size.h
> 
> > +#include <linux/bitfield.h>  
> 
> + bits.h
> + cleanup.h
> 
> > +#include <linux/clk.h>
> > +#include <linux/completion.h>  
> 
> + err.h
> 
> > +#include <linux/interrupt.h>  
> 
> > +#include <linux/iio/iio.h>  
> 
> I would split it into a separate group already.
> 
> > +#include <linux/iopoll.h>
> > +#include <linux/mod_devicetable.h>
> > +#include <linux/module.h>
> > +#include <linux/mutex.h>
> > +#include <linux/platform_device.h>  
> 
> + types.h
Added. 

> 
> ...
> 
> > +#define CV1800B_READ_TIMEOUT_MS				1000
> > +#define CV1800B_READ_TIMEOUT_US				(CV1800B_READ_TIMEOUT_MS * 1000)  
> 
> Effectively these may be written as
> 
> (1 * MSEC_PER_SEC)
> (1 * USEC_PER_SEC)
> 
> ...
I'm not going to make this one.  Sure good feedback but not worth fixing
and chance I mess it up.

> 
> > +static int cv1800b_adc_wait(struct cv1800b_adc *saradc)
> > +{
> > +	if (saradc->irq < 0) {
> > +		u32 reg;
> > +
> > +		return readl_poll_timeout(saradc->regs + CV1800B_ADC_STATUS_REG,
> > +					  reg, !(reg & CV1800B_ADC_BUSY),
> > +					  500, CV1800B_READ_TIMEOUT_US);
> > +	}
> > +
> > +	return wait_for_completion_timeout(&saradc->completion,
> > +					  msecs_to_jiffies(CV1800B_READ_TIMEOUT_MS)) > 0
> > +					  ? 0 : -ETIMEDOUT;  
> 
> Usually we leave "?" part on the previous line.
Moved.
Also the line above is one space short of alignment.

> 
> > +}
> > +
> > +static int cv1800b_adc_read_raw(struct iio_dev *indio_dev,
> > +				struct iio_chan_spec const *chan,
> > +				int *val, int *val2, long mask)
> > +{
> > +	struct cv1800b_adc *saradc = iio_priv(indio_dev);
> > +
> > +	switch (mask) {
> > +	case IIO_CHAN_INFO_RAW:{  
> 
> Missing space
I'd already fixed that one.
> 
> > +		u32 sample;
> > +
> > +		scoped_guard(mutex, &saradc->lock) {
> > +			int ret;
> > +
> > +			cv1800b_adc_start_measurement(saradc, chan->scan_index);
> > +			ret = cv1800b_adc_wait(saradc);
> > +			if (ret < 0)
> > +				return ret;
> > +
> > +			sample = readl(saradc->regs + CV1800B_ADC_CH_RESULT_REG(chan->scan_index));
> > +		}
> > +		if (!(sample & CV1800B_ADC_CH_VALID))
> > +			return -ENODATA;
> > +
> > +		*val = sample & CV1800B_ADC_CH_RESULT;
> > +		return IIO_VAL_INT;
> > +		}  
> 
> This should be indented as 'c' in the above 'case'.
True. Fixed up.

> 
> > +	case IIO_CHAN_INFO_SCALE:
> > +		*val = 3300;
> > +		*val2 = 12;
> > +		return IIO_VAL_FRACTIONAL_LOG2;
> > +	case IIO_CHAN_INFO_SAMP_FREQ:
> > +		u32 status_reg = readl(saradc->regs + CV1800B_ADC_CYC_SET_REG);  
> 
> > +		int clk_div = (1 + FIELD_GET(CV1800B_MASK_CLKDIV, status_reg));
> > +		int freq = clk_get_rate(saradc->clk) / clk_div;  
> 
> Why are these signed?
Made them unsigned. Seems safe enough

> 
> > +		int nb_startup_cycle = 1 + FIELD_GET(CV1800B_MASK_STARTUP_CYCLE, status_reg);
> > +		int nb_sample_cycle = 1 + FIELD_GET(CV1800B_MASK_SAMPLE_WINDOW, status_reg);
> > +		int nb_compare_cycle = 1 + FIELD_GET(CV1800B_MASK_COMPARE_CYCLE, status_reg);
> > +
> > +		*val = freq / (nb_startup_cycle + nb_sample_cycle + nb_compare_cycle);
> > +		return IIO_VAL_INT;
> > +	default:
> > +		return -EINVAL;
> > +	}
> > +}  
> 
> ...
> 
> > +static int cv1800b_adc_probe(struct platform_device *pdev)
> > +{  
> 
> Having
> 
> 	struct device *dev = &pdev->dev;
> 
> here helps making below code neater.
sure. modified.

> 
> > +	struct cv1800b_adc *saradc;
> > +	struct iio_dev *indio_dev;
> > +	int ret;
> > +
> > +	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*saradc));
> > +	if (!indio_dev)
> > +		return -ENOMEM;
> > +
> > +	saradc = iio_priv(indio_dev);
> > +	indio_dev->name = "sophgo-cv1800b-adc";
> > +	indio_dev->modes = INDIO_DIRECT_MODE;
> > +	indio_dev->info = &cv1800b_adc_info;
> > +	indio_dev->num_channels = ARRAY_SIZE(sophgo_channels);
> > +	indio_dev->channels = sophgo_channels;
> > +
> > +	saradc->clk = devm_clk_get_enabled(&pdev->dev, NULL);
> > +	if (IS_ERR(saradc->clk))
> > +		return PTR_ERR(saradc->clk);
> > +
> > +	saradc->regs = devm_platform_ioremap_resource(pdev, 0);
> > +	if (IS_ERR(saradc->regs))
> > +		return PTR_ERR(saradc->regs);
> > +
> > +	saradc->irq = platform_get_irq_optional(pdev, 0);
> > +	if (saradc->irq >= 0) {  
> 
> '=' is redundant
removed.
> 
> > +		init_completion(&saradc->completion);
> > +		ret = devm_request_irq(&pdev->dev, saradc->irq,
> > +				       cv1800b_adc_interrupt_handler, 0,
> > +				       dev_name(&pdev->dev), saradc);
> > +		if (ret)
> > +			return ret;
> > +
> > +		writel(1, saradc->regs + CV1800B_ADC_INTR_EN_REG);  
> 
> BIT(0)

Maybe on that - would need to compare with datasheet to know how it's
described. In theory that might not be a mask.

> 
> > +	}
> > +
> > +	ret = devm_mutex_init(&pdev->dev, &saradc->lock);
> > +	if (ret)
> > +		return ret;  
> 
> + blank line?
That one I'd done already.
Anyhow tweaked and pushed out again.


Jonathan

> 
> > +	writel(FIELD_PREP(CV1800B_MASK_STARTUP_CYCLE, 15) |
> > +	       FIELD_PREP(CV1800B_MASK_SAMPLE_WINDOW, 15) |
> > +	       FIELD_PREP(CV1800B_MASK_CLKDIV, 1) |
> > +	       FIELD_PREP(CV1800B_MASK_COMPARE_CYCLE, 15),
> > +	       saradc->regs + CV1800B_ADC_CYC_SET_REG);
> > +
> > +	return devm_iio_device_register(&pdev->dev, indio_dev);
> > +}  
> 

Re: [PATCH v5 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC

[Thomas Bonnefille]

Hello, thank you for these fixes, I just wanted to add something below.

Le 03/09/2024 à 9:05 PM, Jonathan Cameron a écrit :
> On Mon, 2 Sep 2024 23:36:59 +0300
> Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> 
>> Thu, Aug 29, 2024 at 02:31:51PM +0200, Thomas Bonnefille kirjoitti:
>>> This adds a driver for the Sophgo CV1800B SARADC.

...

>>> +		init_completion(&saradc->completion);
>>> +		ret = devm_request_irq(&pdev->dev, saradc->irq,
>>> +				       cv1800b_adc_interrupt_handler, 0,
>>> +				       dev_name(&pdev->dev), saradc);
>>> +		if (ret)
>>> +			return ret;
>>> +
>>> +		writel(1, saradc->regs + CV1800B_ADC_INTR_EN_REG);
>>
>> BIT(0)
> 
> Maybe on that - would need to compare with datasheet to know how it's
> described. In theory that might not be a mask.

Indeed, in this case "CV1800B_ADC_INTR_EN_REG" is the register that 
enables the interrupts.
So here what I dis is to set this register to 1 (ON).

> 
>>
>>> +	}
>>> +
>>> +	ret = devm_mutex_init(&pdev->dev, &saradc->lock);
>>> +	if (ret)
>>> +		return ret;
>>
>> + blank line?
> That one I'd done already.
> Anyhow tweaked and pushed out again.
> 
> 
> Jonathan
> 
>>
>>> +	writel(FIELD_PREP(CV1800B_MASK_STARTUP_CYCLE, 15) |
>>> +	       FIELD_PREP(CV1800B_MASK_SAMPLE_WINDOW, 15) |
>>> +	       FIELD_PREP(CV1800B_MASK_CLKDIV, 1) |
>>> +	       FIELD_PREP(CV1800B_MASK_COMPARE_CYCLE, 15),
>>> +	       saradc->regs + CV1800B_ADC_CYC_SET_REG);
>>> +
>>> +	return devm_iio_device_register(&pdev->dev, indio_dev);
>>> +}
>>
> 
Thomas

Re: [PATCH v5 3/3] riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B

[Inochi Amaoto]

On Sat, Aug 31, 2024 at 08:49:22PM +0800, Inochi Amaoto wrote:
> On Thu, Aug 29, 2024 at 02:31:52PM GMT, Thomas Bonnefille wrote:
> > Add SARADC node for the Successive Approximation Analog to
> > Digital Converter used in Sophgo CV1800B SoC.
> > This patch only adds the active domain controller.
> > 
> > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> > ---
> >  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 ++++++++++++++++++++++
> >  1 file changed, 22 insertions(+)
> > 
> > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > index 891932ae470f..da1ac59e976f 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > @@ -133,6 +133,28 @@ portd: gpio-controller@0 {
> >  			};
> >  		};
> >  
> > +		saradc: adc@30f0000 {
> > +			compatible = "sophgo,cv1800b-saradc";
> > +			reg = <0x030f0000 0x1000>;
> > +			clocks = <&clk CLK_SARADC>;
> > +			interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> > +
> 
> > +			channel@0 {
> > +				reg = <0>;
> > +			};
> > +
> > +			channel@1 {
> > +				reg = <1>;
> > +			};
> > +
> > +			channel@2 {
> > +				reg = <2>;
> > +			};
> 
> I think it may better to move channel definition to board file.
> 

It seems OK, let's drop my previous comment.

Reviewed-by: Inochi Amaoto <inochiama@gmail.com>

> > +		};
> > +
> >  		i2c0: i2c@4000000 {
> >  			compatible = "snps,designware-i2c";
> >  			reg = <0x04000000 0x10000>;
> > 
> > -- 
> > 2.46.0
> > 

Re: (subset) [PATCH v5 0/3] Add SARADC support on Sophgo CV18XX series

[Inochi Amaoto]

On Thu, 29 Aug 2024 14:31:49 +0200, Thomas Bonnefille wrote:
> This patchset adds initial ADC support for Sophgo CV18XX series SoC. This driver can
> work with or without interrupt.
> 
> Link: https://github.com/sophgo/sophgo-doc/releases/download/sg2002-trm-v1.0/sg2002_trm_en.pdf
> 
> 

Applied to for-next, thanks!

[3/3] riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B
      https://github.com/sophgo/linux/commit/45a544a62ef7cac9ecc69585a90da72ca68af898

Thanks,
Inochi