[PATCH v3 0/4] fix the flexspi error on imx8ulp

[PATCH v3 0/4] fix the flexspi error on imx8ulp

[haibo.chen]

From: Haibo Chen <haibo.chen@nxp.com>

The flexspi on imx8ulp only has 16 LUTs, different with others
which has 32 LUTs. So currently flexspi driver will write the
wrong register when fill LUT.

This patch set add a new compatible string for imx8ulp to
distinguish the LUT number.

Changes for V3:
- add Krzysztof Kozlowski's ack in PATCH1.
- add cc-stable and fix tag on all patches of this patch set
  all patch of this patch set aim to fix one issue.
- splict the original second patch into two different patches
  according to Frank Li's suggestion.
  one patch involve new number lut_num in struct nxp_fspi_devtype_data,
  another patch add new compatible string to support imx8ulp.

Changes for V2:
- Remove the change for imx8mp, since this broken users.

Haibo Chen (4):
  dt-bindings: spi: nxp-fspi: add imx8ulp support
  spi: fspi: involve lut_num for struct nxp_fspi_devtype_data
  spi: fspi: add support for imx8ulp
  arm64: dts: imx8ulp: correct the flexspi compatible string

 .../devicetree/bindings/spi/spi-nxp-fspi.yaml |  1 +
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi    |  2 +-
 drivers/spi/spi-nxp-fspi.c                    | 54 ++++++++++++-------
 3 files changed, 37 insertions(+), 20 deletions(-)

-- 
2.34.1

[PATCH v3 1/4] dt-bindings: spi: nxp-fspi: add imx8ulp support

[haibo.chen]

From: Haibo Chen <haibo.chen@nxp.com>

The flexspi on imx8ulp only has 16 number of LUTs, it is different
with flexspi on other imx SoC which has 32 number of LUTs.

Fixes: ef89fd56bdfc ("arm64: dts: imx8ulp: add flexspi node")
Cc: stable@kernel.org
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml
index 4a5f41bde00f..902db92da832 100644
--- a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml
@@ -21,6 +21,7 @@ properties:
           - nxp,imx8mm-fspi
           - nxp,imx8mp-fspi
           - nxp,imx8qxp-fspi
+          - nxp,imx8ulp-fspi
           - nxp,lx2160a-fspi
       - items:
           - enum:
-- 
2.34.1

[PATCH v3 2/4] spi: fspi: involve lut_num for struct nxp_fspi_devtype_data

[haibo.chen]

From: Haibo Chen <haibo.chen@nxp.com>

The flexspi on different SoCs may have different number of LUTs.
So involve lut_num in nxp_fspi_devtype_data to make distinguish.
This patch prepare for the adding of imx8ulp.

Fixes: ef89fd56bdfc ("arm64: dts: imx8ulp: add flexspi node")
Cc: stable@kernel.org
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 drivers/spi/spi-nxp-fspi.c | 44 ++++++++++++++++++++++----------------
 1 file changed, 25 insertions(+), 19 deletions(-)

diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index fd1816befcd8..f42c14d80289 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -57,13 +57,6 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/spi-mem.h>
 
-/*
- * The driver only uses one single LUT entry, that is updated on
- * each call of exec_op(). Index 0 is preset at boot with a basic
- * read operation, so let's use the last entry (31).
- */
-#define	SEQID_LUT			31
-
 /* Registers used by the driver */
 #define FSPI_MCR0			0x00
 #define FSPI_MCR0_AHB_TIMEOUT(x)	((x) << 24)
@@ -263,9 +256,6 @@
 #define FSPI_TFDR			0x180
 
 #define FSPI_LUT_BASE			0x200
-#define FSPI_LUT_OFFSET			(SEQID_LUT * 4 * 4)
-#define FSPI_LUT_REG(idx) \
-	(FSPI_LUT_BASE + FSPI_LUT_OFFSET + (idx) * 4)
 
 /* register map end */
 
@@ -341,6 +331,7 @@ struct nxp_fspi_devtype_data {
 	unsigned int txfifo;
 	unsigned int ahb_buf_size;
 	unsigned int quirks;
+	unsigned int lut_num;
 	bool little_endian;
 };
 
@@ -349,6 +340,7 @@ static struct nxp_fspi_devtype_data lx2160a_data = {
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
 	.quirks = 0,
+	.lut_num = 32,
 	.little_endian = true,  /* little-endian    */
 };
 
@@ -357,6 +349,7 @@ static struct nxp_fspi_devtype_data imx8mm_data = {
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
 	.quirks = 0,
+	.lut_num = 32,
 	.little_endian = true,  /* little-endian    */
 };
 
@@ -365,6 +358,7 @@ static struct nxp_fspi_devtype_data imx8qxp_data = {
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
 	.quirks = 0,
+	.lut_num = 32,
 	.little_endian = true,  /* little-endian    */
 };
 
@@ -373,6 +367,7 @@ static struct nxp_fspi_devtype_data imx8dxl_data = {
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
 	.quirks = FSPI_QUIRK_USE_IP_ONLY,
+	.lut_num = 32,
 	.little_endian = true,  /* little-endian    */
 };
 
@@ -544,6 +539,8 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
 	void __iomem *base = f->iobase;
 	u32 lutval[4] = {};
 	int lutidx = 1, i;
+	u32 lut_offset = (f->devtype_data->lut_num - 1) * 4 * 4;
+	u32 target_lut_reg;
 
 	/* cmd */
 	lutval[0] |= LUT_DEF(0, LUT_CMD, LUT_PAD(op->cmd.buswidth),
@@ -588,8 +585,10 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
 	fspi_writel(f, FSPI_LCKER_UNLOCK, f->iobase + FSPI_LCKCR);
 
 	/* fill LUT */
-	for (i = 0; i < ARRAY_SIZE(lutval); i++)
-		fspi_writel(f, lutval[i], base + FSPI_LUT_REG(i));
+	for (i = 0; i < ARRAY_SIZE(lutval); i++) {
+		target_lut_reg = FSPI_LUT_BASE + lut_offset + i * 4;
+		fspi_writel(f, lutval[i], base + target_lut_reg);
+	}
 
 	dev_dbg(f->dev, "CMD[%02x] lutval[0:%08x 1:%08x 2:%08x 3:%08x], size: 0x%08x\n",
 		op->cmd.opcode, lutval[0], lutval[1], lutval[2], lutval[3], op->data.nbytes);
@@ -874,7 +873,7 @@ static int nxp_fspi_do_op(struct nxp_fspi *f, const struct spi_mem_op *op)
 	void __iomem *base = f->iobase;
 	int seqnum = 0;
 	int err = 0;
-	u32 reg;
+	u32 reg, seqid_lut;
 
 	reg = fspi_readl(f, base + FSPI_IPRXFCR);
 	/* invalid RXFIFO first */
@@ -890,8 +889,9 @@ static int nxp_fspi_do_op(struct nxp_fspi *f, const struct spi_mem_op *op)
 	 * the LUT at each exec_op() call. And also specify the DATA
 	 * length, since it's has not been specified in the LUT.
 	 */
+	seqid_lut = f->devtype_data->lut_num - 1;
 	fspi_writel(f, op->data.nbytes |
-		 (SEQID_LUT << FSPI_IPCR1_SEQID_SHIFT) |
+		 (seqid_lut << FSPI_IPCR1_SEQID_SHIFT) |
 		 (seqnum << FSPI_IPCR1_SEQNUM_SHIFT),
 		 base + FSPI_IPCR1);
 
@@ -1015,7 +1015,7 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
 {
 	void __iomem *base = f->iobase;
 	int ret, i;
-	u32 reg;
+	u32 reg, seqid_lut;
 
 	/* disable and unprepare clock to avoid glitch pass to controller */
 	nxp_fspi_clk_disable_unprep(f);
@@ -1090,11 +1090,17 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
 	fspi_writel(f, reg, base + FSPI_FLSHB1CR1);
 	fspi_writel(f, reg, base + FSPI_FLSHB2CR1);
 
+	/*
+	 * The driver only uses one single LUT entry, that is updated on
+	 * each call of exec_op(). Index 0 is preset at boot with a basic
+	 * read operation, so let's use the last entry.
+	 */
+	seqid_lut = f->devtype_data->lut_num - 1;
 	/* AHB Read - Set lut sequence ID for all CS. */
-	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA1CR2);
-	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA2CR2);
-	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHB1CR2);
-	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHB2CR2);
+	fspi_writel(f, seqid_lut, base + FSPI_FLSHA1CR2);
+	fspi_writel(f, seqid_lut, base + FSPI_FLSHA2CR2);
+	fspi_writel(f, seqid_lut, base + FSPI_FLSHB1CR2);
+	fspi_writel(f, seqid_lut, base + FSPI_FLSHB2CR2);
 
 	f->selected = -1;
 
-- 
2.34.1

Re: [PATCH v3 2/4] spi: fspi: involve lut_num for struct nxp_fspi_devtype_data

[Frank Li]

On Thu, Sep 05, 2024 at 05:43:36PM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
>
> The flexspi on different SoCs may have different number of LUTs.
> So involve lut_num in nxp_fspi_devtype_data to make distinguish.
> This patch prepare for the adding of imx8ulp.
>
> Fixes: ef89fd56bdfc ("arm64: dts: imx8ulp: add flexspi node")
> Cc: stable@kernel.org
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> ---
>  drivers/spi/spi-nxp-fspi.c | 44 ++++++++++++++++++++++----------------
>  1 file changed, 25 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
> index fd1816befcd8..f42c14d80289 100644
> --- a/drivers/spi/spi-nxp-fspi.c
> +++ b/drivers/spi/spi-nxp-fspi.c
> @@ -57,13 +57,6 @@
>  #include <linux/spi/spi.h>
>  #include <linux/spi/spi-mem.h>
>
> -/*
> - * The driver only uses one single LUT entry, that is updated on
> - * each call of exec_op(). Index 0 is preset at boot with a basic
> - * read operation, so let's use the last entry (31).
> - */
> -#define	SEQID_LUT			31
> -
>  /* Registers used by the driver */
>  #define FSPI_MCR0			0x00
>  #define FSPI_MCR0_AHB_TIMEOUT(x)	((x) << 24)
> @@ -263,9 +256,6 @@
>  #define FSPI_TFDR			0x180
>
>  #define FSPI_LUT_BASE			0x200
> -#define FSPI_LUT_OFFSET			(SEQID_LUT * 4 * 4)
> -#define FSPI_LUT_REG(idx) \
> -	(FSPI_LUT_BASE + FSPI_LUT_OFFSET + (idx) * 4)
>
>  /* register map end */
>
> @@ -341,6 +331,7 @@ struct nxp_fspi_devtype_data {
>  	unsigned int txfifo;
>  	unsigned int ahb_buf_size;
>  	unsigned int quirks;
> +	unsigned int lut_num;
>  	bool little_endian;
>  };
>
> @@ -349,6 +340,7 @@ static struct nxp_fspi_devtype_data lx2160a_data = {
>  	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
>  	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
>  	.quirks = 0,
> +	.lut_num = 32,
>  	.little_endian = true,  /* little-endian    */
>  };
>
> @@ -357,6 +349,7 @@ static struct nxp_fspi_devtype_data imx8mm_data = {
>  	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
>  	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
>  	.quirks = 0,
> +	.lut_num = 32,
>  	.little_endian = true,  /* little-endian    */
>  };
>
> @@ -365,6 +358,7 @@ static struct nxp_fspi_devtype_data imx8qxp_data = {
>  	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
>  	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
>  	.quirks = 0,
> +	.lut_num = 32,
>  	.little_endian = true,  /* little-endian    */
>  };
>
> @@ -373,6 +367,7 @@ static struct nxp_fspi_devtype_data imx8dxl_data = {
>  	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
>  	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
>  	.quirks = FSPI_QUIRK_USE_IP_ONLY,
> +	.lut_num = 32,
>  	.little_endian = true,  /* little-endian    */
>  };
>
> @@ -544,6 +539,8 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
>  	void __iomem *base = f->iobase;
>  	u32 lutval[4] = {};
>  	int lutidx = 1, i;
> +	u32 lut_offset = (f->devtype_data->lut_num - 1) * 4 * 4;
> +	u32 target_lut_reg;
>
>  	/* cmd */
>  	lutval[0] |= LUT_DEF(0, LUT_CMD, LUT_PAD(op->cmd.buswidth),
> @@ -588,8 +585,10 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
>  	fspi_writel(f, FSPI_LCKER_UNLOCK, f->iobase + FSPI_LCKCR);
>
>  	/* fill LUT */
> -	for (i = 0; i < ARRAY_SIZE(lutval); i++)
> -		fspi_writel(f, lutval[i], base + FSPI_LUT_REG(i));
> +	for (i = 0; i < ARRAY_SIZE(lutval); i++) {
> +		target_lut_reg = FSPI_LUT_BASE + lut_offset + i * 4;
> +		fspi_writel(f, lutval[i], base + target_lut_reg);
> +	}
>
>  	dev_dbg(f->dev, "CMD[%02x] lutval[0:%08x 1:%08x 2:%08x 3:%08x], size: 0x%08x\n",
>  		op->cmd.opcode, lutval[0], lutval[1], lutval[2], lutval[3], op->data.nbytes);
> @@ -874,7 +873,7 @@ static int nxp_fspi_do_op(struct nxp_fspi *f, const struct spi_mem_op *op)
>  	void __iomem *base = f->iobase;
>  	int seqnum = 0;
>  	int err = 0;
> -	u32 reg;
> +	u32 reg, seqid_lut;
>
>  	reg = fspi_readl(f, base + FSPI_IPRXFCR);
>  	/* invalid RXFIFO first */
> @@ -890,8 +889,9 @@ static int nxp_fspi_do_op(struct nxp_fspi *f, const struct spi_mem_op *op)
>  	 * the LUT at each exec_op() call. And also specify the DATA
>  	 * length, since it's has not been specified in the LUT.
>  	 */
> +	seqid_lut = f->devtype_data->lut_num - 1;
>  	fspi_writel(f, op->data.nbytes |
> -		 (SEQID_LUT << FSPI_IPCR1_SEQID_SHIFT) |
> +		 (seqid_lut << FSPI_IPCR1_SEQID_SHIFT) |
>  		 (seqnum << FSPI_IPCR1_SEQNUM_SHIFT),
>  		 base + FSPI_IPCR1);
>
> @@ -1015,7 +1015,7 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
>  {
>  	void __iomem *base = f->iobase;
>  	int ret, i;
> -	u32 reg;
> +	u32 reg, seqid_lut;
>
>  	/* disable and unprepare clock to avoid glitch pass to controller */
>  	nxp_fspi_clk_disable_unprep(f);
> @@ -1090,11 +1090,17 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
>  	fspi_writel(f, reg, base + FSPI_FLSHB1CR1);
>  	fspi_writel(f, reg, base + FSPI_FLSHB2CR1);
>
> +	/*
> +	 * The driver only uses one single LUT entry, that is updated on
> +	 * each call of exec_op(). Index 0 is preset at boot with a basic
> +	 * read operation, so let's use the last entry.
> +	 */
> +	seqid_lut = f->devtype_data->lut_num - 1;
>  	/* AHB Read - Set lut sequence ID for all CS. */
> -	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA1CR2);
> -	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA2CR2);
> -	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHB1CR2);
> -	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHB2CR2);
> +	fspi_writel(f, seqid_lut, base + FSPI_FLSHA1CR2);
> +	fspi_writel(f, seqid_lut, base + FSPI_FLSHA2CR2);
> +	fspi_writel(f, seqid_lut, base + FSPI_FLSHB1CR2);
> +	fspi_writel(f, seqid_lut, base + FSPI_FLSHB2CR2);
>
>  	f->selected = -1;
>
> --
> 2.34.1
>

[PATCH v3 3/4] spi: fspi: add support for imx8ulp

[haibo.chen]

From: Haibo Chen <haibo.chen@nxp.com>

The flexspi on imx8ulp only has 16 LUTs, different with others which
have up to 32 LUTs.

Add a separate compatible string and nxp_fspi_devtype_data to support
flexspi on imx8ulp.

Fixes: ef89fd56bdfc ("arm64: dts: imx8ulp: add flexspi node")
Cc: stable@kernel.org
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 drivers/spi/spi-nxp-fspi.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index f42c14d80289..69e427b1903b 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -371,6 +371,15 @@ static struct nxp_fspi_devtype_data imx8dxl_data = {
 	.little_endian = true,  /* little-endian    */
 };
 
+static struct nxp_fspi_devtype_data imx8ulp_data = {
+	.rxfifo = SZ_512,       /* (64  * 64 bits)  */
+	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
+	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
+	.quirks = 0,
+	.lut_num = 16,
+	.little_endian = true,  /* little-endian    */
+};
+
 struct nxp_fspi {
 	void __iomem *iobase;
 	void __iomem *ahb_addr;
@@ -1295,6 +1304,7 @@ static const struct of_device_id nxp_fspi_dt_ids[] = {
 	{ .compatible = "nxp,imx8mp-fspi", .data = (void *)&imx8mm_data, },
 	{ .compatible = "nxp,imx8qxp-fspi", .data = (void *)&imx8qxp_data, },
 	{ .compatible = "nxp,imx8dxl-fspi", .data = (void *)&imx8dxl_data, },
+	{ .compatible = "nxp,imx8ulp-fspi", .data = (void *)&imx8ulp_data, },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, nxp_fspi_dt_ids);
-- 
2.34.1

Re: [PATCH v3 3/4] spi: fspi: add support for imx8ulp

[Frank Li]

On Thu, Sep 05, 2024 at 05:43:37PM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
>
> The flexspi on imx8ulp only has 16 LUTs, different with others which
> have up to 32 LUTs.
>
> Add a separate compatible string and nxp_fspi_devtype_data to support
> flexspi on imx8ulp.
>
> Fixes: ef89fd56bdfc ("arm64: dts: imx8ulp: add flexspi node")
> Cc: stable@kernel.org
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> ---
>  drivers/spi/spi-nxp-fspi.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
> index f42c14d80289..69e427b1903b 100644
> --- a/drivers/spi/spi-nxp-fspi.c
> +++ b/drivers/spi/spi-nxp-fspi.c
> @@ -371,6 +371,15 @@ static struct nxp_fspi_devtype_data imx8dxl_data = {
>  	.little_endian = true,  /* little-endian    */
>  };
>
> +static struct nxp_fspi_devtype_data imx8ulp_data = {
> +	.rxfifo = SZ_512,       /* (64  * 64 bits)  */
> +	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
> +	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
> +	.quirks = 0,
> +	.lut_num = 16,
> +	.little_endian = true,  /* little-endian    */
> +};
> +
>  struct nxp_fspi {
>  	void __iomem *iobase;
>  	void __iomem *ahb_addr;
> @@ -1295,6 +1304,7 @@ static const struct of_device_id nxp_fspi_dt_ids[] = {
>  	{ .compatible = "nxp,imx8mp-fspi", .data = (void *)&imx8mm_data, },
>  	{ .compatible = "nxp,imx8qxp-fspi", .data = (void *)&imx8qxp_data, },
>  	{ .compatible = "nxp,imx8dxl-fspi", .data = (void *)&imx8dxl_data, },
> +	{ .compatible = "nxp,imx8ulp-fspi", .data = (void *)&imx8ulp_data, },
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, nxp_fspi_dt_ids);
> --
> 2.34.1
>

[PATCH v3 4/4] arm64: dts: imx8ulp: correct the flexspi compatible string

[haibo.chen]

From: Haibo Chen <haibo.chen@nxp.com>

The flexspi on imx8ulp only has 16 LUTs, and imx8mm flexspi has
32 LUTs, so correct the compatible string here, otherwise will
meet below error:

[    1.119072] ------------[ cut here ]------------
[    1.123926] WARNING: CPU: 0 PID: 1 at drivers/spi/spi-nxp-fspi.c:855 nxp_fspi_exec_op+0xb04/0xb64
[    1.133239] Modules linked in:
[    1.136448] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.11.0-rc6-next-20240902-00001-g131bf9439dd9 #69
[    1.146821] Hardware name: NXP i.MX8ULP EVK (DT)
[    1.151647] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[    1.158931] pc : nxp_fspi_exec_op+0xb04/0xb64
[    1.163496] lr : nxp_fspi_exec_op+0xa34/0xb64
[    1.168060] sp : ffff80008002b2a0
[    1.171526] x29: ffff80008002b2d0 x28: 0000000000000000 x27: 0000000000000000
[    1.179002] x26: ffff2eb645542580 x25: ffff800080610014 x24: ffff800080610000
[    1.186480] x23: ffff2eb645548080 x22: 0000000000000006 x21: ffff2eb6455425e0
[    1.193956] x20: 0000000000000000 x19: ffff80008002b5e0 x18: ffffffffffffffff
[    1.201432] x17: ffff2eb644467508 x16: 0000000000000138 x15: 0000000000000002
[    1.208907] x14: 0000000000000000 x13: ffff2eb6400d8080 x12: 00000000ffffff00
[    1.216378] x11: 0000000000000000 x10: ffff2eb6400d8080 x9 : ffff2eb697adca80
[    1.223850] x8 : ffff2eb697ad3cc0 x7 : 0000000100000000 x6 : 0000000000000001
[    1.231324] x5 : 0000000000000000 x4 : 0000000000000000 x3 : 00000000000007a6
[    1.238795] x2 : 0000000000000000 x1 : 00000000000001ce x0 : 00000000ffffff92
[    1.246267] Call trace:
[    1.248824]  nxp_fspi_exec_op+0xb04/0xb64
[    1.253031]  spi_mem_exec_op+0x3a0/0x430
[    1.257139]  spi_nor_read_id+0x80/0xcc
[    1.261065]  spi_nor_scan+0x1ec/0xf10
[    1.264901]  spi_nor_probe+0x108/0x2fc
[    1.268828]  spi_mem_probe+0x6c/0xbc
[    1.272574]  spi_probe+0x84/0xe4
[    1.275958]  really_probe+0xbc/0x29c
[    1.279713]  __driver_probe_device+0x78/0x12c
[    1.284277]  driver_probe_device+0xd8/0x15c
[    1.288660]  __device_attach_driver+0xb8/0x134
[    1.293316]  bus_for_each_drv+0x88/0xe8
[    1.297337]  __device_attach+0xa0/0x190
[    1.301353]  device_initial_probe+0x14/0x20
[    1.305734]  bus_probe_device+0xac/0xb0
[    1.309752]  device_add+0x5d0/0x790
[    1.313408]  __spi_add_device+0x134/0x204
[    1.317606]  of_register_spi_device+0x3b4/0x590
[    1.322348]  spi_register_controller+0x47c/0x754
[    1.327181]  devm_spi_register_controller+0x4c/0xa4
[    1.332289]  nxp_fspi_probe+0x1cc/0x2b0
[    1.336307]  platform_probe+0x68/0xc4
[    1.340145]  really_probe+0xbc/0x29c
[    1.343893]  __driver_probe_device+0x78/0x12c
[    1.348457]  driver_probe_device+0xd8/0x15c
[    1.352838]  __driver_attach+0x90/0x19c
[    1.356857]  bus_for_each_dev+0x7c/0xdc
[    1.360877]  driver_attach+0x24/0x30
[    1.364624]  bus_add_driver+0xe4/0x208
[    1.368552]  driver_register+0x5c/0x124
[    1.372573]  __platform_driver_register+0x28/0x34
[    1.377497]  nxp_fspi_driver_init+0x1c/0x28
[    1.381888]  do_one_initcall+0x80/0x1c8
[    1.385908]  kernel_init_freeable+0x1c4/0x28c
[    1.390472]  kernel_init+0x20/0x1d8
[    1.394138]  ret_from_fork+0x10/0x20
[    1.397885] ---[ end trace 0000000000000000 ]---
[    1.407908] ------------[ cut here ]------------

Fixes: ef89fd56bdfc ("arm64: dts: imx8ulp: add flexspi node")
Cc: stable@kernel.org
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index e32d5afcf4a9..43f543768444 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -384,7 +384,7 @@ pcc4: clock-controller@29800000 {
 			};
 
 			flexspi2: spi@29810000 {
-				compatible = "nxp,imx8mm-fspi";
+				compatible = "nxp,imx8ulp-fspi";
 				reg = <0x29810000 0x10000>, <0x60000000 0x10000000>;
 				reg-names = "fspi_base", "fspi_mmap";
 				#address-cells = <1>;
-- 
2.34.1

RE: [PATCH v3 4/4] arm64: dts: imx8ulp: correct the flexspi compatible string

[Bough Chen]

Gentle ping.

For this patch set, other three patches already accepted.

Best Regards
Haibo Chen
> -----Original Message-----
> From: Bough Chen <haibo.chen@nxp.com>
> Sent: 2024年9月5日 17:44
> To: Han Xu <han.xu@nxp.com>; yogeshgaur.83@gmail.com;
> broonie@kernel.org; robh@kernel.org; krzk+dt@kernel.org;
> conor+dt@kernel.org; shawnguo@kernel.org; s.hauer@pengutronix.de
> Cc: kernel@pengutronix.de; festevam@gmail.com;
> singh.kuldeep87k@gmail.com; hs@denx.de; linux-spi@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; imx@lists.linux.dev;
> linux-arm-kernel@lists.infradead.org; Bough Chen <haibo.chen@nxp.com>;
> Peng Fan <peng.fan@nxp.com>; stable@kernel.org
> Subject: [PATCH v3 4/4] arm64: dts: imx8ulp: correct the flexspi compatible
> string
> 
> From: Haibo Chen <haibo.chen@nxp.com>
> 
> The flexspi on imx8ulp only has 16 LUTs, and imx8mm flexspi has
> 32 LUTs, so correct the compatible string here, otherwise will meet below error:
> 
> [    1.119072] ------------[ cut here ]------------
> [    1.123926] WARNING: CPU: 0 PID: 1 at drivers/spi/spi-nxp-fspi.c:855
> nxp_fspi_exec_op+0xb04/0xb64
> [    1.133239] Modules linked in:
> [    1.136448] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted
> 6.11.0-rc6-next-20240902-00001-g131bf9439dd9 #69
> [    1.146821] Hardware name: NXP i.MX8ULP EVK (DT)
> [    1.151647] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS
> BTYPE=--)
> [    1.158931] pc : nxp_fspi_exec_op+0xb04/0xb64
> [    1.163496] lr : nxp_fspi_exec_op+0xa34/0xb64
> [    1.168060] sp : ffff80008002b2a0
> [    1.171526] x29: ffff80008002b2d0 x28: 0000000000000000 x27:
> 0000000000000000
> [    1.179002] x26: ffff2eb645542580 x25: ffff800080610014 x24:
> ffff800080610000
> [    1.186480] x23: ffff2eb645548080 x22: 0000000000000006 x21:
> ffff2eb6455425e0
> [    1.193956] x20: 0000000000000000 x19: ffff80008002b5e0 x18:
> ffffffffffffffff
> [    1.201432] x17: ffff2eb644467508 x16: 0000000000000138 x15:
> 0000000000000002
> [    1.208907] x14: 0000000000000000 x13: ffff2eb6400d8080 x12:
> 00000000ffffff00
> [    1.216378] x11: 0000000000000000 x10: ffff2eb6400d8080 x9 :
> ffff2eb697adca80
> [    1.223850] x8 : ffff2eb697ad3cc0 x7 : 0000000100000000 x6 :
> 0000000000000001
> [    1.231324] x5 : 0000000000000000 x4 : 0000000000000000 x3 :
> 00000000000007a6
> [    1.238795] x2 : 0000000000000000 x1 : 00000000000001ce x0 :
> 00000000ffffff92
> [    1.246267] Call trace:
> [    1.248824]  nxp_fspi_exec_op+0xb04/0xb64
> [    1.253031]  spi_mem_exec_op+0x3a0/0x430
> [    1.257139]  spi_nor_read_id+0x80/0xcc
> [    1.261065]  spi_nor_scan+0x1ec/0xf10
> [    1.264901]  spi_nor_probe+0x108/0x2fc
> [    1.268828]  spi_mem_probe+0x6c/0xbc
> [    1.272574]  spi_probe+0x84/0xe4
> [    1.275958]  really_probe+0xbc/0x29c
> [    1.279713]  __driver_probe_device+0x78/0x12c
> [    1.284277]  driver_probe_device+0xd8/0x15c
> [    1.288660]  __device_attach_driver+0xb8/0x134
> [    1.293316]  bus_for_each_drv+0x88/0xe8
> [    1.297337]  __device_attach+0xa0/0x190
> [    1.301353]  device_initial_probe+0x14/0x20
> [    1.305734]  bus_probe_device+0xac/0xb0
> [    1.309752]  device_add+0x5d0/0x790
> [    1.313408]  __spi_add_device+0x134/0x204
> [    1.317606]  of_register_spi_device+0x3b4/0x590
> [    1.322348]  spi_register_controller+0x47c/0x754
> [    1.327181]  devm_spi_register_controller+0x4c/0xa4
> [    1.332289]  nxp_fspi_probe+0x1cc/0x2b0
> [    1.336307]  platform_probe+0x68/0xc4
> [    1.340145]  really_probe+0xbc/0x29c
> [    1.343893]  __driver_probe_device+0x78/0x12c
> [    1.348457]  driver_probe_device+0xd8/0x15c
> [    1.352838]  __driver_attach+0x90/0x19c
> [    1.356857]  bus_for_each_dev+0x7c/0xdc
> [    1.360877]  driver_attach+0x24/0x30
> [    1.364624]  bus_add_driver+0xe4/0x208
> [    1.368552]  driver_register+0x5c/0x124
> [    1.372573]  __platform_driver_register+0x28/0x34
> [    1.377497]  nxp_fspi_driver_init+0x1c/0x28
> [    1.381888]  do_one_initcall+0x80/0x1c8
> [    1.385908]  kernel_init_freeable+0x1c4/0x28c
> [    1.390472]  kernel_init+0x20/0x1d8
> [    1.394138]  ret_from_fork+0x10/0x20
> [    1.397885] ---[ end trace 0000000000000000 ]---
> [    1.407908] ------------[ cut here ]------------
> 
> Fixes: ef89fd56bdfc ("arm64: dts: imx8ulp: add flexspi node")
> Cc: stable@kernel.org
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index e32d5afcf4a9..43f543768444 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> @@ -384,7 +384,7 @@ pcc4: clock-controller@29800000 {
>  			};
> 
>  			flexspi2: spi@29810000 {
> -				compatible = "nxp,imx8mm-fspi";
> +				compatible = "nxp,imx8ulp-fspi";
>  				reg = <0x29810000 0x10000>, <0x60000000 0x10000000>;
>  				reg-names = "fspi_base", "fspi_mmap";
>  				#address-cells = <1>;
> --
> 2.34.1

Re: [PATCH v3 4/4] arm64: dts: imx8ulp: correct the flexspi compatible string

[Shawn Guo]

On Thu, Sep 05, 2024 at 05:43:38PM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
> 
> The flexspi on imx8ulp only has 16 LUTs, and imx8mm flexspi has
> 32 LUTs, so correct the compatible string here, otherwise will
> meet below error:
> 
> [    1.119072] ------------[ cut here ]------------
> [    1.123926] WARNING: CPU: 0 PID: 1 at drivers/spi/spi-nxp-fspi.c:855 nxp_fspi_exec_op+0xb04/0xb64
> [    1.133239] Modules linked in:
> [    1.136448] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.11.0-rc6-next-20240902-00001-g131bf9439dd9 #69
> [    1.146821] Hardware name: NXP i.MX8ULP EVK (DT)
> [    1.151647] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> [    1.158931] pc : nxp_fspi_exec_op+0xb04/0xb64
> [    1.163496] lr : nxp_fspi_exec_op+0xa34/0xb64
> [    1.168060] sp : ffff80008002b2a0
> [    1.171526] x29: ffff80008002b2d0 x28: 0000000000000000 x27: 0000000000000000
> [    1.179002] x26: ffff2eb645542580 x25: ffff800080610014 x24: ffff800080610000
> [    1.186480] x23: ffff2eb645548080 x22: 0000000000000006 x21: ffff2eb6455425e0
> [    1.193956] x20: 0000000000000000 x19: ffff80008002b5e0 x18: ffffffffffffffff
> [    1.201432] x17: ffff2eb644467508 x16: 0000000000000138 x15: 0000000000000002
> [    1.208907] x14: 0000000000000000 x13: ffff2eb6400d8080 x12: 00000000ffffff00
> [    1.216378] x11: 0000000000000000 x10: ffff2eb6400d8080 x9 : ffff2eb697adca80
> [    1.223850] x8 : ffff2eb697ad3cc0 x7 : 0000000100000000 x6 : 0000000000000001
> [    1.231324] x5 : 0000000000000000 x4 : 0000000000000000 x3 : 00000000000007a6
> [    1.238795] x2 : 0000000000000000 x1 : 00000000000001ce x0 : 00000000ffffff92
> [    1.246267] Call trace:
> [    1.248824]  nxp_fspi_exec_op+0xb04/0xb64
> [    1.253031]  spi_mem_exec_op+0x3a0/0x430
> [    1.257139]  spi_nor_read_id+0x80/0xcc
> [    1.261065]  spi_nor_scan+0x1ec/0xf10
> [    1.264901]  spi_nor_probe+0x108/0x2fc
> [    1.268828]  spi_mem_probe+0x6c/0xbc
> [    1.272574]  spi_probe+0x84/0xe4
> [    1.275958]  really_probe+0xbc/0x29c
> [    1.279713]  __driver_probe_device+0x78/0x12c
> [    1.284277]  driver_probe_device+0xd8/0x15c
> [    1.288660]  __device_attach_driver+0xb8/0x134
> [    1.293316]  bus_for_each_drv+0x88/0xe8
> [    1.297337]  __device_attach+0xa0/0x190
> [    1.301353]  device_initial_probe+0x14/0x20
> [    1.305734]  bus_probe_device+0xac/0xb0
> [    1.309752]  device_add+0x5d0/0x790
> [    1.313408]  __spi_add_device+0x134/0x204
> [    1.317606]  of_register_spi_device+0x3b4/0x590
> [    1.322348]  spi_register_controller+0x47c/0x754
> [    1.327181]  devm_spi_register_controller+0x4c/0xa4
> [    1.332289]  nxp_fspi_probe+0x1cc/0x2b0
> [    1.336307]  platform_probe+0x68/0xc4
> [    1.340145]  really_probe+0xbc/0x29c
> [    1.343893]  __driver_probe_device+0x78/0x12c
> [    1.348457]  driver_probe_device+0xd8/0x15c
> [    1.352838]  __driver_attach+0x90/0x19c
> [    1.356857]  bus_for_each_dev+0x7c/0xdc
> [    1.360877]  driver_attach+0x24/0x30
> [    1.364624]  bus_add_driver+0xe4/0x208
> [    1.368552]  driver_register+0x5c/0x124
> [    1.372573]  __platform_driver_register+0x28/0x34
> [    1.377497]  nxp_fspi_driver_init+0x1c/0x28
> [    1.381888]  do_one_initcall+0x80/0x1c8
> [    1.385908]  kernel_init_freeable+0x1c4/0x28c
> [    1.390472]  kernel_init+0x20/0x1d8
> [    1.394138]  ret_from_fork+0x10/0x20
> [    1.397885] ---[ end trace 0000000000000000 ]---
> [    1.407908] ------------[ cut here ]------------
> 
> Fixes: ef89fd56bdfc ("arm64: dts: imx8ulp: add flexspi node")
> Cc: stable@kernel.org
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Applied, thanks!

Re: (subset) [PATCH v3 0/4] fix the flexspi error on imx8ulp

[Mark Brown]

On Thu, 05 Sep 2024 17:43:34 +0800, haibo.chen@nxp.com wrote:
> The flexspi on imx8ulp only has 16 LUTs, different with others
> which has 32 LUTs. So currently flexspi driver will write the
> wrong register when fill LUT.
> 
> This patch set add a new compatible string for imx8ulp to
> distinguish the LUT number.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/4] dt-bindings: spi: nxp-fspi: add imx8ulp support
      commit: 12736adc43b7cd5cb83f274f8f37b0f89d107c97
[2/4] spi: fspi: involve lut_num for struct nxp_fspi_devtype_data
      commit: 190b7e2efb1ed8435fc7431d9c7a2447d05d5066
[3/4] spi: fspi: add support for imx8ulp
      commit: 9228956a620553d7fd17f703a37a26c91e4d92ab

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark