[PATCH v15 16/32] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state

Delphine CC Chiu
2024-09-06T06:28:19Z

Initialize bmc gpio state

Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 234 ++++++++++++++++++
1 file changed, 234 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index c0497a1aa93e..60743f9829a5 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1304,3 +1304,237 @@ &ehci1 {
&uhci {
status = "okay";
};
+
+&sgpiom0 {
+ status = "okay";
+ ngpios = <128>;
+ bus-frequency = <48000>;
+};
+
+&pinctrl {
+ pinctrl_gpio0_unbiased: gpio0_unbiased {
+ /* GPIOB0, GPIOB1 */
+ pins = "J26", "K23";
+ bias-disable;
+ };
+ pinctrl_gpio2_unbiased: gpio2_unbiased {
+ /* GPIOI5, GPIOI6, GPIOI7,
+ GPIOL6 */
+ pins = "E16", "B16", "A15", "B14";
+ bias-disable;
+ };
+ pinctrl_gpio3_unbiased: gpio3_unbiased {
+ /* GPIOM2, GPIOM3, GPIOM4, GPIOM5,
+ GPION0, GPION1, GPION2, GPION3, GPION5,
+ GPIOO0, GPIOO1, GPIOO2, GPIOO3,
+ GPIOP0, GPIOP1, GPIOP2, GPIOP3, GPIOP4, GPIOP5, GPIOP6 */
+ pins = "A12", "E14", "B12", "C12", "P25", "N23", "N25", "N24", "M23", "AD26", "AD22", "AD23", "AD24", "AB22", "W24", "AA23", "AA24", "W23", "AB23", "AB24";
+ bias-disable;
+ };
+ pinctrl_gpio4_unbiased: gpio4_unbiased {
+ /* GPIOR0, GPIOR1, GPIOR2, GPIOR3, GPIOR4, GPIOR5, GPIOR6, GPIOR7
+ GPIOS0, GPIOS1, GPIOS2, GPIOS3, GPIOS5, GPIOS6, GPIOS7 */
+ pins = "V25", "U24", "V24", "V26", "U25", "T23", "W26", "U26", "R23", "T25", "T26", "R24", "P24", "P23", "T24";
+ bias-disable;
+ };
+ pinctrl_gpio5_unbiased: gpio5_unbiased {
+ /* GPIOV0, GPIOV1, GPIOV2, GPIOV3, GPIOV4, GPIOV5, GPIOV6, GPIOV7
+ GPIOX1, GPIOX2 */
+ pins = "AB15", "AF14", "AD14", "AC15", "AE15", "AE14", "AD15", "AF15", "AA9", "AC9";
+ bias-disable;
+ };
+ pinctrl_gpio6_unbiased: gpio6_unbiased {
+ /* GPIOY2, GPIOY5, GPIOY6
+ GPIOZ0, GPIOZ1, GPIOZ3, GPIOZ4 */
+ pins = "AE11", "AF12", "AC12", "AC10", "AD10", "AB11", "AC11";
+ bias-disable;
+ };
+};
+
+&gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiu2_default &pinctrl_gpiu3_default
+ &pinctrl_gpiu4_default &pinctrl_gpiu6_default
+ &pinctrl_gpio0_unbiased &pinctrl_gpio2_unbiased
+ &pinctrl_gpio3_unbiased &pinctrl_gpio4_unbiased
+ &pinctrl_gpio5_unbiased &pinctrl_gpio6_unbiased>;
+ gpio-line-names =
+ /*A0-A7*/ "","","","","","","","",
+ /*B0-B7*/ "FLT_HSC_SERVER_SLOT8_N","AC_ON_OFF_BTN_CPLD_SLOT5_N",
+ "PWRGD_SLOT1_STBY","PWRGD_SLOT2_STBY",
+ "PWRGD_SLOT3_STBY","PWRGD_SLOT4_STBY","","",
+ /*C0-C7*/ "","","","","FM_NIC0_WAKE_N",
+ "FM_NIC1_WAKE_N","","RST_PCIE_SLOT2_N",
+ /*D0-D7*/ "","","","","","","","",
+ /*E0-E7*/ "PRSNT_NIC1_N","PRSNT_NIC2_N","","RST_PCIE_SLOT1_N",
+ "","","","",
+ /*F0-F7*/ "FM_RESBTN_SLOT1_BMC_N","FM_RESBTN_SLOT2_BMC_N",
+ "FM_RESBTN_SLOT3_BMC_N","FM_RESBTN_SLOT4_BMC_N",
+ "PRSNT_SB_SLOT1_N","PRSNT_SB_SLOT2_N",
+ "PRSNT_SB_SLOT3_N","PRSNT_SB_SLOT4_N",
+ /*G0-G7*/ "","","","","","","","",
+ /*H0-H7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","ALT_MEDUSA_ADC_N",
+ "ALT_SMB_BMC_CPLD2_N",
+ "INT_SPIDER_ADC_R_N",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","ALT_MEDUSA_P12V_EFUSE_N","",
+ /*M0-M7*/ "EN_NIC0_POWER_BMC_R","EN_NIC1_POWER_BMC_R",
+ "INT_MEDUSA_IOEXP_TEMP_N","PRSNT_NIC3_N",
+ "INT_SMB_BMC_SLOT1_4_BMC_N",
+ "AC_ON_OFF_BTN_CPLD_SLOT6_N","","",
+ /*N0-N7*/ "FLT_HSC_SERVER_SLOT1_N","FLT_HSC_SERVER_SLOT2_N",
+ "FLT_HSC_SERVER_SLOT3_N","FLT_HSC_SERVER_SLOT4_N",
+ "FM_BMC_READY_R2","RST_SMB_NIC0_R_N","","",
+ /*O0-O7*/ "AC_ON_OFF_BTN_CPLD_SLOT8_N","RST_SMB_NIC1_R_N",
+ "RST_SMB_NIC2_R_N","RST_SMB_NIC3_R_N",
+ "","","","",
+ /*P0-P7*/ "ALT_SMB_BMC_CPLD1_N","BTN_BMC_R2_N",
+ "EN_P3V_BAT_SCALED_R","PWRGD_P5V_USB_BMC",
+ "FM_BMC_RTCRST_R","RST_USB_HUB_R_N",
+ "FLAG_P5V_USB_BMC_N","",
+ /*Q0-Q7*/ "AC_ON_OFF_BTN_CPLD_SLOT1_N","AC_ON_OFF_BTN_CPLD_SLOT2_N",
+ "AC_ON_OFF_BTN_CPLD_SLOT3_N","AC_ON_OFF_BTN_CPLD_SLOT4_N",
+ "PRSNT_SB_SLOT5_N","PRSNT_SB_SLOT6_N",
+ "PRSNT_SB_SLOT7_N","PRSNT_SB_SLOT8_N",
+ /*R0-R7*/ "AC_ON_OFF_BTN_CPLD_SLOT7_N","INT_SMB_BMC_SLOT5_8_BMC_N",
+ "FM_PWRBRK_NIC_BMC_R2","RST_PCIE_SLOT4_N",
+ "RST_PCIE_SLOT5_N","RST_PCIE_SLOT6_N",
+ "RST_PCIE_SLOT7_N","RST_PCIE_SLOT8_N",
+ /*S0-S7*/ "FM_NIC2_WAKE_N","FM_NIC3_WAKE_N",
+ "EN_NIC3_POWER_BMC_R","SEL_BMC_JTAG_MUX_R",
+ "","ALT_P12V_AUX_N","FAST_PROCHOT_N",
+ "SPI_WP_DISABLE_STATUS_R_N",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","RST_PCIE_SLOT3_N","",
+ "","PRSNT_NIC0_N","","",
+ /*V0-V7*/ "FM_RESBTN_SLOT5_BMC_N","FM_RESBTN_SLOT6_BMC_N",
+ "FM_RESBTN_SLOT7_BMC_N","FM_RESBTN_SLOT8_BMC_N",
+ "","","","",
+ /*W0-W7*/ "PRSNT_TPM_BMC_N","PRSNT_OCP_DEBUG_BMC_N","ALT_TEMP_BMC_N","ALT_RTC_BMC_N",
+ "","","","",
+ /*X0-X7*/ "","LT_HSC_SERVER_SLOT6_N","FLT_HSC_SERVER_SLOT7_N","","","",
+ "PWRGD_SLOT5_STBY","PWRGD_SLOT6_STBY",
+ /*Y0-Y7*/ "","","SPI_LOCK_REQ_BMC_N","PWRGD_SLOT7_STBY",
+ "","","EN_NIC2_POWER_BMC_R","",
+ /*Z0-Z7*/ "EN_P5V_USB_CPLD_R","FLT_HSC_SERVER_SLOT5_N",
+ "PWRGD_SLOT8_STBY","","","","","";
+
+ pin_gpio_b4 {
+ gpios = <ASPEED_GPIO(B, 4) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_b5 {
+ gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_f0 {
+ gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f1 {
+ gpios = <ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f2 {
+ gpios = <ASPEED_GPIO(F, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f3 {
+ gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f4 {
+ gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f5 {
+ gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f6 {
+ gpios = <ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f7 {
+ gpios = <ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_l6 {
+ gpios = <ASPEED_GPIO(L, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_l7 {
+ gpios = <ASPEED_GPIO(L, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_s0 {
+ gpios = <ASPEED_GPIO(S, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_s1 {
+ gpios = <ASPEED_GPIO(S, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v0 {
+ gpios = <ASPEED_GPIO(V, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v1 {
+ gpios = <ASPEED_GPIO(V, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v2 {
+ gpios = <ASPEED_GPIO(V, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v3 {
+ gpios = <ASPEED_GPIO(V, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w0 {
+ gpios = <ASPEED_GPIO(W, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w1 {
+ gpios = <ASPEED_GPIO(W, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w2 {
+ gpios = <ASPEED_GPIO(W, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w3 {
+ gpios = <ASPEED_GPIO(W, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w4 {
+ gpios = <ASPEED_GPIO(W, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w5 {
+ gpios = <ASPEED_GPIO(W, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w6 {
+ gpios = <ASPEED_GPIO(W, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w7 {
+ gpios = <ASPEED_GPIO(W, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z3 {
+ gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z4 {
+ gpios = <ASPEED_GPIO(Z, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z5 {
+ gpios = <ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+};
--
2.25.1