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AJvYcCVW3zwpKyE7Fdf+KjkGaQNn6t36Xwo1f5aYNObr4GnBDJ6kd2kHgkezcRhaaszLgp1zQsOMSEhliKQM@vger.kernel.org X-Gm-Message-State: AOJu0YxCAz2IP3kzymSZCfQRn4s6RBKaBUWOzNE//gR4SPuxIVqFMEzG 0x0QS4ApDqDamJKlQV1CmqRaiFUzvkA/GLQnTW+FktQ+pE33SlyaPe6ZnJlSpg== X-Google-Smtp-Source: AGHT+IELriO1F3RjFu7Nlmk0OH8Yy7rcsbs7jfdrPadTuniwAi50BrFet+dLaCQCkStjWf6ncGBXOA== X-Received: by 2002:a05:6871:3319:b0:277:ff5a:db0f with SMTP id 586e51a60fabf-27c3f2cfe64mr2186877fac.27.1726152300341; Thu, 12 Sep 2024 07:45:00 -0700 (PDT) Received: from thinkpad ([120.60.79.18]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71908fe4e8asm4673021b3a.79.2024.09.12.07.44.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Sep 2024 07:45:00 -0700 (PDT) Date: Thu, 12 Sep 2024 20:14:39 +0530 From: Manivannan Sadhasivam To: Konrad Dybcio Cc: Qiang Yu , Dmitry Baryshkov , vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, andersson@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, abel.vesa@linaro.org, quic_msarkar@quicinc.com, quic_devipriy@quicinc.com, kw@linux.com, lpieralisi@kernel.org, neil.armstrong@linaro.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH 8/8] PCI: qcom: Add support to PCIe slot power supplies Message-ID: <20240912144439.fnne4x7qvggveve2@thinkpad> References: <20240827063631.3932971-1-quic_qianyu@quicinc.com> <20240827063631.3932971-9-quic_qianyu@quicinc.com> <20240827165826.moe6cnemeheos6jn@thinkpad> <26f2845f-2e29-4887-9f33-0b5b2a06adb6@quicinc.com> <20240911153228.7ajcqicxnu2afhbp@thinkpad> <9222ef18-2eef-4ba3-95aa-fae540c06925@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, Sep 12, 2024 at 04:15:56PM +0200, Konrad Dybcio wrote: > On 12.09.2024 3:39 PM, Qiang Yu wrote: > > > > On 9/11/2024 11:32 PM, Manivannan Sadhasivam wrote: > >> On Wed, Sep 11, 2024 at 04:17:41PM +0800, Qiang Yu wrote: > >>> On 8/28/2024 12:58 AM, Manivannan Sadhasivam wrote: > >>>> On Tue, Aug 27, 2024 at 02:44:09PM +0300, Dmitry Baryshkov wrote: > >>>>> On Tue, 27 Aug 2024 at 09:36, Qiang Yu wrote: > >>>>>> On platform x1e80100 QCP, PCIe3 is a standard x8 form factor. Hence, add > >>>>>> support to use 3.3v, 3.3v aux and 12v regulators. > >>>>> First of all, I don't see corresponding bindings change. > >>>>> > >>>>> Second, these supplies power up the slot, not the host controller > >>>>> itself. As such these supplies do not belong to the host controller > >>>>> entry. Please consider using the pwrseq framework instead. > >>>>> > >>>> Indeed. For legacy reasons, slot power supplies were populated in the host > >>>> bridge node itself until recently Rob started objecting it [1]. And it makes > >>>> real sense to put these supplies in the root port node and handle them in the > >>>> relevant driver. > >>>> > >>>> I'm still evaluating whether the handling should be done in the portdrv or > >>>> pwrctl driver, but haven't reached the conclusion. Pwrctl seems to be the ideal > >>>> choice, but I see a few issues related to handling the OF node for the root > >>>> port. > >>>> > >>>> Hope I'll come to a conclusion in the next few days and will update this thread. > >>>> > >>>> - Mani > >>>> > >>>> [1] https://lore.kernel.org/lkml/20240604235806.GA1903493-robh@kernel.org/ > >>> Hi Mani, do you have any updates? > >>> > >> I'm working with Bartosz to add a new pwrctl driver for rootports. And we are > >> debugging an issue currently. Unfortunately, the progress is very slow as I'm on > >> vacation still. > >> > >> Will post the patches once it got resolved. > >> > >> - Mani > > OK, thanks for your update. > > Qiang, you can still resubmit the rest of the patches without having > to wait on that to be resolved > In that case, the slot supplies should be described in the PCIe bridge. - Mani > Konrad -- மணிவண்ணன் சதாசிவம்