From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Qiang Yu <quic_qianyu@quicinc.com>,
vkoul@kernel.org, kishon@kernel.org, robh@kernel.org,
andersson@kernel.org, konradybcio@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
abel.vesa@linaro.org, quic_msarkar@quicinc.com,
quic_devipriy@quicinc.com, kw@linux.com, lpieralisi@kernel.org,
neil.armstrong@linaro.org, linux-arm-msm@vger.kernel.org,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 2/5] dt-bindings: PCI: qcom: Add OPP table for X1E80100
Date: Fri, 13 Sep 2024 19:06:19 +0530 [thread overview]
Message-ID: <20240913133619.z7cc4whhpvs2uecb@thinkpad> (raw)
In-Reply-To: <tf4z475uqjenohdgqj4ltoty3j3gopxnbdhrrn6zo3ug5yuvyq@us2nysv2ggxh>
On Fri, Sep 13, 2024 at 03:30:59PM +0300, Dmitry Baryshkov wrote:
> On Fri, Sep 13, 2024 at 01:37:21AM GMT, Qiang Yu wrote:
> > Add OPP table so that PCIe is able to adjust power domain performance
> > state and ICC peak bw according to PCIe gen speed and link width.
> >
> > Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
> > ---
> > Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
> > index a9db0a231563..e2d6719ca54d 100644
> > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
> > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
> > @@ -70,6 +70,10 @@ properties:
> > - const: pci # PCIe core reset
> > - const: link_down # PCIe link down reset
> >
> > + operating-points-v2: true
> > + opp-table:
> > + type: object
>
> I think these properties are generic enough and we might want to have
> them for most if not all platforms. Maybe we should move them to
> qcom,pcie-common.yaml?
>
Agree. It should be moved to qcom,pcie-common.yaml.
- Mani
> Krzysztof, Mani, WDYT?
>
> > +
> > allOf:
> > - $ref: qcom,pcie-common.yaml#
> >
> > --
> > 2.34.1
> >
> >
> > --
> > linux-phy mailing list
> > linux-phy@lists.infradead.org
> > https://lists.infradead.org/mailman/listinfo/linux-phy
>
> --
> With best wishes
> Dmitry
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2024-09-13 13:36 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-13 8:37 [PATCH v2 0/5] Add support for PCIe3 on x1e80100 Qiang Yu
2024-09-13 8:37 ` [PATCH v2 1/5] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8 Qiang Yu
2024-09-13 13:37 ` Manivannan Sadhasivam
2024-09-19 13:47 ` Qiang Yu
2024-09-16 15:15 ` Krzysztof Kozlowski
2024-09-19 14:03 ` Qiang Yu
2024-09-19 15:37 ` Konrad Dybcio
2024-09-20 11:22 ` Krzysztof Kozlowski
2024-09-13 8:37 ` [PATCH v2 2/5] dt-bindings: PCI: qcom: Add OPP table for X1E80100 Qiang Yu
2024-09-13 12:30 ` Dmitry Baryshkov
2024-09-13 13:36 ` Manivannan Sadhasivam [this message]
2024-09-16 15:20 ` Krzysztof Kozlowski
2024-09-16 15:20 ` Krzysztof Kozlowski
2024-09-13 8:37 ` [PATCH v2 3/5] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3 Qiang Yu
2024-09-13 12:28 ` Dmitry Baryshkov
2024-09-16 23:29 ` Konrad Dybcio
2024-09-13 8:37 ` [PATCH v2 4/5] clk: qcom: gcc-x1e80100: Fix halt_check for pipediv2 clocks Qiang Yu
2024-09-13 8:37 ` [PATCH v2 5/5] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 Qiang Yu
2024-09-13 12:35 ` Dmitry Baryshkov
2024-09-13 13:57 ` Manivannan Sadhasivam
2024-09-19 14:05 ` Qiang Yu
2024-09-14 3:59 ` [PATCH v2 0/5] " Krishna Chaitanya Chundru
2024-09-19 14:14 ` Qiang Yu
2024-09-22 17:09 ` Manivannan Sadhasivam
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