From: Drew Fustini <dfustini@tenstorrent.com>
To: Drew Fustini <drew@pdp7.com>, Guo Ren <guoren@kernel.org>,
Fu Wei <wefu@redhat.com>,
Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Thomas Bonnefille <thomas.bonnefille@bootlin.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-riscv@lists.infradead.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Drew Fustini <dfustini@tenstorrent.com>
Subject: [PATCH v2 5/8] riscv: dts: thead: Adjust TH1520 GPIO labels
Date: Sat, 14 Sep 2024 19:40:53 -0700 [thread overview]
Message-ID: <20240914-th1520-pinctrl-v2-5-3ba67dde882c@tenstorrent.com> (raw)
In-Reply-To: <20240914-th1520-pinctrl-v2-0-3ba67dde882c@tenstorrent.com>
From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Adjust labels for the TH1520 GPIO controllers such that GPIOs can be
referenced by the names used by the documentation. Eg.
GPIO0_X -> <&gpio0 X Y>
GPIO1_X -> <&gpio1 X Y>
GPIO2_X -> <&gpio2 X Y>
GPIO3_X -> <&gpio3 X Y>
GPIO4_X -> <&gpio4 X Y>
AOGPIO_X -> <&aogpio X Y>
Remove labels for the parent GPIO devices that shouldn't need to be
referenced.
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
---
arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 2 ++
arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 2 ++
arch/riscv/boot/dts/thead/th1520.dtsi | 24 +++++++++++-----------
3 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
index be85e3aee56e..c48f6fd6387b 100644
--- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
+++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
@@ -17,6 +17,8 @@ aliases {
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ gpio5 = &aogpio;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
index 9a3884a73e13..0ae2c20d5641 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
@@ -14,6 +14,8 @@ aliases {
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ gpio5 = &aogpio;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index f9e339d3472d..497a982554b2 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -327,13 +327,13 @@ uart3: serial@ffe7f04000 {
status = "disabled";
};
- gpio2: gpio@ffe7f34000 {
+ gpio@ffe7f34000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f34000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portc: gpio-controller@0 {
+ gpio2: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -346,13 +346,13 @@ portc: gpio-controller@0 {
};
};
- gpio3: gpio@ffe7f38000 {
+ gpio@ffe7f38000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f38000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portd: gpio-controller@0 {
+ gpio3: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -372,13 +372,13 @@ padctrl1_apsys: pinctrl@ffe7f3c000 {
thead,pad-group = <2>;
};
- gpio0: gpio@ffec005000 {
+ gpio@ffec005000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec005000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- porta: gpio-controller@0 {
+ gpio0: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -391,13 +391,13 @@ porta: gpio-controller@0 {
};
};
- gpio1: gpio@ffec006000 {
+ gpio@ffec006000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec006000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portb: gpio-controller@0 {
+ gpio1: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -535,13 +535,13 @@ timer7: timer@ffffc3303c {
status = "disabled";
};
- ao_gpio0: gpio@fffff41000 {
+ gpio@fffff41000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff41000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- porte: gpio-controller@0 {
+ aogpio: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -561,13 +561,13 @@ padctrl_aosys: pinctrl@fffff4a000 {
clocks = <&aonsys_clk>;
};
- ao_gpio1: gpio@fffff52000 {
+ gpio@fffff52000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff52000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portf: gpio-controller@0 {
+ gpio4: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
--
2.34.1
next prev parent reply other threads:[~2024-09-15 2:43 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-15 2:40 [PATCH v2 0/8] pinctrl: Add T-Head TH1520 SoC pin controllers Drew Fustini
2024-09-15 2:40 ` [PATCH v2 1/8] dt-bindings: pinctrl: Add thead,th1520-pinctrl bindings Drew Fustini
2024-09-18 16:14 ` Rob Herring (Arm)
2024-09-15 2:40 ` [PATCH v2 2/8] pinctrl: Add driver for the T-Head TH1520 SoC Drew Fustini
2024-09-15 2:40 ` [PATCH v2 3/8] riscv: dts: thead: Add TH1520 pin control nodes Drew Fustini
2024-09-15 2:40 ` [PATCH v2 4/8] riscv: dts: thead: Add TH1520 GPIO ranges Drew Fustini
2024-09-15 2:40 ` Drew Fustini [this message]
2024-09-15 2:40 ` [PATCH v2 6/8] riscv: dts: thead: Add Lichee Pi 4M GPIO line names Drew Fustini
2024-09-15 2:40 ` [PATCH v2 7/8] riscv: dts: thead: Add TH1520 pinctrl settings for UART0 Drew Fustini
2024-09-15 2:40 ` [PATCH v2 8/8] riscv: dtb: thead: Add BeagleV Ahead LEDs Drew Fustini
-- strict thread matches above, loose matches on Subject: below --
2024-01-03 13:28 [PATCH v2 0/8] Add T-Head TH1520 SoC pin control Emil Renner Berthing
2024-01-03 13:28 ` [PATCH v2 5/8] riscv: dts: thead: Adjust TH1520 GPIO labels Emil Renner Berthing
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240914-th1520-pinctrl-v2-5-3ba67dde882c@tenstorrent.com \
--to=dfustini@tenstorrent.com \
--cc=aou@eecs.berkeley.edu \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=drew@pdp7.com \
--cc=emil.renner.berthing@canonical.com \
--cc=guoren@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh@kernel.org \
--cc=thomas.bonnefille@bootlin.com \
--cc=wefu@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox