[PATCH 0/3] Google Pixel 6 (oriole): max20339 enabling

[PATCH 0/3] Google Pixel 6 (oriole): max20339 enabling

[André Draszik]

Hi,

These patches enable the Maxim MAX20339 overvoltage protector with load
switches for Google Pixel 6 (Oriole).

The driver and binding have been proposed as part of
https://lore.kernel.org/all/20240916-max20339-v1-0-b04ce8e8c471@linaro.org/

This is the first device behind the USB plug and can gate all incoming
power as well as protecting the input path from overvoltages.

Its load switches are used for wireless charging and for OTG.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
André Draszik (3):
      arm64: defconfig: enable Maxim max20339
      arm64: dts: exynos: gs101-oriole: enable max20339 OVP
      MAINTAINERS: add myself for Google Tensor SoC

 MAINTAINERS                                        |  1 +
 arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 51 ++++++++++++++++++++++
 arch/arm64/configs/defconfig                       |  1 +
 3 files changed, 53 insertions(+)
---
base-commit: 7083504315d64199a329de322fce989e1e10f4f7
change-id: 20240916-max20339-dts-c0518c81bb39

Best regards,
-- 
André Draszik <andre.draszik@linaro.org>

[PATCH 1/3] arm64: defconfig: enable Maxim max20339

[André Draszik]

Enable the Maxim max20339 as this is used by the gs101-oriole (Google
Pixel 6) board.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 5fdbfea7a5b2..c43df2164201 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -778,6 +778,7 @@ CONFIG_REGULATOR_HI655X=y
 CONFIG_REGULATOR_LP873X=m
 CONFIG_REGULATOR_MAX77620=y
 CONFIG_REGULATOR_MAX8973=y
+CONFIG_REGULATOR_MAX20339=m
 CONFIG_REGULATOR_MAX20411=m
 CONFIG_REGULATOR_MP8859=y
 CONFIG_REGULATOR_MT6315=m

-- 
2.46.0.662.g92d0881bb0-goog

Re: [PATCH 1/3] arm64: defconfig: enable Maxim max20339

[Peter Griffin]

On Mon, 16 Sept 2024 at 17:58, André Draszik <andre.draszik@linaro.org> wrote:
>
> Enable the Maxim max20339 as this is used by the gs101-oriole (Google
> Pixel 6) board.
>
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---

Reviewed-by:  Peter Griffin <peter.griffin@linaro.org>

[..]

regards,

Peter

[PATCH 2/3] arm64: dts: exynos: gs101-oriole: enable max20339 OVP

[André Draszik]

Enable the Maxim max20339 OVP with load switches.

This is the first device behind the USB plug and can gate all incoming
power as well as protecting the input path from overvoltages.

Its load switches are used for wireless charging and for OTG.

Regulator and GPIO line names have been chosen to match the schematic.

Note that its interrupt line is connected to a Maxim max77759 and
supplies are connected to a PMIC and to a boost regulator controlled by
that PMIC, none of which we have drivers or DTS entries for at this
stage, so those parts have been left out.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 51 ++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
index 387fb779bd29..a3276aa91091 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
+++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
@@ -68,6 +68,12 @@ ufs_0_fixed_vcc_reg: regulator-1 {
 		regulator-boot-on;
 		enable-active-high;
 	};
+
+	/* This represents Vbus coming from the USB Type-C connector */
+	reg_src_ppvar_usbc_vbus: regulator-src-ppvar-usbc-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "src_ppvar_usbc_vbus";
+	};
 };
 
 &ext_24_5m {
@@ -90,6 +96,51 @@ eeprom: eeprom@50 {
 &hsi2c_12 {
 	status = "okay";
 	/* TODO: add the devices once drivers exist */
+
+	ovp: ovp@35 {
+		compatible = "maxim,max20339";
+		reg = <0x35>;
+		/* TODO: add interrupt once driver for max77759-gpio exists */
+		/* TODO: Update this once PMIC is implemented (PP1800_L2M_ALIVE) */
+		dig-supply = <&reg_placeholder>;
+
+		insw-supply = <&reg_src_ppvar_usbc_vbus>;
+		/* TODO: update this once boost regulator exists */
+		lsw1-supply = <&reg_placeholder>;
+		lsw2-supply = <&reg_placeholder>;
+
+		gpio {
+			gpio-controller;
+			#gpio-cells = <2>;
+			/*
+			 * "Human-readable name [SIGNAL_LABEL]" where the
+			 * latter comes from the schematic
+			 */
+			gpio-line-names = "Vin valid [SRC_PPVAR_USBC_VBUS]";
+		};
+
+		regulators {
+			insw_reg: insw {
+				regulator-name = "PPVAR_VBUS_OVP";
+				regulator-active-discharge = <0>;
+				regulator-min-microvolt = <5850000>;
+				regulator-max-microvolt = <14500000>;
+				regulator-ov-protection-microvolt = <14500000>;
+			};
+			lsw1_reg: lsw1 {
+				regulator-name = "PPVAR_VBUS_OVP_LSW1";
+				regulator-oc-protection-microamp = <1460000>;
+				regulator-ov-protection-microvolt = <1>;
+				shunt-resistor-micro-ohms = <120000000>;
+			};
+			lsw2_reg: lsw2 {
+				regulator-name = "PPVAR_QI_VOUT_TX";
+				regulator-oc-protection-microamp = <1230000>;
+				regulator-ov-protection-microvolt = <1>;
+				shunt-resistor-micro-ohms = <143000000>;
+			};
+		};
+	};
 };
 
 &pinctrl_far_alive {

-- 
2.46.0.662.g92d0881bb0-goog

[PATCH 3/3] MAINTAINERS: add myself for Google Tensor SoC

[André Draszik]

Add myself as maintainer for the Google Tensor SoC alongside Peter.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 2cdd7cacec86..b6edb21b4f2d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9669,6 +9669,7 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux.git
 F:	drivers/firmware/google/
 
 GOOGLE TENSOR SoC SUPPORT
+M:	André Draszik <andre.draszik@linaro.org>
 M:	Peter Griffin <peter.griffin@linaro.org>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 L:	linux-samsung-soc@vger.kernel.org

-- 
2.46.0.662.g92d0881bb0-goog

Re: [PATCH 3/3] MAINTAINERS: add myself for Google Tensor SoC

[Peter Griffin]

Hi André,

On Mon, 16 Sept 2024 at 17:58, André Draszik <andre.draszik@linaro.org> wrote:
>
> Add myself as maintainer for the Google Tensor SoC alongside Peter.
>
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 2cdd7cacec86..b6edb21b4f2d 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -9669,6 +9669,7 @@ T:        git git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux.git
>  F:     drivers/firmware/google/
>
>  GOOGLE TENSOR SoC SUPPORT
> +M:     André Draszik <andre.draszik@linaro.org>

Please update this to: -

+R:     André Draszik <andre.draszik@linaro.org>

The definition of which is

R: Designated *Reviewer*: FullName <address@domain>
These reviewers should be CCed on patches.

regards,

Peter

Re: [PATCH 3/3] MAINTAINERS: add myself for Google Tensor SoC

[Conor Dooley]

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On Mon, Sep 16, 2024 at 08:42:03PM +0100, Peter Griffin wrote:
> Hi André,
> 
> On Mon, 16 Sept 2024 at 17:58, André Draszik <andre.draszik@linaro.org> wrote:
> >
> > Add myself as maintainer for the Google Tensor SoC alongside Peter.
> >
> > Signed-off-by: André Draszik <andre.draszik@linaro.org>
> > ---
> >  MAINTAINERS | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 2cdd7cacec86..b6edb21b4f2d 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -9669,6 +9669,7 @@ T:        git git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux.git
> >  F:     drivers/firmware/google/
> >
> >  GOOGLE TENSOR SoC SUPPORT
> > +M:     André Draszik <andre.draszik@linaro.org>
> 
> Please update this to: -
> 
> +R:     André Draszik <andre.draszik@linaro.org>
> 
> The definition of which is
> 
> R: Designated *Reviewer*: FullName <address@domain>
> These reviewers should be CCed on patches.

I find this email really weird. If you discussed something off-list and
Andre misunderstood that you wanted him as a reviewer not a maintainer,
that's fine - but you need to explain why to the rest of us. If it were
not for the fact you share an employer, I'd find this to be a kinda rude
way of denying someone co-maintainer status.

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Re: [PATCH 3/3] MAINTAINERS: add myself for Google Tensor SoC

[Peter Griffin]

Hi Conor,

On Tue, 17 Sept 2024 at 22:19, Conor Dooley <conor@kernel.org> wrote:
>
> On Mon, Sep 16, 2024 at 08:42:03PM +0100, Peter Griffin wrote:
> > Hi André,
> >
> > On Mon, 16 Sept 2024 at 17:58, André Draszik <andre.draszik@linaro.org> wrote:
> > >
> > > Add myself as maintainer for the Google Tensor SoC alongside Peter.
> > >
> > > Signed-off-by: André Draszik <andre.draszik@linaro.org>
> > > ---
> > >  MAINTAINERS | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> > > diff --git a/MAINTAINERS b/MAINTAINERS
> > > index 2cdd7cacec86..b6edb21b4f2d 100644
> > > --- a/MAINTAINERS
> > > +++ b/MAINTAINERS
> > > @@ -9669,6 +9669,7 @@ T:        git git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux.git
> > >  F:     drivers/firmware/google/
> > >
> > >  GOOGLE TENSOR SoC SUPPORT
> > > +M:     André Draszik <andre.draszik@linaro.org>
> >
> > Please update this to: -
> >
> > +R:     André Draszik <andre.draszik@linaro.org>
> >
> > The definition of which is
> >
> > R: Designated *Reviewer*: FullName <address@domain>
> > These reviewers should be CCed on patches.
>
> I find this email really weird. If you discussed something off-list and
> Andre misunderstood that you wanted him as a reviewer not a maintainer,
> that's fine - but you need to explain why to the rest of us.

Apologies for the brevity, it wasn't my intention for it to come
across as weird.

We have a small handful of files here currently, so I don't think it
requires a team of maintainers, it's not particularly high volume.
Having said that, Andre, Tudor and myself usually CC each other on our
patches for gs101 and Pixel 6 so it makes sense for the tooling to
include them as reviewers on patches that may only come to me
otherwise. Other ICs like Maxim 20339 on the board have their own
dedicated MAINTAINERS entry.

Peter.