From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-sh.amlogic.com (unknown [58.32.228.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E17BB482EF; Wed, 18 Sep 2024 07:57:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=58.32.228.46 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726646267; cv=none; b=tnZQTZhAsFN6Yvs8OFr4m9lMYY3zm/aMqcJZomdeKKY6zEc1bLLWOXg8E/a5xv4TlNG4WOQh2R5wtzbfCmEa8W3S5is/BegyTCbJiVgTQ18P7VnzTaaW00KssNhyVJcBbXXOuX8l/BP8ilQOmoqYV/ALOr2MGBWWZd1LwomJA3A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726646267; c=relaxed/simple; bh=9VjzPSmxTbRR9nN742Qok+POFXljNbPly0HWhmf3Tp0=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=J4QxGCi4fgM1+QAw7dCD0pK86qNHl7jhrzXsvUluVFnMG2rU2OeAGSmpCHpXwb+xP2oElG2n8aLc1oYxxoBeIAgb7Vbs+0pDkGJwtlCNKP5Vc9elnyJ5A/zq3uZnL55fEynQ/Fl6d7ByM3do+/TX+iEvi/e/2s/ld6XoWiQJuA8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amlogic.com; spf=pass smtp.mailfrom=amlogic.com; arc=none smtp.client-ip=58.32.228.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amlogic.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amlogic.com Received: from droid10-sz.amlogic.com (10.28.11.69) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.39; Wed, 18 Sep 2024 15:42:17 +0800 From: zelong dong To: Neil Armstrong , Philipp Zabel , Kevin Hilman , Rob Herring , Martin Blumenstingl , Jerome Brunet , Krzysztof Kozlowski CC: , , , , , Zelong Dong Subject: [PATCH v3 0/3] reset: amlogic-a4/a5: add reset driver Date: Wed, 18 Sep 2024 15:42:08 +0800 Message-ID: <20240918074211.8067-1-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.35.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Zelong Dong This patchset adds Reset controller driver support for Amlogic A4/A5 SoC. The RESET registers count and offset for A4/A5 Soc are same as S4 Soc. Changes since v2: - rebase on 'amlogic,t7-reset' patchset Changes since v1: - remove 'amlogic,t7-reset' - move 'amlogic,c3-reset' to the other enum list - move reset node from amlogic-a4-common.dtsi to amlogic-a4.dtsi/amlogic-a5.dtsi --- v1:https://lore.kernel.org/all/20240703061610.37217-1-zelong.dong@amlogic.com/ v2:https://lore.kernel.org/all/20240715051217.5286-1-zelong.dong@amlogic.com/ Zelong Dong (3): dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller arm64: dts: amlogic: Add Amlogic A4 reset controller arm64: dts: amlogic: Add Amlogic A5 reset controller .../bindings/reset/amlogic,meson-reset.yaml | 23 +++-- .../arm64/boot/dts/amlogic/amlogic-a4-reset.h | 93 ++++++++++++++++++ arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 10 ++ .../arm64/boot/dts/amlogic/amlogic-a5-reset.h | 95 +++++++++++++++++++ arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 10 ++ 5 files changed, 223 insertions(+), 8 deletions(-) create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h -- 2.35.1