From: Macpaul Lin <macpaul.lin@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Yong Wu <yong.wu@mediatek.com>, "Joerg Roedel" <joro@8bytes.org>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
CK Hu <ck.hu@mediatek.com>, Jitao shi <jitao.shi@mediatek.com>,
Tinghan Shen <tinghan.shen@mediatek.com>,
Seiya Wang <seiya.wang@mediatek.com>,
Ben Lok <ben.lok@mediatek.com>,
Macpaul Lin <macpaul.lin@mediatek.com>,
"Nancy . Lin" <nancy.lin@mediatek.com>,
<dri-devel@lists.freedesktop.org>,
<linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<iommu@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>,
Alexandre Mergnat <amergnat@baylibre.com>
Cc: Bear Wang <bear.wang@mediatek.com>,
Pablo Sun <pablo.sun@mediatek.com>,
Macpaul Lin <macpaul@gmail.com>, Sen Chu <sen.chu@mediatek.com>,
"Chris-qj chen" <chris-qj.chen@mediatek.com>,
MediaTek Chromebook Upstream
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Chen-Yu Tsai <wenst@chromium.org>
Subject: [PATCH v2 2/5] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs
Date: Thu, 26 Sep 2024 19:14:46 +0800 [thread overview]
Message-ID: <20240926111449.9245-2-macpaul.lin@mediatek.com> (raw)
In-Reply-To: <20240926111449.9245-1-macpaul.lin@mediatek.com>
The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
to an excessively long 'interrupts' property. The error message was:
infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0],
[0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]]
is too long
To address this issue, add "minItems: 1" and "maxItems: 5" constraints to
the 'interrupts' property in the DT binding schema. This change allows for
flexibility in the number of interrupts for new SoCs.
The purpose of these 5 interrupts is also added.
Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
.../bindings/iommu/mediatek,iommu.yaml | 25 ++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
Changes for v2:
- commit message: re-formatting and add a description of adding 5 interrupts.
- add 'description' and 'maxItems: 5' for 'interrupt' property of
'mt8195-iommu-infra'
- others keeps 'maxItems: 1'
diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
index ea6b0f5f24de..fdd2996d2a31 100644
--- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
@@ -96,7 +96,8 @@ properties:
maxItems: 1
interrupts:
- maxItems: 1
+ minItems: 1
+ maxItems: 5
clocks:
items:
@@ -210,6 +211,28 @@ allOf:
required:
- mediatek,larbs
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt8195-iommu-infra
+
+ then:
+ properties:
+ interrupts:
+ description: |
+ The IOMMU of MT8195 has 5 banks: 0/1/2/3/4.
+ Each bank has a set of APB registers corresponding to the
+ normal world, protected world 1/2/3, and secure world, respectively.
+ Therefore, 5 interrupt numbers are needed.
+ maxItems: 5
+
+ else:
+ properties:
+ interrupts:
+ maxItems: 1
+
additionalProperties: false
examples:
--
2.45.2
next prev parent reply other threads:[~2024-09-26 11:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-26 11:14 [PATCH v2 1/5] arm64: dts: mt8195: Fix dtbs_check error for infracfg_ao node Macpaul Lin
2024-09-26 11:14 ` Macpaul Lin [this message]
2024-09-26 16:02 ` [PATCH v2 2/5] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs Conor Dooley
2024-09-30 8:49 ` AngeloGioacchino Del Regno
2024-10-02 5:01 ` Macpaul Lin
2024-10-02 10:12 ` AngeloGioacchino Del Regno
2024-09-26 11:14 ` [PATCH v2 3/5] arm64: dts: mediatek: mt8395-genio-1200-evk: Fix dtbs_check error for phy Macpaul Lin
2024-09-26 11:14 ` [PATCH v2 4/5] arm64: dts: mt8195: Fix dtbs_check error for mutex node Macpaul Lin
2024-09-26 11:14 ` [PATCH v2 5/5] dt-bindings: display: mediatek: dpi: Add mt8195 support in power domains Macpaul Lin
2024-09-26 15:59 ` Conor Dooley
2024-09-27 7:02 ` Macpaul Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240926111449.9245-2-macpaul.lin@mediatek.com \
--to=macpaul.lin@mediatek.com \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=airlied@gmail.com \
--cc=amergnat@baylibre.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=bear.wang@mediatek.com \
--cc=ben.lok@mediatek.com \
--cc=chris-qj.chen@mediatek.com \
--cc=chunkuang.hu@kernel.org \
--cc=ck.hu@mediatek.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=iommu@lists.linux.dev \
--cc=jitao.shi@mediatek.com \
--cc=joro@8bytes.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=maarten.lankhorst@linux.intel.com \
--cc=macpaul@gmail.com \
--cc=matthias.bgg@gmail.com \
--cc=mripard@kernel.org \
--cc=nancy.lin@mediatek.com \
--cc=p.zabel@pengutronix.de \
--cc=pablo.sun@mediatek.com \
--cc=robh@kernel.org \
--cc=robin.murphy@arm.com \
--cc=seiya.wang@mediatek.com \
--cc=sen.chu@mediatek.com \
--cc=simona@ffwll.ch \
--cc=tinghan.shen@mediatek.com \
--cc=tzimmermann@suse.de \
--cc=wenst@chromium.org \
--cc=will@kernel.org \
--cc=yong.wu@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).