[PATCH v2 1/5] arm64: dts: mt8195: Fix dtbs_check error for infracfg_ao node

[PATCH v2 1/5] arm64: dts: mt8195: Fix dtbs_check error for infracfg_ao node

[Macpaul Lin]

The infracfg_ao node in mt8195.dtsi was causing a dtbs_check error.
The error message was:

syscon@10001000: compatible: ['mediatek,mt8195-infracfg_ao', 'syscon',
                 'simple-mfd'] is too long

To resolve this, remove 'simple-mfd' from the 'compatible' property of the
infracfg_ao node.

Fixes: 37f2582883be ("arm64: dts: Add mediatek SoC mt8195 and evaluation board")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Changes for v2:
 - no change.

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index e89ba384c4aa..2e1b41359b43 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -487,7 +487,7 @@ topckgen: syscon@10000000 {
 		};
 
 		infracfg_ao: syscon@10001000 {
-			compatible = "mediatek,mt8195-infracfg_ao", "syscon", "simple-mfd";
+			compatible = "mediatek,mt8195-infracfg_ao", "syscon";
 			reg = <0 0x10001000 0 0x1000>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;
-- 
2.45.2

[PATCH v2 2/5] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs

[Macpaul Lin]

The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
to an excessively long 'interrupts' property. The error message was:

  infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0],
                     [0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]]
                     is too long

To address this issue, add "minItems: 1" and "maxItems: 5" constraints to
the 'interrupts' property in the DT binding schema. This change allows for
flexibility in the number of interrupts for new SoCs.
The purpose of these 5 interrupts is also added.

Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
 .../bindings/iommu/mediatek,iommu.yaml        | 25 ++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

Changes for v2:
 - commit message: re-formatting and add a description of adding 5 interrupts.
 - add 'description' and 'maxItems: 5' for 'interrupt' property of
   'mt8195-iommu-infra'
 - others keeps 'maxItems: 1'

diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
index ea6b0f5f24de..fdd2996d2a31 100644
--- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
@@ -96,7 +96,8 @@ properties:
     maxItems: 1
 
   interrupts:
-    maxItems: 1
+    minItems: 1
+    maxItems: 5
 
   clocks:
     items:
@@ -210,6 +211,28 @@ allOf:
       required:
         - mediatek,larbs
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - mediatek,mt8195-iommu-infra
+
+    then:
+      properties:
+        interrupts:
+          description: |
+            The IOMMU of MT8195 has 5 banks: 0/1/2/3/4.
+            Each bank has a set of APB registers corresponding to the
+            normal world, protected world 1/2/3, and secure world, respectively.
+            Therefore, 5 interrupt numbers are needed.
+          maxItems: 5
+
+    else:
+      properties:
+        interrupts:
+          maxItems: 1
+
 additionalProperties: false
 
 examples:
-- 
2.45.2

[PATCH v2 3/5] arm64: dts: mediatek: mt8395-genio-1200-evk: Fix dtbs_check error for phy

[Macpaul Lin]

The ethernet-phy node in mt8395-genio-1200-evk.dts was triggering a
dtbs_check error. The error message was:
  eth-phy0@1: $nodename:0: 'eth-phy0@1' does not match
              '^ethernet-phy(@[a-f0-9]+)?$'
Fix this issue by replacing 'eth-phy' node to generic 'ethernet-phy'.

Fixes: f2b543a191b6 ("arm64: dts: mediatek: add device-tree for Genio 1200 EVK board")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Changes for v2:
 - No change.

diff --git a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts
index 1ef6262b65c9..b4b48eb93f3c 100644
--- a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts
@@ -187,7 +187,7 @@ mdio {
 		compatible = "snps,dwmac-mdio";
 		#address-cells = <1>;
 		#size-cells = <0>;
-		eth_phy0: eth-phy0@1 {
+		eth_phy0: ethernet-phy@1 {
 			compatible = "ethernet-phy-id001c.c916";
 			reg = <0x1>;
 		};
-- 
2.45.2

[PATCH v2 4/5] arm64: dts: mt8195: Fix dtbs_check error for mutex node

[Macpaul Lin]

The mutex node in mt8195.dtsi was triggering a dtbs_check error:
  mutex@1c101000: 'clock-names', 'reg-names' do not match any of the
                  regexes: 'pinctrl-[0-9]+'

This seems no need by inspecting the DT schemas and other reference boards,
so drop 'clock-names' and 'reg-names' in mt8195.dtsi.

Fixes: 92d2c23dc269 ("arm64: dts: mt8195: add display node for vdosys1")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 --
 1 file changed, 2 deletions(-)

Changes for v2:
 - No change.

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 2e1b41359b43..ade685ed2190 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -3331,11 +3331,9 @@ &larb19 &larb21 &larb24 &larb25
 		mutex1: mutex@1c101000 {
 			compatible = "mediatek,mt8195-disp-mutex";
 			reg = <0 0x1c101000 0 0x1000>;
-			reg-names = "vdo1_mutex";
 			interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
 			power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
 			clocks = <&vdosys1 CLK_VDO1_DISP_MUTEX>;
-			clock-names = "vdo1_mutex";
 			mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
 			mediatek,gce-events = <CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0>;
 		};
-- 
2.45.2

[PATCH v2 5/5] dt-bindings: display: mediatek: dpi: Add mt8195 support in power domains

[Macpaul Lin]

Add power domain binding to the mediatek DPI controller for MT8185.

The dpi node in mt8195.dtsi was triggering a dtbs_check error:
  dp-intf@1c113000: power-domains: False schema does not allow [[44, 18]]

Fixes: 5474d49b2f79 ("dt-bindings: display: mediatek: dpi: Add power domains")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
 .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml       | 1 +
 1 file changed, 1 insertion(+)

Changes for v2:
 - Because of the corresponding dts fix has been reviewed with a Reviewed-by: tag.
   [1] https://lore.kernel.org/all/20240925080515.16377-1-macpaul.lin@mediatek.com/
   We still need this change to fix the 2 dtbs_check errors.
   So keeps no change here.

diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml
index 3a82aec9021c..07acc8a76bfc 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml
@@ -89,6 +89,7 @@ allOf:
                 - mediatek,mt6795-dpi
                 - mediatek,mt8173-dpi
                 - mediatek,mt8186-dpi
+                - mediatek,mt8195-dp-intf
     then:
       properties:
         power-domains: false
-- 
2.45.2

Re: [PATCH v2 5/5] dt-bindings: display: mediatek: dpi: Add mt8195 support in power domains

[Conor Dooley]

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On Thu, Sep 26, 2024 at 07:14:49PM +0800, Macpaul Lin wrote:
> Add power domain binding to the mediatek DPI controller for MT8185.

This wording is confusing, no binding is being added here, you're just
allowing one property.

> The dpi node in mt8195.dtsi was triggering a dtbs_check error:
>   dp-intf@1c113000: power-domains: False schema does not allow [[44, 18]]

And while it is good to have the warning, it would be better to explain
here that there are actually power domains, since the dts could be wrong
here also.

Otherwise,
Acked-by: Conor Dooley <conor.dooley@microchip.com>

> Fixes: 5474d49b2f79 ("dt-bindings: display: mediatek: dpi: Add power domains")
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> ---
>  .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml       | 1 +
>  1 file changed, 1 insertion(+)
> 
> Changes for v2:
>  - Because of the corresponding dts fix has been reviewed with a Reviewed-by: tag.
>    [1] https://lore.kernel.org/all/20240925080515.16377-1-macpaul.lin@mediatek.com/
>    We still need this change to fix the 2 dtbs_check errors.
>    So keeps no change here.
> 
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml
> index 3a82aec9021c..07acc8a76bfc 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml
> @@ -89,6 +89,7 @@ allOf:
>                  - mediatek,mt6795-dpi
>                  - mediatek,mt8173-dpi
>                  - mediatek,mt8186-dpi
> +                - mediatek,mt8195-dp-intf
>      then:
>        properties:
>          power-domains: false
> -- 
> 2.45.2
> 

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Re: [PATCH v2 2/5] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs

[Conor Dooley]

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On Thu, Sep 26, 2024 at 07:14:46PM +0800, Macpaul Lin wrote:
> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
> to an excessively long 'interrupts' property. The error message was:
> 
>   infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0],
>                      [0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]]
>                      is too long
> 
> To address this issue, add "minItems: 1" and "maxItems: 5" constraints to
> the 'interrupts' property in the DT binding schema. This change allows for
> flexibility in the number of interrupts for new SoCs.
> The purpose of these 5 interrupts is also added.
> 
> Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema")
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        | 25 ++++++++++++++++++-
>  1 file changed, 24 insertions(+), 1 deletion(-)
> 
> Changes for v2:
>  - commit message: re-formatting and add a description of adding 5 interrupts.
>  - add 'description' and 'maxItems: 5' for 'interrupt' property of
>    'mt8195-iommu-infra'
>  - others keeps 'maxItems: 1'
> 
> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> index ea6b0f5f24de..fdd2996d2a31 100644
> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> @@ -96,7 +96,8 @@ properties:
>      maxItems: 1
>  
>    interrupts:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 5
>  
>    clocks:
>      items:
> @@ -210,6 +211,28 @@ allOf:
>        required:
>          - mediatek,larbs
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - mediatek,mt8195-iommu-infra
> +
> +    then:
> +      properties:
> +        interrupts:
> +          description: |
> +            The IOMMU of MT8195 has 5 banks: 0/1/2/3/4.
> +            Each bank has a set of APB registers corresponding to the
> +            normal world, protected world 1/2/3, and secure world, respectively.
> +            Therefore, 5 interrupt numbers are needed.

> +          maxItems: 5

You repeat here the constraint from the original definition. Should this
be minitems: 5?

> +
> +    else:
> +      properties:
> +        interrupts:
> +          maxItems: 1
> +
>  additionalProperties: false
>  
>  examples:
> -- 
> 2.45.2
> 

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Re: [PATCH v2 5/5] dt-bindings: display: mediatek: dpi: Add mt8195 support in power domains

[Macpaul Lin]

On 9/26/24 23:59, Conor Dooley wrote:
> On Thu, Sep 26, 2024 at 07:14:49PM +0800, Macpaul Lin wrote:
>> Add power domain binding to the mediatek DPI controller for MT8185.
> 
> This wording is confusing, no binding is being added here, you're just
> allowing one property.
> 
>> The dpi node in mt8195.dtsi was triggering a dtbs_check error:
>>    dp-intf@1c113000: power-domains: False schema does not allow [[44, 18]]
> 
> And while it is good to have the warning, it would be better to explain
> here that there are actually power domains, since the dts could be wrong
> here also.

Thanks for the reminder! After MediaTek's internal discussion, a new
patch v3 has been submitted. The details has been written in that patch.

> Otherwise,
> Acked-by: Conor Dooley <conor.dooley@microchip.com>

Since the new patch v3 use a different approach to update the DT Schema,
the "Acked-by:" tag has been dropped, please help to review the 
replacement v3 patch. Thanks!

>> Fixes: 5474d49b2f79 ("dt-bindings: display: mediatek: dpi: Add power domains")
>> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
>> ---
>>   .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml       | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> Changes for v2:
>>   - Because of the corresponding dts fix has been reviewed with a Reviewed-by: tag.
>>     [1] https://lore.kernel.org/all/20240925080515.16377-1-macpaul.lin@mediatek.com/
>>     We still need this change to fix the 2 dtbs_check errors.
>>     So keeps no change here.
>>

Best regards,
Macpaul Lin

Re: [PATCH v2 2/5] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs

[AngeloGioacchino Del Regno]

Il 26/09/24 13:14, Macpaul Lin ha scritto:
> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
> to an excessively long 'interrupts' property. The error message was:
> 
>    infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0],
>                       [0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]]
>                       is too long
> 
> To address this issue, add "minItems: 1" and "maxItems: 5" constraints to
> the 'interrupts' property in the DT binding schema. This change allows for
> flexibility in the number of interrupts for new SoCs.
> The purpose of these 5 interrupts is also added.
> 
> Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema")
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> ---
>   .../bindings/iommu/mediatek,iommu.yaml        | 25 ++++++++++++++++++-
>   1 file changed, 24 insertions(+), 1 deletion(-)
> 
> Changes for v2:
>   - commit message: re-formatting and add a description of adding 5 interrupts.
>   - add 'description' and 'maxItems: 5' for 'interrupt' property of
>     'mt8195-iommu-infra'
>   - others keeps 'maxItems: 1'
> 
> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> index ea6b0f5f24de..fdd2996d2a31 100644
> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> @@ -96,7 +96,8 @@ properties:
>       maxItems: 1
>   
>     interrupts:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 5
>   
>     clocks:
>       items:
> @@ -210,6 +211,28 @@ allOf:
>         required:
>           - mediatek,larbs
>   
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - mediatek,mt8195-iommu-infra
> +
> +    then:
> +      properties:
> +        interrupts:
> +          description: |

Do you really need to keep the formatting?

If you rephrase that as:

The infra IOMMU in MT8195 has five banks: each features one set
of APB registers for the normal world (set 0), one for the protected
world (sets 1-3) and one for the secure world (set 4), and each set
has its own interrupt. Therefore, five interrupts are needed.

...you won't need the bar :-)

> +            The IOMMU of MT8195 has 5 banks: 0/1/2/3/4.
> +            Each bank has a set of APB registers corresponding to the
> +            normal world, protected world 1/2/3, and secure world, respectively.
> +            Therefore, 5 interrupt numbers are needed.
> +          maxItems: 5

minItems: 5

Cheers,
Angelo

Re: [PATCH v2 2/5] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs

[Macpaul Lin]

On 9/30/24 16:49, AngeloGioacchino Del Regno wrote:
> Il 26/09/24 13:14, Macpaul Lin ha scritto:
>> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
>> to an excessively long 'interrupts' property. The error message was:
>>

[snip]

>>
>> diff --git 
>> a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml 
>> b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>> index ea6b0f5f24de..fdd2996d2a31 100644
>> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>> @@ -96,7 +96,8 @@ properties:
>>       maxItems: 1
>>     interrupts:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 5
>>     clocks:
>>       items:
>> @@ -210,6 +211,28 @@ allOf:
>>         required:
>>           - mediatek,larbs
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - mediatek,mt8195-iommu-infra
>> +
>> +    then:
>> +      properties:
>> +        interrupts:
>> +          description: |
> 
> Do you really need to keep the formatting?
> 
> If you rephrase that as:
> 
> The infra IOMMU in MT8195 has five banks: each features one set
> of APB registers for the normal world (set 0), one

Shouldn't we use a 'three' here?
Three APB register sets for the protected world 1, protected world 2,
and protected world 3.

> for the protected
> world (sets 1-3) and one for the secure world (set 4), and each set
> has its own interrupt. Therefore, five interrupts are needed.
> 
> ...you won't need the bar :-)

Thanks for the suggestion. The description has been moved to
top common property in v3, and v4,
hence the bar is still required to explain the
others SOCs. I'll try to rephrase the description for MT8195 also.

>> +            The IOMMU of MT8195 has 5 banks: 0/1/2/3/4.
>> +            Each bank has a set of APB registers corresponding to the
>> +            normal world, protected world 1/2/3, and secure world, 
>> respectively.
>> +            Therefore, 5 interrupt numbers are needed.
>> +          maxItems: 5
> 
> minItems: 5
> 
> Cheers,
> Angelo
> 
> 

Thanks
Macpaul Lin

Re: [PATCH v2 2/5] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs

[AngeloGioacchino Del Regno]

Il 02/10/24 07:01, Macpaul Lin ha scritto:
> 
> 
> On 9/30/24 16:49, AngeloGioacchino Del Regno wrote:
>> Il 26/09/24 13:14, Macpaul Lin ha scritto:
>>> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
>>> to an excessively long 'interrupts' property. The error message was:
>>>
> 
> [snip]
> 
>>>
>>> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml 
>>> b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>>> index ea6b0f5f24de..fdd2996d2a31 100644
>>> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>>> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>>> @@ -96,7 +96,8 @@ properties:
>>>       maxItems: 1
>>>     interrupts:
>>> -    maxItems: 1
>>> +    minItems: 1
>>> +    maxItems: 5
>>>     clocks:
>>>       items:
>>> @@ -210,6 +211,28 @@ allOf:
>>>         required:
>>>           - mediatek,larbs
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            enum:
>>> +              - mediatek,mt8195-iommu-infra
>>> +
>>> +    then:
>>> +      properties:
>>> +        interrupts:
>>> +          description: |
>>
>> Do you really need to keep the formatting?
>>
>> If you rephrase that as:
>>
>> The infra IOMMU in MT8195 has five banks: each features one set
>> of APB registers for the normal world (set 0), one
> 
> Shouldn't we use a 'three' here?

Oops, yes, that's three. I wrote 'one' but described three. Heh!

> Three APB register sets for the protected world 1, protected world 2,
> and protected world 3.

three APB register sets for the protected world (sets 1/2/3) -- or
three APB register sets for the protected world (sets 1-3)

I mean, repeating "protected world X" three times is too much I think :-)

> 
>> for the protected
>> world (sets 1-3) and one for the secure world (set 4), and each set
>> has its own interrupt. Therefore, five interrupts are needed.
>>
>> ...you won't need the bar :-)
> 
> Thanks for the suggestion. The description has been moved to
> top common property in v3, and v4,
> hence the bar is still required to explain the
> others SOCs. I'll try to rephrase the description for MT8195 also.

Sure. You're welcome!

> 
>>> +            The IOMMU of MT8195 has 5 banks: 0/1/2/3/4.
>>> +            Each bank has a set of APB registers corresponding to the
>>> +            normal world, protected world 1/2/3, and secure world, respectively.
>>> +            Therefore, 5 interrupt numbers are needed.
>>> +          maxItems: 5
>>
>> minItems: 5
>>
>> Cheers,
>> Angelo
>>
>>
> 
> Thanks
> Macpaul Lin