From: Nishanth Menon <nm@ti.com>
To: Dhruva Gole <d-gole@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pm@vger.kernel.org>, Andrew Davis <afd@ti.com>,
Bryan Brattlof <bb@ti.com>, Vishal Mahaveer <vishalm@ti.com>,
Kevin Hilman <khilman@baylibre.com>,
Markus Schneider-Pargmann <msp@baylibre.com>
Subject: Re: [PATCH v7 6/6] cpufreq: ti-cpufreq: Update efuse/rev offsets in AM62 family
Date: Fri, 27 Sep 2024 08:27:11 -0500 [thread overview]
Message-ID: <20240927132711.mfxv4nitr5ygx4tf@throat> (raw)
In-Reply-To: <20240926-ti-cpufreq-fixes-v5-v7-6-3c94c398fe8f@ti.com>
On 14:04-20240926, Dhruva Gole wrote:
[...]
> + /*
> + * This checks for old AM625 Devicetrees where the syscon was a phandle to the
> + * wkup_conf parent, this required a hard-coded offset to the efuse register.
> + * This node had the compatibles "syscon", "simple-mfd".
> + */
> + if (of_device_is_compatible(np, "simple-mfd") &&
> + of_machine_is_compatible("ti,am625")) {
> + dev_warn(dev,
> + "%s: An old devicetree is in use, please consider updating at some point!",
> + __func__);
No need to print.. just handle it seamlessly.
> + ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset + 0x0018,
> + &efuse);
> + } else {
> + ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
> + &efuse);
> + }
> if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
> /* not a syscon register! */
> void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +
All these hanky panky is because sycon does not report access fails when
syscon reg size is 1 word.
https://lore.kernel.org/linux-arm-kernel/20240903184710.1552067-1-nm@ti.com/
fixes that. With that applied, instead of using explicit property of the
syscon - which could change simple-mfd or simple-bus or what ever.. Let
us use the quirk for backward compatibility (introduced for similar
messy old code), consider the following (macro probably needs a better
naming):
diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index ba621ce1cdda..f0d76fc02ff2 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -93,6 +93,8 @@ struct ti_cpufreq_soc_data {
bool multi_regulator;
/* Backward compatibility hack: Might have missing syscon */
#define TI_QUIRK_SYSCON_MAY_BE_MISSING 0x1
+/* Backward compatibility hack: new syscon size is 1 register wide */
+#define TI_QUIRK_SYSCON_NEW_SINGLE_REG 0x2
u8 quirks;
};
@@ -318,6 +320,7 @@ static struct ti_cpufreq_soc_data am625_soc_data = {
.efuse_shift = 0x6,
.rev_offset = 0x0014,
.multi_regulator = false,
+ .quirks = TI_QUIRK_SYSCON_NEW_SINGLE_REG,
};
static struct ti_cpufreq_soc_data am62a7_soc_data = {
@@ -354,6 +357,10 @@ static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
&efuse);
+
+ if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_NEW_SINGLE_REG && ret == -EIO)
+ ret = regmap_read(opp_data->syscon, 0x0, &efuse);
+
if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
/* not a syscon register! */
void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
next prev parent reply other threads:[~2024-09-27 13:27 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-26 8:34 [PATCH v7 0/6] ti: k3-am62{a,p}x-sk: add opp frequencies Dhruva Gole
2024-09-26 8:34 ` [PATCH v7 1/6] arm64: dts: ti: k3-am62a: " Dhruva Gole
2024-09-26 8:34 ` [PATCH v7 2/6] arm64: dts: ti: k3-am62a7-sk: add 1.4ghz opp entry Dhruva Gole
2024-09-26 8:34 ` [PATCH v7 3/6] arm64: dts: ti: k3-am62p: add opp frequencies Dhruva Gole
2024-09-26 8:34 ` [PATCH v7 4/6] arm64: dts: ti: k3-am62p5-sk: add 1.4ghz opp entry Dhruva Gole
2024-09-26 8:34 ` [PATCH v7 5/6] arm64: dts: ti: k3-am62: use opp_efuse_table for opp-table syscon Dhruva Gole
2024-09-26 8:34 ` [PATCH v7 6/6] cpufreq: ti-cpufreq: Update efuse/rev offsets in AM62 family Dhruva Gole
2024-09-27 13:27 ` Nishanth Menon [this message]
2024-09-27 13:40 ` [PATCH v7 0/6] ti: k3-am62{a,p}x-sk: add opp frequencies Nishanth Menon
2024-09-30 5:05 ` Dhruva Gole
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