From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E8BD18FC99; Mon, 30 Sep 2024 09:56:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727690163; cv=none; b=ouNOU7CAtptvH5O0oIVrqbrCK8oF9YUuCySwsN6V0Ek+SlauQoHVqb27ViAZVsyo83StvZXYOcUwpi5KdQgSmd3hwCGJONwdYcpJvnl5XNzI0I7xWkq9QLVRfrAOyPfLugaRjstUxAjgwouhPApOZGXJFkZAUnOjYWJjs7WZGGE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727690163; c=relaxed/simple; bh=VSJkJisGpUSWmMdsupkzWkWby0fbo8re3a+wTWfIqrI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aLmVtcdO2w2gV3nVvOexNSNPRS2y7/LdisM1LYsPvV+m16YEV3YnFgXlg9Yeih4Vxj+XZYo4p1nyQCwgULqizMEWc/inRlieBcy45sPArb7NT2zIGz9Li8PlBFWOc55mLaLf0Q5xdV1qF9GLmdeJZioXcwdkXWUnyhlHOhjDucI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=tQikSCfQ; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="tQikSCfQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1727690162; x=1759226162; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VSJkJisGpUSWmMdsupkzWkWby0fbo8re3a+wTWfIqrI=; b=tQikSCfQs8zJec0r3aniVuxfUX75FcOW7Zk5bIkB0N49gEdS12QO9TRp rG8buIBvuzoj4NnUxZAWRD4birOy4UMeH8A/UOSGh/1suvnp/2g5nogLT pL9TK1Kv6QJeuYF4QhQ3LPpW1v7RMjagwhQt4xDf6O2SB4v3O3gczuAsG iZOgLvmn4wXNPJnO2oEA/WVEsiz8cytYnVyjBAZ4uascm5IDzeMzBXrYm dbM0xOdMHKw1L7dxg6qE9S91plmUU8SEkIcB92j7YCNWvcUZ/StUL7NDM f53oCayOD7zYYl5jymS/Jy8GBPh6JBuSzvd+vlAsUTy2LqkanLkaux+mc w==; X-CSE-ConnectionGUID: jBRUFo6rTUOCd1OoCerG2A== X-CSE-MsgGUID: lHowsV3YQjeRyNJ11Wm7CA== X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="32997924" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Sep 2024 02:55:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:47 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:45 -0700 From: To: , Daniel Lezcano , Thomas Gleixner , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Paul Walmsley , Samuel Holland , Palmer Dabbelt , Anup Patel CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 17/20] dt-bindings: timer: sifive,clint: add PIC64GX compatibility Date: Mon, 30 Sep 2024 10:54:46 +0100 Message-ID: <20240930095449.1813195-18-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Pierre-Henry Moussay As mention in sifive,clint.yaml, a specific compatible should be used for PIC64GX, so here it is. Signed-off-by: Pierre-Henry Moussay --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index b42d43d2de48..60f03c5ed073 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -30,6 +30,7 @@ properties: - items: - enum: - canaan,k210-clint # Canaan Kendryte K210 + - microchip,pic64gx-clint # Microchip PIC64GX - sifive,fu540-c000-clint # SiFive FU540 - starfive,jh7100-clint # StarFive JH7100 - starfive,jh7110-clint # StarFive JH7110 -- 2.30.2