From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9CAE18E030; Mon, 30 Sep 2024 09:55:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727690150; cv=none; b=Rr44tt5PyMiA5Y5oIzq87Tp3u+PkgjXD9ANXTKOd5vjNjGU0VJFJ6kgf5TvXhVRRRT9KVUgsS7ZfYCEM4Eowz5i1dFZOrzMChrWlFg3ozGIUCayf1OuVKVKMxU7HX0oCsIDjWNHKePG+XguhK42AeicWVMZPEHxJhGc3lp9XjD0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727690150; c=relaxed/simple; bh=5mAwCf2KTKF0dMxMdnGfGIOhZlS6zJvgYeAcb0167ak=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XXSmvYcvjAO74qpYdRDTbEPNW6U8onZhnVUF26mFyJmQuhkCg/d8WTSXJNBnn1HIb/qqMBWDMaqx33hgFuuJMgmGAmtDU0wShtbbhBeFQVfOKIKXkSTjWnJYvBMmrmE/Eckd1YM0CIKBsX8e3egL+A7CivESbX3f5LNxCMvz8qc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=RjrDIKZT; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="RjrDIKZT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1727690149; x=1759226149; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5mAwCf2KTKF0dMxMdnGfGIOhZlS6zJvgYeAcb0167ak=; b=RjrDIKZT7pdlM1pZPxASEdWBp1qvpdT/DTohaUYnJDXJrZaNUGGLSLAl 6DVg6XVAGM4rfvw1o/oXWhgRpWwxs4C5udDaBz2j7PgscMhazogxkswNn hWX+vSswjUuOHdy2yveoIjbRTbhfJnqF8vKXM2c35RA/6OBdyigr+/EEM 9xyCP0En2dmp9r09UOx+bh+XhA7rcc0LFMPVuMP29eM+j8Ud3ccO8AYbp U5CH7ewqo6jy56WD79LmktxOEt6DmrLLmvyrhI6iTMzyv317CBG2bbcCC RHbtF9BDPY/YcEjvzK7Vj3zvhyw1b59o2Vcwg+DkJ0mpEEJ10NIz+F1Vw Q==; X-CSE-ConnectionGUID: VDfGPtv3TTmpuSmsWgS4Xg== X-CSE-MsgGUID: 38NTJN5vRem4MgjenJ7E/g== X-IronPort-AV: E=Sophos;i="6.11,165,1725346800"; d="scan'208";a="263420165" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Sep 2024 02:55:40 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:16 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:14 -0700 From: To: , Conor Dooley , Daire McNamara , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski CC: Pierre-Henry Moussay , , , , Subject: [linux][PATCH v2 07/20] dt-bindings: clock: mpfs-ccc: Add PIC64GX compatibility Date: Mon, 30 Sep 2024 10:54:36 +0100 Message-ID: <20240930095449.1813195-8-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Pierre-Henry Moussay PIC64GX SoC Clock Conditioning Circuitry is compatibles with the Polarfire SoC Signed-off-by: Pierre-Henry Moussay --- .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml index f1770360798f..9a6b50527c42 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml @@ -17,7 +17,11 @@ description: | properties: compatible: - const: microchip,mpfs-ccc + oneOf: + - items: + - const: microchip,pic64gx-ccc + - const: microchip,mpfs-ccc + - const: microchip,mpfs-ccc reg: items: -- 2.30.2