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From: Rob Herring <robh@kernel.org>
To: Angelo Dureghello <adureghello@baylibre.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>,
	Michael Hennerich <Michael.Hennerich@analog.com>,
	Nuno Sa <nuno.sa@analog.com>, Jonathan Cameron <jic23@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Mihail Chindris <mihail.chindris@analog.com>,
	Olivier Moysan <olivier.moysan@foss.st.com>,
	linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	devicetree@vger.kernel.org, dlechner@baylibre.com,
	Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH v4 03/11] dt-bindings: iio: dac: adi-axi-dac: add ad3552r axi variant
Date: Thu, 3 Oct 2024 19:34:54 -0500	[thread overview]
Message-ID: <20241004003454.GA1926225-robh@kernel.org> (raw)
In-Reply-To: <20241003-wip-bl-ad3552r-axi-v0-iio-testing-v4-3-ceb157487329@baylibre.com>

On Thu, Oct 03, 2024 at 07:29:00PM +0200, Angelo Dureghello wrote:
> From: Angelo Dureghello <adureghello@baylibre.com>
> 
> Add a new compatible and related bindigns for the fpga-based
> "ad3552r" AXI IP core, a variant of the generic AXI DAC IP.
> 
> The AXI "ad3552r" IP is a very similar HDL (fpga) variant of the
> generic AXI "DAC" IP, intended to control ad3552r and similar chips,
> mainly to reach high speed transfer rates using a QSPI DDR
> (dobule-data-rate) interface.
> 
> The ad3552r device is defined as a child of the AXI DAC, that in
> this case is acting as an SPI controller.
> 
> Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
> ---
>  .../devicetree/bindings/iio/dac/adi,axi-dac.yaml   | 49 +++++++++++++++++++++-
>  1 file changed, 48 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml b/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
> index a55e9bfc66d7..e15d02ef6be9 100644
> --- a/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
> +++ b/Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
> @@ -19,11 +19,13 @@ description: |
>    memory via DMA into the DAC.
>  
>    https://wiki.analog.com/resources/fpga/docs/axi_dac_ip
> +  https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html
>  
>  properties:
>    compatible:
>      enum:
>        - adi,axi-dac-9.1.b
> +      - adi,axi-ad3552r
>  
>    reg:
>      maxItems: 1
> @@ -41,13 +43,28 @@ properties:
>    '#io-backend-cells':
>      const: 0
>  
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 0
> +

Defined in spi-controller.yaml, so you don't need them here.

>  required:
>    - compatible
>    - dmas
>    - reg
>    - clocks
>  
> -additionalProperties: false
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: adi,axi-ad3552r
> +    then:
> +      $ref: /schemas/spi/spi-controller.yaml#
> +
> +unevaluatedProperties: false
>  
>  examples:
>    - |
> @@ -59,4 +76,34 @@ examples:
>          #io-backend-cells = <0>;
>          clocks = <&axi_clk>;
>      };
> +
> +  - |
> +    #include <dt-bindings/gpio/gpio.h>
> +    axi_dac: spi@44a70000 {
> +        compatible = "adi,axi-ad3552r";
> +        reg = <0x44a70000 0x1000>;
> +        dmas = <&dac_tx_dma 0>;
> +        dma-names = "tx";
> +        #io-backend-cells = <0>;
> +        clocks = <&axi_clk>;
> +
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +
> +        dac@0 {
> +            compatible = "adi,ad3552r";
> +            reg = <0>;
> +            reset-gpios = <&gpio0 92 GPIO_ACTIVE_HIGH>;
> +            io-backends = <&axi_dac>;
> +            spi-max-frequency = <66000000>;
> +
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +
> +            channel@0 {
> +                reg = <0>;
> +                adi,output-range-microvolt = <(-10000000) (10000000)>;
> +            };
> +        };
> +    };
>  ...
> 
> -- 
> 2.45.0.rc1
> 

  parent reply	other threads:[~2024-10-04  0:35 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-03 17:28 [PATCH v4 00/11] iio: add support for the ad3552r AXI DAC IP Angelo Dureghello
2024-10-03 17:28 ` [PATCH v4 01/11] iio: dac: adi-axi-dac: update register names Angelo Dureghello
2024-10-03 17:28 ` [PATCH v4 02/11] iio: dac: adi-axi-dac: fix wrong register bitfield Angelo Dureghello
2024-10-06 13:41   ` Jonathan Cameron
2024-10-03 17:29 ` [PATCH v4 03/11] dt-bindings: iio: dac: adi-axi-dac: add ad3552r axi variant Angelo Dureghello
2024-10-03 23:34   ` Rob Herring (Arm)
2024-10-04  7:33     ` Angelo Dureghello
2024-10-04 13:26       ` David Lechner
2024-10-05 17:22         ` Rob Herring
2024-10-04  0:34   ` Rob Herring [this message]
2024-10-03 17:29 ` [PATCH v4 04/11] dt-bindings: iio: dac: ad3552r: fix maximum spi speed Angelo Dureghello
2024-10-04  6:32   ` Krzysztof Kozlowski
2024-10-06 13:43   ` Jonathan Cameron
2024-10-03 17:29 ` [PATCH v4 05/11] dt-bindings: iio: dac: ad3552r: add iio backend support Angelo Dureghello
2024-10-04 16:04   ` Conor Dooley
2024-10-03 17:29 ` [PATCH v4 06/11] iio: backend: extend features Angelo Dureghello
2024-10-04 12:54   ` Nuno Sá
2024-10-04 13:45     ` Angelo Dureghello
2024-10-06 13:48       ` Jonathan Cameron
2024-10-07  6:36         ` Nuno Sá
2024-10-03 17:29 ` [PATCH v4 07/11] iio: dac: adi-axi-dac: " Angelo Dureghello
2024-10-04 13:41   ` Nuno Sá
2024-10-03 17:29 ` [PATCH v4 08/11] iio: dac: ad3552r: changes to use FIELD_PREP Angelo Dureghello
2024-10-03 17:29 ` [PATCH v4 09/11] iio: dac: ad3552r: extract common code (no changes in behavior intended) Angelo Dureghello
2024-10-03 17:29 ` [PATCH v4 10/11] iio: dac: ad3552r: add high-speed platform driver Angelo Dureghello
2024-10-06 13:58   ` Jonathan Cameron
2024-10-03 17:29 ` [PATCH v4 11/11] iio: dac: adi-axi-dac: add registering of child fdt node Angelo Dureghello
2024-10-06 14:00   ` Jonathan Cameron

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