[PATCH v2 0/2] USB: xhci: add support for PWRON polarity invert (TI TUSB73x0)

[PATCH v2 0/2] USB: xhci: add support for PWRON polarity invert (TI TUSB73x0)

[Francesco Dolcini]

From: Francesco Dolcini <francesco.dolcini@toradex.com>

The TUSB73x0 is a USB 3.0 xHCI Host Controller Hub using a PCIe x1 Gen2
interface. The TUSB7320 supports up to two downstream ports, and the
TUSB7340 supports up to four. It includes a feature to configure the
polarity of the PWRONx# signals, which are used to control other peripherals.
In some systems, the default polarity needs to be inverted, which is
supported by the hardware through software configuration. This patch
series introduces TUSB73x0 PCIe device tree bindings and modifies the
USB XHCI PCI driver to handle PWRONx# polarity via a device tree property.

TUSB73x0 datasheet: https://www.ti.com/lit/ds/symlink/tusb7320.pdf

v2:
 - Change the property type from bool to flag
 - Rename the property as ti,tusb7320-pwron-active-high

v1: https://lore.kernel.org/all/20241004124521.53442-1-francesco@dolcini.it/

Parth Pancholi (2):
  dt-bindings: usb: add TUSB73x0 PCIe
  USB: xhci: add support for PWRON active high

 .../bindings/usb/ti,tusb73x0-pci.yaml         | 60 +++++++++++++++++++
 drivers/usb/host/xhci-pci.c                   |  3 +
 2 files changed, 63 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml

-- 
2.39.5

[PATCH v2 1/2] dt-bindings: usb: add TUSB73x0 PCIe

[Francesco Dolcini]

From: Parth Pancholi <parth.pancholi@toradex.com>

Add device tree bindings for TI's TUSB73x0 PCIe-to-USB 3.0 xHCI
host controller. The controller supports software configuration
through PCIe registers, such as controlling the PWRONx polarity
via the USB control register (E0h).

Similar generic PCIe-based bindings can be found as qcom,ath11k-pci.yaml
as an example.

Datasheet: https://www.ti.com/lit/ds/symlink/tusb7320.pdf
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---
v2: rename property to ti,tusb7320-pwron-active-high and change type to flag
---
 .../bindings/usb/ti,tusb73x0-pci.yaml         | 60 +++++++++++++++++++
 1 file changed, 60 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml

diff --git a/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml b/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
new file mode 100644
index 000000000000..67a691dc03de
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/ti,tusb73x0-pci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TUSB73x0 USB 3.0 xHCI Host Controller (PCIe)
+
+maintainers:
+  - Francesco Dolcini <francesco.dolcini@toradex.com>
+
+description:
+  TUSB73x0 USB 3.0 xHCI Host Controller via PCIe x1 Gen2 interface.
+  The TUSB7320 supports up to two downstream ports, the TUSB7340 supports up
+  to four downstream ports.
+
+properties:
+  compatible:
+    const: pci104C,8241
+
+  reg:
+    maxItems: 1
+
+  ti,tusb7320-pwron-active-high:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      Configure the polarity of the PWRONx# signals. When this is present, the PWRONx#
+      pins are active high and their internal pull-down resistors are disabled.
+      When this is absent, the PWRONx# pins are active low (default) and their internal
+      pull-down resistors are enabled.
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    pcie {
+        #address-cells = <3>;
+        #size-cells = <2>;
+
+        pcie@0 {
+            device_type = "pci";
+            reg = <0x0 0x0 0x0 0x0 0x0>;
+            bus-range = <0x01 0xff>;
+
+            #address-cells = <3>;
+            #size-cells = <2>;
+            ranges;
+
+            usb@0 {
+                  compatible = "pci104C,8241";
+                  reg = <0x10000 0x0 0x0 0x0 0x0>;
+
+                  ti,tusb7320-pwron-active-high;
+            };
+        };
+    };
-- 
2.39.5

Re: [PATCH v2 1/2] dt-bindings: usb: add TUSB73x0 PCIe

[Rob Herring (Arm)]

On Mon, 07 Oct 2024 11:32:04 +0200, Francesco Dolcini wrote:
> From: Parth Pancholi <parth.pancholi@toradex.com>
> 
> Add device tree bindings for TI's TUSB73x0 PCIe-to-USB 3.0 xHCI
> host controller. The controller supports software configuration
> through PCIe registers, such as controlling the PWRONx polarity
> via the USB control register (E0h).
> 
> Similar generic PCIe-based bindings can be found as qcom,ath11k-pci.yaml
> as an example.
> 
> Datasheet: https://www.ti.com/lit/ds/symlink/tusb7320.pdf
> Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
> ---
> v2: rename property to ti,tusb7320-pwron-active-high and change type to flag
> ---
>  .../bindings/usb/ti,tusb73x0-pci.yaml         | 60 +++++++++++++++++++
>  1 file changed, 60 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.example.dtb: pcie@0: usb@0:compatible: ['pci104C,8241'] does not contain items matching the given schema
	from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241007093205.27130-2-francesco@dolcini.it

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH v2 1/2] dt-bindings: usb: add TUSB73x0 PCIe

[Francesco Dolcini]

Hello,

On Mon, Oct 07, 2024 at 09:16:48AM -0500, Rob Herring (Arm) wrote:
> On Mon, 07 Oct 2024 11:32:04 +0200, Francesco Dolcini wrote:
> > From: Parth Pancholi <parth.pancholi@toradex.com>
> > 
> > Add device tree bindings for TI's TUSB73x0 PCIe-to-USB 3.0 xHCI
> > host controller. The controller supports software configuration
> > through PCIe registers, such as controlling the PWRONx polarity
> > via the USB control register (E0h).
> > 
> > Similar generic PCIe-based bindings can be found as qcom,ath11k-pci.yaml
> > as an example.
> > 
> > Datasheet: https://www.ti.com/lit/ds/symlink/tusb7320.pdf
> > Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
> > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
> > ---
> > v2: rename property to ti,tusb7320-pwron-active-high and change type to flag
> > ---
> >  .../bindings/usb/ti,tusb73x0-pci.yaml         | 60 +++++++++++++++++++
> >  1 file changed, 60 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
> > 
> 
> My bot found errors running 'make dt_binding_check' on your patch:
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.example.dtb: pcie@0: usb@0:compatible: ['pci104C,8241'] does not contain items matching the given schema
> 	from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
> 
> doc reference errors (make refcheckdocs):
> 
> See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241007093205.27130-2-francesco@dolcini.it
> 
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
> 
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
> 
> pip3 install dtschema --upgrade

I do not have this error locally, and I am not sure I see the issue in
the yaml file ...

$ make dt_binding_check W=1 DT_SCHEMA_FILES=ti,tusb73x0-pci.yaml

...

  CHKDT   Documentation/devicetree/bindings
  LINT    Documentation/devicetree/bindings
  DTEX    Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.example.dts
  DTC [C] Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.example.dtb

$ pip3 list |grep dtschema
dtschema                  2024.10.dev5+g0934678abc36

Any idea?

Francesco

Re: [PATCH v2 1/2] dt-bindings: usb: add TUSB73x0 PCIe

[Rob Herring]

On Mon, Oct 07, 2024 at 04:29:20PM +0200, Francesco Dolcini wrote:
> Hello,
> 
> On Mon, Oct 07, 2024 at 09:16:48AM -0500, Rob Herring (Arm) wrote:
> > On Mon, 07 Oct 2024 11:32:04 +0200, Francesco Dolcini wrote:
> > > From: Parth Pancholi <parth.pancholi@toradex.com>
> > > 
> > > Add device tree bindings for TI's TUSB73x0 PCIe-to-USB 3.0 xHCI
> > > host controller. The controller supports software configuration
> > > through PCIe registers, such as controlling the PWRONx polarity
> > > via the USB control register (E0h).
> > > 
> > > Similar generic PCIe-based bindings can be found as qcom,ath11k-pci.yaml
> > > as an example.
> > > 
> > > Datasheet: https://www.ti.com/lit/ds/symlink/tusb7320.pdf
> > > Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
> > > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
> > > ---
> > > v2: rename property to ti,tusb7320-pwron-active-high and change type to flag
> > > ---
> > >  .../bindings/usb/ti,tusb73x0-pci.yaml         | 60 +++++++++++++++++++
> > >  1 file changed, 60 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
> > > 
> > 
> > My bot found errors running 'make dt_binding_check' on your patch:
> > 
> > yamllint warnings/errors:
> > 
> > dtschema/dtc warnings/errors:
> > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.example.dtb: pcie@0: usb@0:compatible: ['pci104C,8241'] does not contain items matching the given schema
> > 	from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
> > 
> > doc reference errors (make refcheckdocs):
> > 
> > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241007093205.27130-2-francesco@dolcini.it
> > 
> > The base for the series is generally the latest rc1. A different dependency
> > should be noted in *this* patch.
> > 
> > If you already ran 'make dt_binding_check' and didn't see the above
> > error(s), then make sure 'yamllint' is installed and dt-schema is up to
> > date:
> > 
> > pip3 install dtschema --upgrade
> 
> I do not have this error locally, and I am not sure I see the issue in
> the yaml file ...
> 
> $ make dt_binding_check W=1 DT_SCHEMA_FILES=ti,tusb73x0-pci.yaml

DT_SCHEMA_FILES limits what is tested.

The issue is your compatible string should be lowercase hex.

Rob

Re: [PATCH v2 1/2] dt-bindings: usb: add TUSB73x0 PCIe

[Francesco Dolcini]

On Mon, Oct 07, 2024 at 10:44:46AM -0500, Rob Herring wrote:
> On Mon, Oct 07, 2024 at 04:29:20PM +0200, Francesco Dolcini wrote:
> > On Mon, Oct 07, 2024 at 09:16:48AM -0500, Rob Herring (Arm) wrote:
> > > On Mon, 07 Oct 2024 11:32:04 +0200, Francesco Dolcini wrote:
> > > > From: Parth Pancholi <parth.pancholi@toradex.com>
> > > > 
> > > > Add device tree bindings for TI's TUSB73x0 PCIe-to-USB 3.0 xHCI
> > > > host controller. The controller supports software configuration
> > > > through PCIe registers, such as controlling the PWRONx polarity
> > > > via the USB control register (E0h).
> > > > 
> > > > Similar generic PCIe-based bindings can be found as qcom,ath11k-pci.yaml
> > > > as an example.
> > > > 
> > > > Datasheet: https://www.ti.com/lit/ds/symlink/tusb7320.pdf
> > > > Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
> > > > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
> > > > ---
> > > > v2: rename property to ti,tusb7320-pwron-active-high and change type to flag
> > > > ---
> > > >  .../bindings/usb/ti,tusb73x0-pci.yaml         | 60 +++++++++++++++++++
> > > >  1 file changed, 60 insertions(+)
> > > >  create mode 100644 Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
> > > > 
> > > 
> > > My bot found errors running 'make dt_binding_check' on your patch:
> > > 
> > > yamllint warnings/errors:
> > > 
> > > dtschema/dtc warnings/errors:
> > > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.example.dtb: pcie@0: usb@0:compatible: ['pci104C,8241'] does not contain items matching the given schema
> > > 	from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
> > > 
> > > doc reference errors (make refcheckdocs):
> > > 
> > > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241007093205.27130-2-francesco@dolcini.it
> > > 
> > > The base for the series is generally the latest rc1. A different dependency
> > > should be noted in *this* patch.
> > > 
> > > If you already ran 'make dt_binding_check' and didn't see the above
> > > error(s), then make sure 'yamllint' is installed and dt-schema is up to
> > > date:
> > > 
> > > pip3 install dtschema --upgrade
> > 
> > I do not have this error locally, and I am not sure I see the issue in
> > the yaml file ...
> > 
> > $ make dt_binding_check W=1 DT_SCHEMA_FILES=ti,tusb73x0-pci.yaml
> 
> DT_SCHEMA_FILES limits what is tested.
> 
> The issue is your compatible string should be lowercase hex.

Whoops, thanks for helping out.

I'll wait for more feedback (on this, and on patch 2/2) before sending a v3,
let me know if there is anything else that would need to be adjusted.

Francesco

[PATCH v2 2/2] USB: xhci: add support for PWRON active high

[Francesco Dolcini]

From: Parth Pancholi <parth.pancholi@toradex.com>

Some PCIe-to-USB controllers such as TI's TUSB73x0 3.0 xHCI host
controller supports controlling the PWRONx polarity via the USB
control register (E0h). Add support for device tree property
ti,tusb7320-pwron-active-high which indicates PWRONx to be
active high and configure the E0h register accordingly.
This enables the software control for the TUSB73x0's PWRONx
outputs with an inverted polarity from the default configuration
which could be used as USB EN signals for the other hubs or devices.

Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---
v2: s/polarity-invert/active-high
---
 drivers/usb/host/xhci-pci.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 91dccd25a551..4bdef01735eb 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -641,6 +641,9 @@ int xhci_pci_common_probe(struct pci_dev *dev, const struct pci_device_id *id)
 
 	dma_set_max_seg_size(&dev->dev, UINT_MAX);
 
+	if (device_property_read_bool(&dev->dev, "ti,tusb7320-pwron-active-high"))
+		pci_clear_and_set_config_dword(dev, 0xE0, 0, 1 << 22);
+
 	return 0;
 
 put_usb3_hcd:
-- 
2.39.5