From: Rob Herring <robh@kernel.org>
To: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: broonie@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
tsbogend@alpha.franken.de, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mips@vger.kernel.org
Subject: Re: [PATCH v2 1/3] dt-bindings: spi: Add realtek,rtl9300-snand
Date: Tue, 8 Oct 2024 09:46:24 -0500 [thread overview]
Message-ID: <20241008144624.GA1284425-robh@kernel.org> (raw)
In-Reply-To: <20241008002308.1149983-2-chris.packham@alliedtelesis.co.nz>
On Tue, Oct 08, 2024 at 01:23:05PM +1300, Chris Packham wrote:
> Add a dtschema for the SPI-NAND controller on the RTL9300 SoCs. The
> controller supports
> * Serial/Dual/Quad data with
> * PIO and DMA data read/write operation
> * Configurable flash access timing
>
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
>
> Notes:
> Changes in v2:
> - Add clocks
> - For now I've kept realtek,rtl9300-snand to identify the IP block used
> in the various rtl930x chips. If the consensus is to drop this I can
> send a v3 with an updated driver to add the chip specific complatibles.
>
> .../bindings/spi/realtek,rtl9300-snand.yaml | 69 +++++++++++++++++++
> 1 file changed, 69 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
>
> diff --git a/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
> new file mode 100644
> index 000000000000..2d01464e85e5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/realtek,rtl9300-snand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SPI-NAND Flash Controller for Realtek RTL9300 SoCs
> +
> +maintainers:
> + - Chris Packham <chris.packham@alliedtelesis.co.nz>
> +
> +description:
> + The Realtek RTL9300 SoCs have a built in SPI-NAND controller. It supports
> + typical SPI-NAND page cache operations in single, dual or quad IO mode.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - realtek,rtl9301-snand
> + - realtek,rtl9302b-snand
> + - realtek,rtl9302c-snand
> + - realtek,rtl9303-snand
> + - const: realtek,rtl9300-snand
> +
> + reg:
> + items:
> + - description: SPI NAND controller registers address and size
Just 'maxItems: 1'. The description is fairly obvious.
> +
> + interrupts:
> + items:
> + - description: SPI NAND controller interrupt
Same here.
> +
> + clocks:
> + items:
> + - description: SPI NAND controller reference clock
And here.
> +
> + clock-names:
> + items:
> + - const: spi
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> +
> +allOf:
> + - $ref: /schemas/spi/spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi@1a400 {
> + compatible = "realtek,rtl9302c-snand", "realtek,rtl9300-snand";
> + reg = <0x1a400 0x44>;
> + interrupt-parent = <&intc>;
> + interrupts = <19>;
> + clocks = <&lx_clk>;
> + clock-names = "spi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + flash@0 {
> + compatible = "spi-nand";
> + reg = <0>;
> + };
> + };
> --
> 2.46.2
>
next prev parent reply other threads:[~2024-10-08 14:46 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-08 0:23 [PATCH v2 0/3] Realtek SPI-NAND controller Chris Packham
2024-10-08 0:23 ` [PATCH v2 1/3] dt-bindings: spi: Add realtek,rtl9300-snand Chris Packham
2024-10-08 7:01 ` Krzysztof Kozlowski
2024-10-08 14:46 ` Rob Herring [this message]
2024-10-08 0:23 ` [PATCH v2 2/3] mips: dts: realtek: Add SPI NAND controller Chris Packham
2024-10-08 0:23 ` [PATCH v2 3/3] spi: spi-mem: Add Realtek SPI-NAND controller Chris Packham
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