From: Conor Dooley <conor@kernel.org>
To: Inochi Amaoto <inochiama@gmail.com>
Cc: Chen Wang <unicorn_wang@outlook.com>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Peter Zijlstra <peterz@infradead.org>,
Inochi Amaoto <inochiama@outlook.com>,
Guo Ren <guoren@kernel.org>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Hal Feng <hal.feng@starfivetech.com>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Yixun Lan <dlan@gentoo.org>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI
Date: Thu, 10 Oct 2024 17:16:51 +0100 [thread overview]
Message-ID: <20241010-playtime-liquid-cf9888d27052@spud> (raw)
In-Reply-To: <42ndts6wuoor3tbt3uv5kuco37kc6bnnoepqtauqosw2gg2xn7@7hfdc6wgvlsm>
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On Sat, Oct 05, 2024 at 08:46:37AM +0800, Inochi Amaoto wrote:
> On Fri, Oct 04, 2024 at 04:44:22PM +0100, Conor Dooley wrote:
> > On Fri, Oct 04, 2024 at 04:05:55PM +0800, Inochi Amaoto wrote:
> > > Sophgo SG2044 has a new version of T-HEAD C920, which implement
> > > a fully featured ACLINT device. This ACLINT has an extra SSWI
> > > field to support fast S-mode IPI.
> > >
> > > Add necessary compatible string for the T-HEAD ACLINT sswi device.
> > >
> > > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> > > ---
> > > .../thead,c900-aclint-sswi.yaml | 58 +++++++++++++++++++
> > > 1 file changed, 58 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
> > > new file mode 100644
> > > index 000000000000..0106fbf3ea1f
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
> > > @@ -0,0 +1,58 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/interrupt-controller/thead,c900-aclint-sswi.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Sophgo sg2044 ACLINT Supervisor-level Software Interrupt Device
> > > +
> > > +maintainers:
> > > + - Inochi Amaoto <inochiama@outlook.com>
> > > +
> > > +description:
> > > + The SSWI device is a part of the riscv ACLINT device. It provides
> > > + supervisor-level IPI functionality for a set of HARTs on a RISC-V
> > > + platform. It provides a register to set an IPI (SETSSIP) for each
> > > + HART connected to the SSWI device.
> >
> > If it is part of the aclint, why should it have a separate node, rather
> > than be part of the existing aclint node as a third reg property?
>
> For aclint, the current nodes that have documented are mswi and mtime.
> Since the mtime is a M-mode time source, it is not suitable to add the
> sswi reg into this device. For mswi, it is OK to add a sswi reg, but
> this will cause problem while checking "interrupt-extend". Do we just
> double the maxItem? Or just left it unchanged?
>
> Another reason to add it as a separate node is that the draft says
> sswi can be multiple. If we add this device by adding reg. It will be
> hard if we have multiple sswi devices but one mswi device.
Ah, I see we do indeed have 2 devices already for the aclint, one for
mswi and mtimer.
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next prev parent reply other threads:[~2024-10-10 16:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-04 8:05 [PATCH 0/3] riscv: interrupt-controller: Add T-HEAD C900 ACLINT SSWI Inochi Amaoto
2024-10-04 8:05 ` [PATCH 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 " Inochi Amaoto
2024-10-04 15:44 ` Conor Dooley
2024-10-05 0:46 ` Inochi Amaoto
2024-10-10 16:16 ` Conor Dooley [this message]
2024-10-04 8:05 ` [PATCH 2/3] irqchip: add T-HEAD C900 ACLINT SSWI driver Inochi Amaoto
2024-10-06 19:50 ` Thomas Gleixner
2024-10-07 0:38 ` Inochi Amaoto
2024-10-04 8:05 ` [PATCH 3/3] riscv: defconfig: Enable T-HEAD C900 ACLINT SSWI drivers Inochi Amaoto
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