Re: [PATCH v3 12/12] PCI: rockchip-ep: Handle PERST# signal in endpoint mode

Damien Le Moal
2024-10-15T06:24:33Z

On 10/12/24 21:31, Manivannan Sadhasivam wrote:
> On Fri, Oct 11, 2024 at 06:30:31PM +0900, Damien Le Moal wrote:
>> On 10/10/24 19:49, Manivannan Sadhasivam wrote:
>>>> +static int rockchip_pcie_ep_setup_irq(struct pci_epc *epc)
>>>> +{
>>>> + struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
>>>> + struct rockchip_pcie *rockchip = &ep->rockchip;
>>>> + struct device *dev = rockchip->dev;
>>>> + int ret;
>>>> +
>>>> + if (!rockchip->ep_gpio)
>>>> + return 0;
>>>> +
>>>> + /* PCIe reset interrupt */
>>>> + ep->perst_irq = gpiod_to_irq(rockchip->ep_gpio);
>>>> + if (ep->perst_irq < 0) {
>>>> + dev_err(dev, "No corresponding IRQ for PERST GPIO\n");
>>>> + return ep->perst_irq;
>>>> + }
>>>> +
>>>> + ep->perst_asserted = true;
>>>
>>> How come?
>>
>> Yeah, a bit confusing. This is because the gpio active low / inactive high, so
>> as soon as we enable the IRQ, we are going to get one IRQ even though perst gpio
>> signal has not changed yet.
>
> Which means you are looking for a wrong level! What is the polarity of the
> PERST# gpio in DT?

It is not defined in the default DT with the kernel. I added an overlay file to
define it together with the EP mode. And as I said above, the gpio is active
low. If I reverse that to active high, it does not work.

--
Damien Le Moal
Western Digital Research